C++ (Cpp) pci_bridge_write_config Beispiele

Beispiel #1

Datei: xio3130_upstream.c Projekt: Blopeur/qemu-heca

static void xio3130_upstream_write_config(PCIDevice *d, uint32_t address,
                                          uint32_t val, int len)
{
    pci_bridge_write_config(d, address, val, len);
    pcie_cap_flr_write_config(d, address, val, len);
    pcie_aer_write_config(d, address, val, len);
}

Beispiel #2

Datei: ioh3420.c Projekt: raedwulf/qemu-ps2mouse

static void ioh3420_write_config(PCIDevice *d,
                                 uint32_t address, uint32_t val, int len)
{
    pci_bridge_write_config(d, address, val, len);
    msi_write_config(d, address, val, len);
    pcie_cap_slot_write_config(d, address, val, len);
    /* TODO: AER */
}

Beispiel #3

Datei: pci_bridge_dev.c Projekt: AdrianHuang/qemu

static void pci_bridge_dev_write_config(PCIDevice *d,
                                        uint32_t address, uint32_t val, int len)
{
    pci_bridge_write_config(d, address, val, len);
    if (msi_present(d)) {
        msi_write_config(d, address, val, len);
    }
    shpc_cap_write_config(d, address, val, len);
}

Beispiel #4

Datei: xio3130_downstream.c Projekt: raedwulf/qemu-ps2mouse

static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address,
                                         uint32_t val, int len)
{
    pci_bridge_write_config(d, address, val, len);
    pcie_cap_flr_write_config(d, address, val, len);
    pcie_cap_slot_write_config(d, address, val, len);
    msi_write_config(d, address, val, len);
    /* TODO: AER */
}

Beispiel #5

Datei: ioh3420.c Projekt: Pating/qemu

static void ioh3420_write_config(PCIDevice *d,
                                   uint32_t address, uint32_t val, int len)
{
    uint32_t root_cmd =
        pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND);

    pci_bridge_write_config(d, address, val, len);
    ioh3420_aer_vector_update(d);
    pcie_cap_slot_write_config(d, address, val, len);
    pcie_aer_write_config(d, address, val, len);
    pcie_aer_root_write_config(d, address, val, len, root_cmd);
}