/* check whether KMS is used.
* in that case graphics=(auto)/console=(auto) will not activate console
* graphics.
* code adapted from libdrm (drmCheckModesettingSupported)
*/
static int using_kms(void)
{
#ifdef __linux__
char pci_dev_dir[1024];
int bus, dev, func;
DIR *sysdir;
struct dirent *dent;
int found = 0;
pciRec *pcirec;
if (!pcibios_init()) return 0;
pcirec = pcibios_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0);
if (!pcirec) return 0;
bus = pcirec->bdf >> 8;
dev = (pcirec->bdf & 0xff) >> 3;
func = pcirec->bdf & 0x7;
sprintf(pci_dev_dir, "/sys/bus/pci/devices/0000:%02x:%02x.%d/drm",
bus, dev, func);
sysdir = opendir(pci_dev_dir);
if (sysdir) {
dent = readdir(sysdir);
while (dent) {
if (!strncmp(dent->d_name, "controlD", 8)) {
found = 1;
break;
}
dent = readdir(sysdir);
}
closedir(sysdir);
if (found)
return 1;
}
sprintf(pci_dev_dir, "/sys/bus/pci/devices/0000:%02x:%02x.%d/",
bus, dev, func);
sysdir = opendir(pci_dev_dir);
if (!sysdir)
return 0;
dent = readdir(sysdir);
while (dent) {
if (!strncmp(dent->d_name, "drm:controlD", 12)) {
found = 1;
break;
}
dent = readdir(sysdir);
}
closedir(sysdir);
if (found)
return 1;
#endif
return 0;
}
int __init pci_subsys_init(void)
{
if (x86_init.pci.init())
pci_legacy_init();
pcibios_fixup_peer_bridges();
x86_init.pci.init_irq();
pcibios_init();
return 0;
}
static int __init pci_init(void)
{
#ifdef CONFIG_CPU_LOONGSON2H
return ls2h_pcibios_init();
#else
if(board_type == LS2H){
return ls2h_pcibios_init();
}else{
return pcibios_init();
}
#endif
}
int __init pci_subsys_init(void)
{
/*
* The init function returns an non zero value when
* pci_legacy_init should be invoked.
*/
if (x86_init.pci.init())
pci_legacy_init();
pcibios_fixup_peer_bridges();
x86_init.pci.init_irq();
pcibios_init();
return 0;
}
int __init pci_subsys_init(void)
{
#ifdef CONFIG_X86_NUMAQ
pci_numaq_init();
#endif
#ifdef CONFIG_ACPI
pci_acpi_init();
#endif
#ifdef CONFIG_X86_VISWS
pci_visws_init();
#endif
pci_legacy_init();
pcibios_irq_init();
pcibios_init();
return 0;
}
void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr)
{
#ifndef CONFIG_ARCHERC7
if (cal_data)
memcpy(wmac_data.eeprom_data, cal_data, sizeof(wmac_data.eeprom_data));
if (mac_addr) {
memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac));
wmac_data.macaddr = ap91_wmac_mac;
}
ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init;
pci_enable_ath9k_fixup(0, wmac_data.eeprom_data);
#endif
ar71xx_pci_init();
#ifdef CONFIG_MTD_NAND_ATH
pcibios_init();
#endif
}
/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
struct pcb *pcb;
startrtclock();
#if NBIOS32 > 0
bios32_init();
platform_init();
#endif
#ifdef PCIBIOS
pcibios_init();
#endif
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
#ifdef INTRDEBUG
intr_printconfig();
#endif
#if NIOAPIC > 0
ioapic_enable();
#endif
fpuinit(&cpu_info_primary);
/* resync cr0 after FPU configuration */
pcb = lwp_getpcb(&lwp0);
pcb->pcb_cr0 = rcr0() & ~CR0_TS;
#ifdef MULTIPROCESSOR
/* propagate this to the idle pcb's. */
cpu_init_idle_lwps();
#endif
spl0();
#if NLAPIC > 0
lapic_tpr = 0;
#endif
}
