char* get_LCD_cmd(void) { if((LCD_USART->csr & AVR32_USART_CSR_TIMEOUT_MASK) != 0) {//timeout detected LCD_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set to not start counting again until after new character is received LCD_USART->rtor=230; cmd_ptr=(char *)(AVR32_PDCA.channel[LCD_USART_RX_PDCA_CHANNEL].mar-1); if((*(cmd_ptr)==0x0D) && ((cmd_ptr)!=(&LCD_USART_buffer[0]))) { pdca_disable(LCD_USART_RX_PDCA_CHANNEL); pdca_load_channel(LCD_USART_RX_PDCA_CHANNEL, (&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer))); *(cmd_ptr+1)=0x00; cmd_ptr--; while((*(cmd_ptr-1)!=0x0D) && ((cmd_ptr)!=(&LCD_USART_buffer[0]))) { cmd_ptr--; } pdca_enable(LCD_USART_RX_PDCA_CHANNEL); return cmd_ptr; } pdca_disable(LCD_USART_RX_PDCA_CHANNEL); pdca_load_channel(LCD_USART_RX_PDCA_CHANNEL, (&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer))); pdca_enable(LCD_USART_RX_PDCA_CHANNEL); return "false"; } return "false"; }
//this gets an experiment, plus additional data, from the host //A full cluster will be transferred void get_experiment_from_host_to_SD(void) { USB_USART->rtor=0; //going to use PDCA for receiving data, so disable receive timeout pdca_disable(USB_USART_RX_PDCA_CHANNEL); my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&bank0[0]),samplebuffer_size, USB_USART_RX_PDCA_PID, 0, 0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_RX_PDCA_CHANNEL); while(!(pdca_get_transfer_status(USB_USART_RX_PDCA_CHANNEL) & AVR32_PDCA_TRC_MASK)); //wait until transfer is done pdca_disable(USB_USART_RX_PDCA_CHANNEL); //reset USART RX channel to receive host commands USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //changing back to receiving command mode USB_USART->rtor=15000; //so reenable timeout pdca_load_channel(USB_USART_RX_PDCA_CHANNEL, (&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer))); pdca_enable(USB_USART_RX_PDCA_CHANNEL); spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); while(check_busy_fast()!=0xFF); spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); my_SD_SPI_block_write_multi(bank0,experiment_base_address,blocks_per_cluster); //write data to SD spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); while(check_busy_fast()!=0xFF); spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS); }
void aic23b_dac_stop(void) { aic23b_dac_flush(); // Disable AIC23B aic23b_reset(); aic23b_pdc_t pdc; pdc.data = AIC23B_DEFAULT(AIC23B_PDC); pdc.off = 1; pdc.clk = 1; pdc.osc = 1; pdc.out = 1; pdc.dac = 1; pdc.adc = 1; pdc.mic = 1; pdc.line = 1; aic23b_set_power_down_state(pdc); // Stop PDCA pdca_disable(AIC23B_SSC_TX_PDCA_CHANNEL); ssc_i2s_reset(AIC23B_SSC); // Set used GPIO pins to GPIO state gpio_enable_gpio(AIC23B_SSC_DAC_GPIO_MAP, sizeof(AIC23B_SSC_DAC_GPIO_MAP) / sizeof(AIC23B_SSC_DAC_GPIO_MAP[0])); aic23b_output_params.num_channels = 0; aic23b_output_params.callback = NULL; aic23b_output_params.callback_opt = 0; }
static void irq_pdca(void) { // Disable all interrupts. // Disable_global_interrupt(); cpu_irq_disable(); // Disable interrupt channel. pdca_disable_interrupt_transfer_complete(AVR32_PDCA_CHANNEL_SPI_RX); //unselects the SD/MMC memory. sd_mmc_spi_read_close_PDCA(); //.... example has a 5000 clock gimpy delay here. // using delay_us instead delay_ms(10); // delay_ms(2); // Disable unnecessary channel pdca_disable(AVR32_PDCA_CHANNEL_SPI_TX); pdca_disable(AVR32_PDCA_CHANNEL_SPI_RX); // Enable all interrupts. cpu_irq_enable(); // Enable_global_interrupt(); // print_dbg("\r\n handled PDCA interrupt. \r\n"); fsEndTransfer = true; }
__interrupt #endif static void pdca_int_handler(void) { // Disable all interrupts. Disable_global_interrupt(); // Disable interrupt channel. pdca_disable_interrupt_transfer_complete(AVR32_PDCA_CHANNEL_SPI_RX); sd_mmc_spi_read_close_PDCA();//unselects the SD/MMC memory. wait(); // Disable unnecessary channel pdca_disable(AVR32_PDCA_CHANNEL_SPI_TX); pdca_disable(AVR32_PDCA_CHANNEL_SPI_RX); // Enable all interrupts. Enable_global_interrupt(); end_of_transfer = true; }
bool wait_for_CR(void) { if((LCD_USART->csr & AVR32_USART_CSR_TIMEOUT_MASK) != 0) {//timeout detected LCD_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set to not start counting again until after new character is received LCD_USART->rtor=230; pdca_disable(LCD_USART_RX_PDCA_CHANNEL); pdca_load_channel(LCD_USART_RX_PDCA_CHANNEL, (&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer))); pdca_enable(LCD_USART_RX_PDCA_CHANNEL); return true; } return false; }
/*! \brief Flushes the sample buffer being output to the ABDAC. */ void tpa6130_dac_flush(void) { pdca_disable_interrupt_transfer_complete(TPA6130_ABDAC_PDCA_CHANNEL); pdca_disable_interrupt_reload_counter_zero(TPA6130_ABDAC_PDCA_CHANNEL); /*TODO Do we really want to wait here? Or do we just don't care when * the buffer is empty/flushed */ //while(!pdca_get_transfer_status(TPA6130_ABDAC_PDCA_CHANNEL) & // PDCA_TRANSFER_COMPLETE); pdca_disable (TPA6130_ABDAC_PDCA_CHANNEL ); pdca_load_channel (TPA6130_ABDAC_PDCA_CHANNEL,0x0, 0); pdca_reload_channel(TPA6130_ABDAC_PDCA_CHANNEL,0x0, 0); pdca_enable (TPA6130_ABDAC_PDCA_CHANNEL ); }
void ms3_dac_stop(void) { ms3_dac_flush(); pdca_disable(MS3_SSC_TX_PDCA_CHANNEL); ssc_i2s_reset(&AVR32_SSC); // Set as gpio pin gpio_enable_gpio(MS3_GPIO_MAP, sizeof(MS3_GPIO_MAP) / sizeof(MS3_GPIO_MAP[0])); ms3_output_params.num_channels = 0; ms3_output_params.callback = NULL; ms3_output_params.callback_opt = 0; }
static void pdca_int_handler_i2c0(void) { AVR32_TWIM0.cr = AVR32_TWIM_CR_MDIS_MASK; pdca_disable(TWI0_DMA_CH); pdca_disable_interrupt_transfer_complete(TWI0_DMA_CH); // call callback function to process data, at end of transfer // to process data, and maybe add some more data schedule[0][current_schedule_slot[0]].transfer_in_progress = 0; if (schedule[0][current_schedule_slot[0]].callback) { schedule[0][current_schedule_slot[0]].callback; } print_util_dbg_print( "!"); }
char* get_HOST_cmd(void) { if((USB_USART->csr & AVR32_USART_CSR_TIMEOUT_MASK) != 0) {//timeout detected USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set to not start counting again until after new character is received USB_USART->rtor=15000; //baud rate is 3mbaud, so 15000 gives 5ms timeout pdca_disable(USB_USART_RX_PDCA_CHANNEL); cmd_ptr=(char *)(AVR32_PDCA.channel[USB_USART_RX_PDCA_CHANNEL].mar); *(cmd_ptr)=0x00; //make sure command string is null terminated cmd_ptr=&host_USART_buffer[0]; pdca_load_channel(USB_USART_RX_PDCA_CHANNEL, (&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer))); pdca_enable(USB_USART_RX_PDCA_CHANNEL); return cmd_ptr; } return "false"; }
/*! \brief Stops the ABDAC and puts the amplifier in low power mode. * Additionally it sets all used pins to the GPIO state. * The counter part of this function is tpa6130_dac_start(...) */ void tpa6130_dac_stop(void) { /* Disable amplifier 1st */ tpa6130_shutdown(); /* Flush the dac */ // Don't flush the DAC when stop //tpa6130_dac_flush(); /* Disable ABDAC */ abdac_disable(TPA6130_ABDAC); /* Stop PDCA */ pdca_disable(TPA6130_ABDAC_PDCA_CHANNEL); /* Set used GPIO pins to GPIO state */ gpio_enable_gpio(TPA6130_ABDAC_GPIO_MAP, sizeof(TPA6130_ABDAC_GPIO_MAP) / sizeof(TPA6130_ABDAC_GPIO_MAP[0])); tpa6130_output_param.num_channels = 0; tpa6130_output_param.callback = NULL; tpa6130_output_param.callback_opt = 0; }
void aic23b_codec_start(uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void (*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) { #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI static const spi_options_t AIC23B_SPI_OPTIONS = { .reg = AIC23B_SPI_NPCS, .baudrate = AIC23B_SPI_MASTER_SPEED, .bits = AIC23B_CTRL_SIZE, .spck_delay = 0, .trans_delay = 0, .stay_act = 0, .spi_mode = 3, .modfdis = 1 }; spi_setupChipReg(AIC23B_SPI, &AIC23B_SPI_OPTIONS, pba_hz); #endif aic23b_codec_stop(); gpio_enable_module(AIC23B_SSC_CODEC_GPIO_MAP, sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0])); aic23b_pdc_t pdc; pdc.data = AIC23B_DEFAULT(AIC23B_PDC); pdc.off = 0; pdc.clk = 0; pdc.osc = 0; pdc.out = 0; pdc.dac = 0; pdc.adc = 0; #if (AIC23B_INPUT==AIC23B_INPUT_LINE) pdc.mic = 1; pdc.line = 0; #elif (AIC23B_INPUT==AIC23B_INPUT_MIC) pdc.mic = 0; pdc.line = 1; #else #error No Input defined in file 'conf_tlv320aic23b.h' #endif aic23b_set_power_down_state(pdc); aic23b_codec_setup(sample_rate_hz, num_channels, bits_per_sample, swap_channels, callback, callback_opt, pba_hz); aic23b_aapc_t aapc; aapc.data = AIC23B_DEFAULT(AIC23B_AAPC); #if (AIC23B_INPUT==AIC23B_INPUT_LINE) aapc.ste = 0; aapc.dac = 1; aapc.byp = 0; aapc.insel = 0; aapc.micm = 0; aapc.micb = 1; #elif (AIC23B_INPUT==AIC23B_INPUT_MIC) aapc.ste = 0; aapc.dac = 1; aapc.sta = 4; aapc.byp = 0; aapc.insel = 1; aapc.micm = 0; aapc.micb = 1; #else #error No Input defined in file 'conf_tlv320aic23b.h' #endif aic23b_set_analog_audio_path(aapc); aic23b_dapc_t dapc; dapc.data = AIC23B_DEFAULT(AIC23B_DAPC); dapc.dacm = 0; dapc.deemp = AIC23B_DAPC_DEEMP_NONE; dapc.adchp = 0; aic23b_set_digital_audio_path(dapc); aic23b_llicvc_t llivc; llivc.data = AIC23B_DEFAULT(AIC23B_LLICVC); llivc.liv = 20; llivc.lim = 0; llivc.lrs = 1; aic23b_write_reg(AIC23B_LLICVC, llivc.data); aic23b_rlicvc_t rlivc; rlivc.data = AIC23B_DEFAULT(AIC23B_RLICVC); rlivc.riv = 20; rlivc.rim = 0; rlivc.rls = 1; aic23b_write_reg(AIC23B_RLICVC, rlivc.data); INTC_register_interrupt(&aic23b_ssc_rx_pdca_int_handler, AIC23B_SSC_RX_PDCA_IRQ, AIC23B_SSC_RX_PDCA_INT_LEVEL); // set an acceptable start volume aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL, -30, true); aic23b_activate_dig_audio(true); INTC_register_interrupt(&aic23b_ssc_tx_pdca_int_handler, AIC23B_SSC_TX_PDCA_IRQ, AIC23B_SSC_TX_PDCA_INT_LEVEL); } void aic23b_codec_setup(uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void (*callback)(uint32_t opt), uint32_t callback_opt, uint32_t pba_hz) { ssc_i2s_init(AIC23B_SSC, sample_rate_hz, bits_per_sample, (bits_per_sample <= 16) ? 16 : (bits_per_sample <= 20) ? 20 : (bits_per_sample <= 24) ? 24 : 32, SSC_I2S_MODE_STEREO_OUT_STEREO_IN, pba_hz); pdca_channel_options_t aic23b_ssc_pdca_options_rx = { .addr = NULL, .size = 0, .r_addr = NULL, .r_size = 0, .pid = AIC23B_SSC_RX_PDCA_PID, .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE : (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD : PDCA_TRANSFER_SIZE_WORD }; pdca_init_channel(AIC23B_SSC_RX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_rx); pdca_enable(AIC23B_SSC_RX_PDCA_CHANNEL); pdca_channel_options_t aic23b_ssc_pdca_options_tx = { .addr = NULL, .size = 0, .r_addr = NULL, .r_size = 0, .pid = AIC23B_SSC_TX_PDCA_PID, .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE : (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD : PDCA_TRANSFER_SIZE_WORD }; pdca_init_channel(AIC23B_SSC_TX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_tx); pdca_enable(AIC23B_SSC_TX_PDCA_CHANNEL); // Set codec frequency aic23b_configure_freq(AIC23B_MCLK_HZ, sample_rate_hz); aic23b_daif_t daif; daif.data = AIC23B_DEFAULT(AIC23B_DAIF); daif.ms = AIC23B_DAIF_MS_SLAVE; daif.lrswap = swap_channels; daif.lrp = 0; daif.iwl = (bits_per_sample <= 16) ? AIC23B_DAIF_IWL_16 : (bits_per_sample <= 20) ? AIC23B_DAIF_IWL_20 : (bits_per_sample <= 24) ? AIC23B_DAIF_IWL_24 : AIC23B_DAIF_IWL_32; daif.fmt = AIC23B_DAIF_FMT_I2S; aic23b_write_reg(AIC23B_DAIF, daif.data); aic23b_output_params.num_channels = num_channels; aic23b_output_params.callback = callback; aic23b_output_params.callback_opt = callback_opt; } void aic23b_codec_flush(void) { pdca_disable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL); while (!(pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)); pdca_disable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL); while (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)); } void aic23b_codec_stop(void) { aic23b_codec_flush(); aic23b_reset(); aic23b_pdc_t pdc; pdc.data = AIC23B_DEFAULT(AIC23B_PDC); pdc.off = 1; pdc.clk = 1; pdc.osc = 1; pdc.out = 1; pdc.dac = 1; pdc.adc = 1; pdc.mic = 1; pdc.line = 1; aic23b_set_power_down_state(pdc); pdca_disable(AIC23B_SSC_RX_PDCA_CHANNEL); pdca_disable(AIC23B_SSC_TX_PDCA_CHANNEL); ssc_i2s_reset(AIC23B_SSC); gpio_enable_gpio(AIC23B_SSC_CODEC_GPIO_MAP, sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0])); aic23b_output_params.num_channels = 0; aic23b_output_params.callback = NULL; aic23b_output_params.callback_opt = 0; }
/** * \brief Test ECB mode encryption and decryption with PDCA. * * \param test Current test case. */ static void run_ecb_mode_test_pdca(const struct test_case *test) { /* Change the AES interrupt callback function. */ aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY, aes_callback_pdca, 1); /* Enable PDCA module clock */ pdca_enable(PDCA); state = false; /* Configure the AES. */ g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION; g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128; g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE; g_aes_inst.aes_cfg->opmode = AES_ECB_MODE; g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128; g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL; aes_set_config(&g_aes_inst); /* Beginning of a new message. */ aes_set_new_message(&g_aes_inst); /* Set the cryptographic key. */ aes_write_key(&g_aes_inst, key128); /* The initialization vector is not used by the ECB cipher mode. */ /* Write the data to be ciphered to the input data registers. */ /* Init PDCA channel with the pdca_options.*/ PDCA_TX_OPTIONS.addr = (void *)ref_plain_text; /* memory address */ PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/ PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */ PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */ PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */ PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD; pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS); PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */ PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/ PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */ PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */ PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */ PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD; pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS); /* Enable PDCA channel, start transfer data. */ pdca_channel_enable(PDCA_TX_CHANNEL); /* Wait for the end of the encryption process. */ delay_ms(30); /* Disable PDCA channel. */ pdca_channel_disable(PDCA_RX_CHANNEL); pdca_channel_disable(PDCA_TX_CHANNEL); if ((ref_cipher_text_ecb[0] != output_data[0]) || (ref_cipher_text_ecb[1] != output_data[1]) || (ref_cipher_text_ecb[2] != output_data[2]) || (ref_cipher_text_ecb[3] != output_data[3])) { flag = false; } else { flag = true; } test_assert_true(test, flag == true, "ECB mode encryption not work!"); state = false; /* Configure the AES. */ g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION; g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128; g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE; g_aes_inst.aes_cfg->opmode = AES_ECB_MODE; g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128; g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL; aes_set_config(&g_aes_inst); /* Beginning of a new message. */ aes_set_new_message(&g_aes_inst); /* Set the cryptographic key. */ aes_write_key(&g_aes_inst, key128); /* The initialization vector is not used by the ECB cipher mode. */ /* Write the data to be deciphered to the input data registers. */ /* Init PDCA channel with the pdca_options.*/ PDCA_TX_OPTIONS.addr = (void *)ref_cipher_text_ecb; /* memory address */ PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/ PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */ PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */ PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */ PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD; pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS); PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */ PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/ PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */ PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */ PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */ PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD; pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS); /* Enable PDCA channel, start transfer data. */ pdca_channel_enable(PDCA_TX_CHANNEL); /* Wait for the end of the decryption process. */ delay_ms(30); /* Disable PDCA channel. */ pdca_channel_disable(PDCA_RX_CHANNEL); pdca_channel_disable(PDCA_TX_CHANNEL); /* check the result. */ if ((ref_plain_text[0] != output_data[0]) || (ref_plain_text[1] != output_data[1]) || (ref_plain_text[2] != output_data[2]) || (ref_plain_text[3] != output_data[3])) { flag = false; } else { flag = true; } test_assert_true(test, flag == true, "ECB mode decryption not work!"); /* Disable PDCA module clock */ pdca_disable(PDCA); /* Change back the AES interrupt callback function. */ aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY, aes_callback, 1); }
/** * \brief Test audio data transfer and receive. * * \param test Current test case. */ static void run_iis_test(const struct test_case *test) { uint32_t i; struct iis_config config; struct iis_dev_inst dev_inst; struct genclk_config gencfg; struct pll_config pcfg; /* Set the GCLK according to the sample rate */ genclk_config_defaults(&gencfg, IISC_GCLK_NUM); /* CPUCLK 48M */ pll_config_init(&pcfg, PLL_SRC_OSC0, 2, 96000000 / BOARD_OSC0_HZ); pll_enable(&pcfg, 0); sysclk_set_prescalers(0, 0, 0, 0, 0); pll_wait_for_lock(0); sysclk_set_source(SYSCLK_SRC_PLL0); /* GCLK according fs ratio */ genclk_enable_source(GENCLK_SRC_CLK_CPU); genclk_config_set_source(&gencfg, GENCLK_SRC_CLK_CPU); genclk_config_set_divider(&gencfg, 4); genclk_enable(&gencfg, IISC_GCLK_NUM); /* Set the configuration */ iis_get_config_defaults(&config); config.data_format = IIS_DATE_16BIT_COMPACT; config.slot_length = IIS_SLOT_LENGTH_16BIT; config.fs_ratio = IIS_FS_RATE_256; config.tx_channels = IIS_CHANNEL_STEREO; config.rx_channels = IIS_CHANNEL_STEREO; config.tx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS; config.rx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS; config.loopback = true; iis_init(&dev_inst, IISC, &config); /* Enable the IIS module. */ iis_enable(&dev_inst); /* Config PDCA module */ pdca_enable(PDCA); pdca_channel_set_config(PDCA_IISC_CHANNEL0, &pdca_iisc_config_tx); pdca_channel_set_config(PDCA_IISC_CHANNEL1, &pdca_iisc_config_rx); pdca_channel_write_load(PDCA_IISC_CHANNEL0, (void *)output_samples, SOUND_SAMPLES / 2); pdca_channel_write_load(PDCA_IISC_CHANNEL1, (void *)input_samples, SOUND_SAMPLES / 2); pdca_channel_enable(PDCA_IISC_CHANNEL0); pdca_channel_enable(PDCA_IISC_CHANNEL1); /* Enable the functions */ iis_enable_transmission(&dev_inst); iis_enable_clocks(&dev_inst); /** * Since the transfer and receive timing is not under control, we * need adjust here the enable sequence and add some delay * functions if it's needed. */ delay_us(20); iis_enable_reception(&dev_inst); while (!(pdca_get_channel_status(PDCA_IISC_CHANNEL1) == PDCA_CH_TRANSFER_COMPLETED)) { } /* Disable the PDCA module. */ pdca_channel_disable(PDCA_IISC_CHANNEL0); pdca_channel_disable(PDCA_IISC_CHANNEL1); pdca_disable(PDCA); /* Disable the IISC module. */ iis_disable(&dev_inst); for (i = 0; i < SOUND_SAMPLES; i++) { if (input_samples[i] != output_samples[i]) { flag = false; } } test_assert_true(test, flag == true, "Audio data did not match!"); }
//! //! @brief Entry point of the AK5394A task management //! void AK5394A_task(void *pvParameters) { portTickType xLastWakeTime; xLastWakeTime = xTaskGetTickCount(); int i; while (TRUE) { // All the hardwork is done by the pdca and the interrupt handler. // Just check whether sampling freq is changed, to do rate change etc. vTaskDelayUntil(&xLastWakeTime, configTSK_AK5394A_PERIOD); if (freq_changed){ if (current_freq.frequency == 96000){ pdca_disable_interrupt_reload_counter_zero(PDCA_CHANNEL_SSC_RX); pdca_disable(PDCA_CHANNEL_SSC_RX); gpio_set_gpio_pin(AK5394_DFS0); // L H -> 96khz gpio_clr_gpio_pin(AK5394_DFS1); pm_gc_disable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_GCLK1, // gc 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 1, // diven - enabled 0); // divided by 2. Therefore GCLK1 = 6.144Mhz pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); if (Is_usb_full_speed_mode()) FB_rate = 96 << 14; else FB_rate = (96) << 13; } else if (current_freq.frequency == 192000) { pdca_disable_interrupt_reload_counter_zero(PDCA_CHANNEL_SSC_RX); pdca_disable(PDCA_CHANNEL_SSC_RX); gpio_clr_gpio_pin(AK5394_DFS0); // H L -> 192khz gpio_set_gpio_pin(AK5394_DFS1); pm_gc_disable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_GCLK1, // gc 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 0, // diven - disabled 0); // GCLK1 = 12.288Mhz pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); if (Is_usb_full_speed_mode()) FB_rate = 192 << 14; else FB_rate = (192) << 13; } else if (current_freq.frequency == 48000) // 48khz { pdca_disable_interrupt_reload_counter_zero(PDCA_CHANNEL_SSC_RX); pdca_disable(PDCA_CHANNEL_SSC_RX); gpio_clr_gpio_pin(AK5394_DFS0); // L L -> 48khz gpio_clr_gpio_pin(AK5394_DFS1); pm_gc_disable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_GCLK1, // gc 0, // osc_or_pll: use Osc (if 0) or PLL (if 1) 1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1 1, // diven - enabled 1); // divided by 4. Therefore GCLK1 = 3.072Mhz pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_GCLK1); if (Is_usb_full_speed_mode()) FB_rate = 48 << 14; else FB_rate = (48) << 13; } // re-sync SSC to LRCK // Wait for the next frame synchronization event // to avoid channel inversion. Start with left channel - FS goes low // However, the channels are reversed at 192khz if (current_freq.frequency == 192000) { while (gpio_get_pin_value(AK5394_LRCK)); while (!gpio_get_pin_value(AK5394_LRCK)); // exit when FS goes high } else { while (!gpio_get_pin_value(AK5394_LRCK)); while (gpio_get_pin_value(AK5394_LRCK)); // exit when FS goes low } // Enable now the transfer. pdca_enable(PDCA_CHANNEL_SSC_RX); // Init PDCA channel with the pdca_options. pdca_init_channel(PDCA_CHANNEL_SSC_RX, &PDCA_OPTIONS); // init PDCA channel with options. pdca_enable_interrupt_reload_counter_zero(PDCA_CHANNEL_SSC_RX); // reset freq_changed flag freq_changed = FALSE; } if (usb_alternate_setting_out_changed){ if (usb_alternate_setting_out != 1){ for (i = 0; i < SPK_BUFFER_SIZE; i++){ spk_buffer_0[i] = 0; spk_buffer_1[i] = 0; } }; usb_alternate_setting_out_changed = FALSE; } } }
bool standalone_mode_run(void) { char tempstring1[24]; while(detect_lcd()==false); usart_write_line(LCD_USART, "play stndprog\r\n"); while(detect_lcd()==false); usart_write_line(LCD_USART, "DMETER_VALUE 1 1\r\n"); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 2 %u\r\n",t_experiment.N_experiments); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); usart_write_line(LCD_USART, "DMETER_VALUE 3 1\r\n"); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 4 %u\r\n",t_experiment.N_sequences); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); reset_SD_sink_ptr(); //start saving data at data_base_addr DAC1->dr0=t_experiment.t_Vgain; //set gain of RF amp tc_write_rc(SLOW_TC,SLOW_TC_slow_CHANNEL,t_experiment.t_sequence[0].t_TR); tc_start(SLOW_TC, SLOW_TC_slow_CHANNEL); //start slow timer tc_start(SLOW_TC, SLOW_TC_fast_CHANNEL); //start slow timer pdca_disable(USB_USART_RX_PDCA_CHANNEL); //Not going to need USB USART for a while pdca_disable(USB_USART_TX_PDCA_CHANNEL); bool progscreen=true; //state variable for user interface for(uint16_t experimentcount=0;experimentcount<t_experiment.N_experiments;experimentcount++) { for(uint8_t sequencecount=0;sequencecount<t_experiment.N_sequences;sequencecount++) { t_currentsequence=t_experiment.t_sequence[sequencecount]; //get sequence while((tc_read_sr(SLOW_TC, SLOW_TC_slow_CHANNEL) & AVR32_TC_SR1_CPCS_MASK)==0); tc_write_rc(SLOW_TC,SLOW_TC_slow_CHANNEL,t_experiment.t_sequence[sequencecount].t_TR); char *LCDCMD=get_LCD_cmd(); if((progscreen==true) && (strcmp(LCDCMD,"BR2\r")==0)) //BR2 is first cancel button { progscreen=false; usart_write_line(LCD_USART, "play confcanc\r\n"); while(detect_lcd()==false); } else if((progscreen==false) && (strcmp(LCDCMD,"BR3\r")==0)) //BR3 is confirm cancel button { usart_write_line(LCD_USART, "play modesel\r\n"); //maybe modsel isn't necessary here, but will be done after return? return false; } else if((progscreen==false) && (strcmp(LCDCMD,"BR1\r")==0)) //BR1 if resume button { progscreen=true; usart_write_line(LCD_USART, "play stndprog\r\n"); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 1 %u\r",(experimentcount+1)); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 2 %u\r",t_experiment.N_experiments); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 3 %u\r",(sequencecount+1)); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); sprintf(tempstring1,"DMETER_VALUE 4 %u\r",t_experiment.N_sequences); usart_write_line(LCD_USART, tempstring1); while(detect_lcd()==false); } else if(progscreen==true) { sprintf(tempstring1,"DMETER_VALUE 1 %u\r",(experimentcount+1)); gpio_set_gpio_pin(GEN1_pin); usart_write_line(LCD_USART, tempstring1); while(wait_for_CR()==false); gpio_clr_gpio_pin(GEN1_pin); sprintf(tempstring1,"DMETER_VALUE 3 %u\r",(sequencecount+1)); gpio_set_gpio_pin(GEN1_pin); usart_write_line(LCD_USART, tempstring1); while(wait_for_CR()==false); gpio_clr_gpio_pin(GEN1_pin); } executesequence_SDstorage_multiprep_combined(); } } return true; }
/** * \brief Copy pixels from SRAM to the screen * * Used to copy a large quantitative of data to the screen in one go. * * Limits have to be set prior to calling this function, e.g.: * \code * ili9341_set_top_left_limit(0, 0); * ili9341_set_bottom_right_limit(320, 240); * ... * \endcode * * \param pixels Pointer to the pixel data * \param count Number of pixels to copy to the screen */ void ili9341_copy_pixels_to_screen(const ili9341_color_t *pixels, uint32_t count) { const ili9341_color_t *pixel = pixels; /* Sanity check to make sure that the pixel count is not zero */ Assert(count > 0); ili9341_send_command(ILI9341_CMD_MEMORY_WRITE); #if defined(ILI9341_DMA_ENABLED) ili9341_color_t chunk_buf[ILI9341_DMA_CHUNK_SIZE]; uint32_t chunk_len; # if SAM Pdc *SPI_DMA = spi_get_pdc_base(CONF_ILI9341_SPI); pdc_packet_t spi_pdc_data; pdc_enable_transfer(SPI_DMA, PERIPH_PTCR_TXTEN); spi_pdc_data.ul_addr = (uint32_t)chunk_buf; # elif UC3 pdca_set_transfer_size(CONF_ILI9341_PDCA_CHANNEL, PDCA_TRANSFER_SIZE_BYTE); pdca_set_peripheral_select(CONF_ILI9341_PDCA_CHANNEL, CONF_ILI9341_PDCA_PID); # endif while (count) { /* We need to copy out the data to send in chunks into RAM, as the PDC * does not allow FLASH->Peripheral transfers */ chunk_len = min(ILI9341_DMA_CHUNK_SIZE, count); /* Wait for pending transfer to complete */ ili9341_wait_for_send_done(); for (uint32_t i = 0; i < chunk_len; i++) { chunk_buf[i] = le16_to_cpu(pixel[i]); } # if SAM spi_pdc_data.ul_size = (uint32_t)sizeof(ili9341_color_t) * chunk_len; pdc_tx_init(SPI_DMA, NULL, &spi_pdc_data); # elif UC3 pdca_reload_channel(CONF_ILI9341_PDCA_CHANNEL, chunk_buf, (uint32_t)sizeof(ili9341_color_t) * chunk_len); pdca_enable(CONF_ILI9341_PDCA_CHANNEL); # endif pixel += chunk_len; count -= chunk_len; } ili9341_wait_for_send_done(); ili9341_deselect_chip(); # if SAM pdc_disable_transfer(SPI_DMA, PERIPH_PTCR_TXTEN); # elif UC3 pdca_disable(CONF_ILI9341_PDCA_CHANNEL); # endif #else while (count--) { ili9341_send_byte(*pixel); ili9341_send_byte(*pixel >> 8); pixel++; } ili9341_wait_for_send_done(); ili9341_deselect_chip(); #endif }
void idle(void) { while(1) { uint8_t tempmode=0; while(tempmode==0) //wait until a command has been received { if(lcdinit==false) //check for LCD { if(detect_lcd()==true) { usart_write_line(LCD_USART, "play modesel\r\n"); lcdinit=true; } } tempmode=idle_getmode(); } uint8_t tempsd=check_SD(); switch(tempmode) { case start_hostmode: if(tempsd!=SD_card_valid) { usart_write_line(USB_USART, "bad SD card\n"); } else { usart_write_line(USB_USART, "good SD card\n"); hostmode_run(); //go to host execution } break; case select_standalone: if(tempsd==SD_card_valid) { //valid SD card detected //retrieve experiment from SD card my_SD_read_experiment_PDCA(experiment_base_address,(uint32_t)(&experiment.MODE), (uint32_t)(&bank0[0]), sizeof(experiment), blocks_per_cluster); if(validate_sequences()==false) { //sequence was not valid usart_write_line(LCD_USART, "play badexp\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); } else { //sequence was valid usart_write_line(LCD_USART, "play goodexp\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); standalone_mode_run(); //re-enable USB USART to receive commands from host pdca_load_channel(USB_USART_RX_PDCA_CHANNEL, (&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer))); pdca_enable(USB_USART_RX_PDCA_CHANNEL); USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set to not start counting again until after new character is received USB_USART->rtor=15000; //baud rate is 3mbaud, so 15000 gives 5ms timeout usart_write_line(LCD_USART, "play modesel\r\n"); //will eventually have branch here to cancel, examine experiment, or proceed } } else if(tempsd==SD_card_not_inserted) { //no SD card inserted usart_write_line(LCD_USART, "play noSD\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); } else if(tempsd==SD_card_init_failed) { //SD card failed to init usart_write_line(LCD_USART, "play SDerr\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); } else if(tempsd==SD_card_invalid) { //SD card init but not valid usart_write_line(LCD_USART, "play badSD\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); } break; case select_checkSD: switch (tempsd) { case SD_card_valid: usart_write_line(LCD_USART, "play goodSD\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); break; case SD_card_not_inserted: usart_write_line(LCD_USART, "play noSD\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); break; case SD_card_init_failed: usart_write_line(LCD_USART, "play SDerr\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); break; case SD_card_invalid: usart_write_line(LCD_USART, "play badSD\r\n"); while(strcmp(get_LCD_cmd(),"BR2\r")!=0); usart_write_line(LCD_USART, "play modesel\r\n"); break; } break; case program_experiment: if(tempsd!=SD_card_valid) { usart_write_line(USB_USART, "bad SD card\n"); } else { usart_write_line(USB_USART, "good SD card\n"); get_experiment_from_host_to_SD(); my_SD_read_experiment_PDCA(experiment_base_address,(uint32_t)(&experiment.MODE), (uint32_t)(&bank1[0]), sizeof(experiment), blocks_per_cluster); if(validate_sequences()==true) { usart_write_line(USB_USART, "goodexp\n"); } else { usart_write_line(USB_USART, "badexp\n"); } } break; case get_data: if(tempsd!=SD_card_valid) { usart_write_line(USB_USART, "bad SD card\n"); //if SD card is bad, say so and return } else {//if SD card is good, say so. Then read the experiment and validate it usart_write_line(USB_USART, "good SD card\n"); //this will read in entire first cluster of SD my_SD_read_experiment_PDCA(experiment_base_address,(uint32_t)(&experiment.MODE), (uint32_t)(&bank1[0]), sizeof(experiment), blocks_per_cluster); if(validate_sequences()==true) { //if experiment is valid, say so, then get true experiment usart_write_line(USB_USART, "goodexperiment\n"); gettruesequence(); //send entire cluster's worth of data to host. this will start with experiment and also include other "stuff" in the first cluster pdca_disable(USB_USART_TX_PDCA_CHANNEL);//goin to set up PDCA to send all of experiment, then start reading out bank1 until an entire cluster has been written my_pdca_init_channel(USB_USART_TX_PDCA_CHANNEL, (uint32_t)(&experiment.MODE),(uint32_t)(sizeof(experiment)), USB_USART_TX_PDCA_PID, (uint32_t)(&bank1[0]), (blocks_per_cluster*512-(uint32_t)(sizeof(experiment))), PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_TX_PDCA_CHANNEL); while(!(pdca_get_transfer_status(USB_USART_TX_PDCA_CHANNEL) & AVR32_PDCA_TRC_MASK)); //wait until transfer is done pdca_disable(USB_USART_TX_PDCA_CHANNEL); for(uint8_t i=0;i<Nsequences_max;i++) { usart_putchar(USB_USART,(uint8_t)(t_experiment.t_sequence[i].clusters_per_sequence)); } uint32_t SD_read_ptr=data_base_address; //now need to send actual data for(uint8_t i=0;i<t_experiment.N_experiments;i++) { for(uint8_t j=0;j<t_experiment.N_sequences;j++) { while(strcmp(get_HOST_cmd(),"SEND SEQUENCE\n")!=0); //wait for host to ask for each sequence send_data_to_host(SD_read_ptr,t_experiment.t_sequence[j].clusters_per_sequence); SD_read_ptr+=t_experiment.t_sequence[j].clusters_per_sequence*blocks_per_cluster*bytes_per_block; } } } else { usart_write_line(USB_USART, "badexperiment\n"); } } break; } } }
uint8_t check_SD(void) { if(SD_card_inserted()==false) { return SD_card_not_inserted; } spi_options_t SD_spiOptions = { .reg = SD_MMC_SPI_NPCS, .baudrate = SD_SPI_SPEED, // Defined in conf_sd_mmc_spi.h. .bits = 8, // Defined in conf_sd_mmc_spi.h. .spck_delay = 0, .trans_delay = 0, .stay_act = 1, .spi_mode = 0, .modfdis = 1 }; if(sd_mmc_spi_init(SD_spiOptions, PBA_SPEED)==false) { return SD_card_init_failed; } if(card_type!=SD_CARD_2_SDHC) { return SD_card_invalid; } return SD_card_valid; } bool SD_card_inserted(void) { if(gpio_get_pin_value(SD_detect_pin)==0) { return true; } else { return false; } } uint8_t hostmode_run(void) { //first receive and verify full experiment //set USB PDCA to store experiment USB_USART->rtor=0; //disable timeout pdca_disable(USB_USART_RX_PDCA_CHANNEL); my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&experiment.MODE),(uint32_t)(sizeof(experiment)), USB_USART_RX_PDCA_PID, 0, 0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_RX_PDCA_CHANNEL); while(!(pdca_get_transfer_status(USB_USART_RX_PDCA_CHANNEL) & AVR32_PDCA_TRC_MASK)); //wait until transfer is done if(validate_sequences()==false) { usart_write_line(USB_USART, "badexp\n"); usart_putchar(USB_USART,(uint8_t)(get_experiment_problem())); my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_RX_PDCA_CHANNEL); USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received USB_USART->rtor=15000; //set to timeout in 1ms return 0; } usart_write_line(USB_USART, "goodexp\n"); pdca_disable(USB_USART_TX_PDCA_CHANNEL); gettruesequence(); my_pdca_init_channel(USB_USART_TX_PDCA_CHANNEL, (uint32_t)(&experiment.MODE),(uint32_t)(sizeof(experiment)), USB_USART_TX_PDCA_PID, 0, 0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_TX_PDCA_CHANNEL); while(!(pdca_get_transfer_status(USB_USART_TX_PDCA_CHANNEL) & AVR32_PDCA_TRC_MASK)); //wait until transfer is done pdca_disable(USB_USART_TX_PDCA_CHANNEL); //change back USB USART to accept command tokens my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_RX_PDCA_CHANNEL); for(uint8_t i=0;i<Nsequences_max;i++) { usart_putchar(USB_USART,(uint8_t)(t_experiment.t_sequence[i].clusters_per_sequence)); } USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received USB_USART->rtor=15000; //set to timeout in 1ms reset_SD_sink_ptr(); uint32_t SD_read_ptr=data_base_address; DAC1->dr0=t_experiment.t_Vgain; //set gain of RF amp while(1) //once in host mode, this will run until a restart command is received { char *HOSTCMD="false"; while(strcmp(HOSTCMD,"false")==0) { HOSTCMD=get_HOST_cmd(); if(strcmp((HOSTCMD+1),"sequencetoken")==0) { uint8_t sequenceindex=*HOSTCMD; t_currentsequence=t_experiment.t_sequence[sequenceindex]; executesequence_SDstorage_multiprep_combined(); if(did_data_fail()) { usart_write_line(USB_USART, "fail\n"); usart_putchar(USB_USART,(uint8_t)(get_failure_cause())); usart_putchar(USB_USART,(uint8_t)(get_saved_r1())); } else { usart_write_line(USB_USART, "good\n"); send_data_to_host(SD_read_ptr,t_currentsequence.clusters_per_sequence); } SD_read_ptr+=t_currentsequence.clusters_per_sequence*blocks_per_cluster*bytes_per_block; //set back to command mode pdca_disable(USB_USART_RX_PDCA_CHANNEL); my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE); pdca_enable(USB_USART_RX_PDCA_CHANNEL); USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received USB_USART->rtor=15000; //set to timeout in 1ms } else if(strcmp((HOSTCMD),"RESTART\n")==0) { //want to handle start of new host mode experiment return 1; } } } return 1; }
/** * \brief Set a given number of pixels to the same color * * Use this function to write a certain number of pixels to the same color * within a set limit. * * Limits have to be set prior to calling this function, e.g.: * \code * ili9341_set_top_left_limit(0, 0); * ili9341_set_bottom_right_limit(320, 240); * ... * \endcode * * \param color The color to write to the display * \param count The number of pixels to write with this color */ void ili9341_duplicate_pixel(const ili9341_color_t color, uint32_t count) { /* Sanity check to make sure that the pixel count is not zero */ Assert(count > 0); ili9341_send_command(ILI9341_CMD_MEMORY_WRITE); #if defined(ILI9341_DMA_ENABLED) ili9341_color_t chunk_buf[ILI9341_DMA_CHUNK_SIZE]; uint32_t chunk_len; # if SAM Pdc *SPI_DMA = spi_get_pdc_base(CONF_ILI9341_SPI); pdc_packet_t spi_pdc_data; pdc_enable_transfer(SPI_DMA, PERIPH_PTCR_TXTEN); spi_pdc_data.ul_addr = (uint32_t)chunk_buf; # elif UC3 pdca_set_transfer_size(CONF_ILI9341_PDCA_CHANNEL, PDCA_TRANSFER_SIZE_BYTE); pdca_set_peripheral_select(CONF_ILI9341_PDCA_CHANNEL, CONF_ILI9341_PDCA_PID); # endif for (uint32_t i = 0; i < ILI9341_DMA_CHUNK_SIZE; i++) { chunk_buf[i] = le16_to_cpu(color); } while (count) { chunk_len = min(ILI9341_DMA_CHUNK_SIZE, count); ili9341_wait_for_send_done(); # if SAM spi_pdc_data.ul_size = (uint32_t)sizeof(ili9341_color_t) * chunk_len; pdc_tx_init(SPI_DMA, NULL, &spi_pdc_data); # elif UC3 pdca_reload_channel(CONF_ILI9341_PDCA_CHANNEL, chunk_buf, (uint32_t)sizeof(ili9341_color_t) * chunk_len); pdca_enable(CONF_ILI9341_PDCA_CHANNEL); # endif count -= chunk_len; } ili9341_wait_for_send_done(); ili9341_deselect_chip(); # if SAM pdc_disable_transfer(SPI_DMA, PERIPH_PTCR_TXTEN); # elif UC3 pdca_disable(CONF_ILI9341_PDCA_CHANNEL); # endif #else while (count--) { ili9341_send_byte(color); ili9341_send_byte(color >> 8); } ili9341_wait_for_send_done(); ili9341_deselect_chip(); #endif }
void aic23b_codec_start(uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void (*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) { #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI static const spi_options_t AIC23B_SPI_OPTIONS = { .reg = AIC23B_SPI_NPCS, .baudrate = AIC23B_SPI_MASTER_SPEED, .bits = AIC23B_CTRL_SIZE, .spck_delay = 0, .trans_delay = 0, .stay_act = 0, .spi_mode = 3, .modfdis = 1 }; spi_setupChipReg(AIC23B_SPI, &AIC23B_SPI_OPTIONS, pba_hz); #endif aic23b_codec_stop(); gpio_enable_module(AIC23B_SSC_CODEC_GPIO_MAP, sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0])); aic23b_pdc_t pdc; pdc.data = AIC23B_DEFAULT(AIC23B_PDC); pdc.off = 0; pdc.clk = 0; pdc.osc = 0; pdc.out = 0; pdc.dac = 0; pdc.adc = 0; #if (AIC23B_INPUT==AIC23B_INPUT_LINE) pdc.mic = 1; pdc.line = 0; #elif (AIC23B_INPUT==AIC23B_INPUT_MIC) pdc.mic = 0; pdc.line = 1; #else #error No Input defined in file 'conf_tlv320aic23b.h' #endif aic23b_set_power_down_state(pdc); aic23b_codec_setup(sample_rate_hz, num_channels, bits_per_sample, swap_channels, callback, callback_opt, pba_hz); aic23b_aapc_t aapc; aapc.data = AIC23B_DEFAULT(AIC23B_AAPC); #if (AIC23B_INPUT==AIC23B_INPUT_LINE) aapc.ste = 0; aapc.dac = 1; aapc.byp = 0; aapc.insel = 0; aapc.micm = 0; aapc.micb = 1; #elif (AIC23B_INPUT==AIC23B_INPUT_MIC) aapc.ste = 0; aapc.dac = 1; aapc.sta = 4; aapc.byp = 0; aapc.insel = 1; aapc.micm = 0; aapc.micb = 1; #else #error No Input defined in file 'conf_tlv320aic23b.h' #endif aic23b_set_analog_audio_path(aapc); aic23b_dapc_t dapc; dapc.data = AIC23B_DEFAULT(AIC23B_DAPC); dapc.dacm = 0; dapc.deemp = AIC23B_DAPC_DEEMP_NONE; dapc.adchp = 0; aic23b_set_digital_audio_path(dapc); aic23b_llicvc_t llivc; llivc.data = AIC23B_DEFAULT(AIC23B_LLICVC); llivc.liv = 20; llivc.lim = 0; llivc.lrs = 1; aic23b_write_reg(AIC23B_LLICVC, llivc.data); aic23b_rlicvc_t rlivc; rlivc.data = AIC23B_DEFAULT(AIC23B_RLICVC); rlivc.riv = 20; rlivc.rim = 0; rlivc.rls = 1; aic23b_write_reg(AIC23B_RLICVC, rlivc.data); INTC_register_interrupt(&aic23b_ssc_rx_pdca_int_handler, AIC23B_SSC_RX_PDCA_IRQ, AIC23B_SSC_RX_PDCA_INT_LEVEL); // set an acceptable start volume aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL, -30, true); aic23b_activate_dig_audio(true); INTC_register_interrupt(&aic23b_ssc_tx_pdca_int_handler, AIC23B_SSC_TX_PDCA_IRQ, AIC23B_SSC_TX_PDCA_INT_LEVEL); } void aic23b_codec_setup(uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void (*callback)(uint32_t opt), uint32_t callback_opt, uint32_t pba_hz) { uint32_t master_clock = AIC23B_MCLK_HZ; // default configuration // Change the CPU frequency // //Disable_global_interrupt(); // Switch to OSC0 during OSC1 transition //pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP); // Switch to PLL0 as the master clock //pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0); if (sample_rate_hz < (8000 + 8021) / 2) { // 8000 Hz } else if (sample_rate_hz < (8021 + 32000) / 2) { // 8021 Hz } else if (sample_rate_hz < (32000 + 44100) / 2) { // 32000 Hz master_clock = usb_stream_resync_frequency = 8192000; cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency, FOSC0)); pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(8192000); } else if (sample_rate_hz < (44100 + 48000) / 2) { // 44100 Hz master_clock = usb_stream_resync_frequency = 11289600; cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency, FOSC0)); pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(11289600); } else if (sample_rate_hz < (48000 + 88200) / 2) { // 48000 Hz master_clock = usb_stream_resync_frequency = 12288000; cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency, FOSC0)); pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(12288000); } else if (sample_rate_hz < (88200 + 96000) / 2) { // 88200 Hz } else { // 96000 Hz } //Enable_global_interrupt(); ssc_i2s_init(AIC23B_SSC, sample_rate_hz, bits_per_sample, (bits_per_sample <= 16) ? 16 : (bits_per_sample <= 20) ? 20 : (bits_per_sample <= 24) ? 24 : 32, SSC_I2S_MODE_STEREO_OUT_STEREO_IN, pba_hz); pdca_channel_options_t aic23b_ssc_pdca_options_rx = { .addr = NULL, .size = 0, .r_addr = NULL, .r_size = 0, .pid = AIC23B_SSC_RX_PDCA_PID, .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE : (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD : PDCA_TRANSFER_SIZE_WORD }; pdca_init_channel(AIC23B_SSC_RX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_rx); pdca_enable(AIC23B_SSC_RX_PDCA_CHANNEL); pdca_channel_options_t aic23b_ssc_pdca_options_tx = { .addr = NULL, .size = 0, .r_addr = NULL, .r_size = 0, .pid = AIC23B_SSC_TX_PDCA_PID, .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE : (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD : PDCA_TRANSFER_SIZE_WORD }; pdca_init_channel(AIC23B_SSC_TX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_tx); pdca_enable(AIC23B_SSC_TX_PDCA_CHANNEL); // Set codec frequency aic23b_configure_freq(master_clock, sample_rate_hz); aic23b_daif_t daif; daif.data = AIC23B_DEFAULT(AIC23B_DAIF); daif.ms = AIC23B_DAIF_MS_SLAVE; daif.lrswap = swap_channels; daif.lrp = 0; daif.iwl = (bits_per_sample <= 16) ? AIC23B_DAIF_IWL_16 : (bits_per_sample <= 20) ? AIC23B_DAIF_IWL_20 : (bits_per_sample <= 24) ? AIC23B_DAIF_IWL_24 : AIC23B_DAIF_IWL_32; daif.fmt = AIC23B_DAIF_FMT_I2S; aic23b_write_reg(AIC23B_DAIF, daif.data); aic23b_output_params.num_channels = num_channels; aic23b_output_params.callback = callback; aic23b_output_params.callback_opt = callback_opt; } void aic23b_codec_flush(void) { pdca_disable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL); while (!(pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)); pdca_disable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL); while (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)); } void aic23b_codec_stop(void) { aic23b_codec_flush(); aic23b_reset(); aic23b_pdc_t pdc; pdc.data = AIC23B_DEFAULT(AIC23B_PDC); pdc.off = 1; pdc.clk = 1; pdc.osc = 1; pdc.out = 1; pdc.dac = 1; pdc.adc = 1; pdc.mic = 1; pdc.line = 1; aic23b_set_power_down_state(pdc); pdca_disable(AIC23B_SSC_RX_PDCA_CHANNEL); pdca_disable(AIC23B_SSC_TX_PDCA_CHANNEL); ssc_i2s_reset(AIC23B_SSC); gpio_enable_gpio(AIC23B_SSC_CODEC_GPIO_MAP, sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0])); aic23b_output_params.num_channels = 0; aic23b_output_params.callback = NULL; aic23b_output_params.callback_opt = 0; }
static void tc_init_fast(volatile avr32_tc_t *tc) { // Options for waveform generation. static const tc_waveform_opt_t waveform_opt_1 = { .channel = FAST_TC_CHANNEL, // Channel selection. .bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB. .beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB. .bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB. .bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB. .aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA. .aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA. .acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA. .acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA. .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset) .enetrg = false, //// External event trigger enable. .eevt = 0, //// External event selection. .eevtedg = TC_SEL_NO_EDGE, //// External event edge selection. .cpcdis = false, // Counter disable when RC compare. .cpcstop = false, // Counter clock stopped with RC compare. .burst = false, // Burst signal selection .clki = false, // Clock inversion. .tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8. }; // Options for enabling TC interrupts static const tc_interrupt_t tc_interrupt = { .etrgs = 0, .ldrbs = 0, .ldras = 0, .cpcs = 1, // Enable interrupt on RC compare alone .cpbs = 0, .cpas = 0, .lovrs = 0, .covfs = 0 }; // Initialize the timer/counter. tc_init_waveform(tc, &waveform_opt_1); tc_write_rc(tc, FAST_TC_CHANNEL, 10); // configure the timer interrupt tc_configure_interrupts(tc, FAST_TC_CHANNEL, &tc_interrupt); } static void tc_init_slow(volatile avr32_tc_t *tc) { // Options for waveform generation. static const tc_waveform_opt_t waveform_opt_2 = { .channel = SLOW_TC_fast_CHANNEL, // Channel selection. .bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB. .beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB. .bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB. .bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB. .aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA. .aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA. .acpc = TC_EVT_EFFECT_CLEAR, // RC compare effect on TIOA. .acpa = TC_EVT_EFFECT_SET, // RA compare effect on TIOA. .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset) .enetrg = false, // External event trigger enable. .eevt = 0, // External event selection. .eevtedg = TC_SEL_NO_EDGE, // External event edge selection. .cpcdis = false, // Counter disable when RC compare. .cpcstop = false, // Counter clock stopped with RC compare. .burst = false, // Burst signal selection. .clki = false, // Clock inversion. .tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8. }; // Initialize the timer/counter. tc_init_waveform(tc, &waveform_opt_2); tc_write_rc(tc, SLOW_TC_fast_CHANNEL, 7500); //counter will count milliseconds tc_write_ra(tc, SLOW_TC_fast_CHANNEL, 3500); //configure ra so that TIOA0 is toggled static const tc_waveform_opt_t waveform_opt_3 = { .channel = SLOW_TC_slow_CHANNEL, // Channel selection. .bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB. .beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB. .bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB. .bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB. .aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA. .aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA. .acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA. .acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA. .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset) .enetrg = false, //// External event trigger enable. .eevt = 0, //// External event selection. .eevtedg = TC_SEL_NO_EDGE, //// External event edge selection. .cpcdis = false, // Counter disable when RC compare. .cpcstop = false, // Counter clock stopped with RC compare. .burst = false, // Burst signal selection. .clki = false, // Clock inversion. .tcclks = TC_CLOCK_SOURCE_XC0 // Use XC1 as clock source. Must configure TIOA0 to be XC1 }; tc_init_waveform(tc, &waveform_opt_3); tc_write_rc(tc, SLOW_TC_slow_CHANNEL, 100); // tc_select_external_clock(tc,SLOW_TC_slow_CHANNEL,AVR32_TC_BMR_TC0XC0S_TIOA1); //use TIOA1 as XC0 } static void configure_hmatrix(uint32_t mode) { // Configure all Slave in Last Default Master #if (defined AVR32_HMATRIX) for(uint32_t i = 0; i < AVR32_HMATRIX_SLAVE_NUM; i++) { AVR32_HMATRIX.SCFG[i].defmstr_type = mode; } #endif #if (defined AVR32_HMATRIXB) for(uint32_t i = 0;i < AVR32_HMATRIXB_SLAVE_NUM; i++) { AVR32_HMATRIXB.SCFG[i].defmstr_type = mode; } #endif } void board_init(void) { /* This function is meant to contain board-specific initialization code * for, e.g., the I/O pins. The initialization can rely on application- * specific board configuration, found in conf_board.h. */ gpio_local_init(); static pcl_freq_param_t pcl_freq_param = { .cpu_f = CPU_SPEED, .pba_f = PBA_SPEED, .osc0_f = FOSC0, .osc0_startup = OSC0_STARTUP }; if (pcl_configure_clocks(&pcl_freq_param) != PASS) while (true); configure_hmatrix(AVR32_HMATRIXB_DEFMSTR_TYPE_NO_DEFAULT); AVR32_LowLevelInit(); //configure all GPIO gpio_local_enable_pin_output_driver(ADC_CONV_pin); gpio_local_clr_gpio_pin(ADC_CONV_pin); gpio_local_enable_pin_output_driver(DDS_IOUD_pin); gpio_local_clr_gpio_pin(DDS_IOUD_pin); gpio_local_enable_pin_output_driver(DDS_RESET_pin); gpio_local_clr_gpio_pin(DDS_RESET_pin); gpio_local_enable_pin_output_driver(DDS_PDN_pin); gpio_local_set_gpio_pin(DDS_PDN_pin); gpio_local_enable_pin_output_driver(DDS_P0_pin); gpio_local_clr_gpio_pin(DDS_P0_pin); gpio_local_enable_pin_output_driver(DDS_P1_pin); gpio_local_clr_gpio_pin(DDS_P1_pin); gpio_local_enable_pin_output_driver(DDS_P2_pin); gpio_local_clr_gpio_pin(DDS_P2_pin); gpio_local_enable_pin_output_driver(DDS_P3_pin); gpio_local_clr_gpio_pin(DDS_P3_pin); gpio_local_enable_pin_output_driver(RXSW_pin); gpio_local_clr_gpio_pin(RXSW_pin); gpio_local_enable_pin_output_driver(TXSW_pin); gpio_local_clr_gpio_pin(TXSW_pin); gpio_local_enable_pin_output_driver(TPAbias_pin); gpio_local_clr_gpio_pin(TPAbias_pin); gpio_local_enable_pin_output_driver(GEN1_pin); gpio_local_clr_gpio_pin(GEN1_pin); gpio_local_enable_pin_output_driver(GEN2_pin); gpio_local_clr_gpio_pin(GEN2_pin); gpio_local_enable_pin_output_driver(PWM0_pin); gpio_local_clr_gpio_pin(PWM0_pin); gpio_local_disable_pin_output_driver(SD_detect_pin); //configure all peripheral IO static const gpio_map_t GCLK_GPIO_MAP = { {AVR32_SCIF_GCLK_0_1_PIN, AVR32_SCIF_GCLK_0_1_FUNCTION} }; gpio_enable_module(GCLK_GPIO_MAP, sizeof(GCLK_GPIO_MAP) / sizeof(GCLK_GPIO_MAP[0])); genclk_enable_config(9, GENCLK_SRC_CLK_CPU, 2); static const gpio_map_t SPI_GPIO_MAP = { {SPI1_SCK_PIN, SPI1_SCK_FUNCTION}, {SPI1_MOSI_PIN, SPI1_MOSI_FUNCTION}, {SPI1_MISO_PIN, SPI1_MISO_FUNCTION}, {SPI1_NPCS2_PIN, SPI1_NPCS2_FUNCTION} }; gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0])); spi_options_t SPI1_OPTIONS_0 = { .reg = 0, //! The SPI channel to set up. .baudrate = 30000000, //! Preferred baudrate for the SPI. .bits =16, //! Number of bits in each character (8 to 16). .spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods). .trans_delay =0, //! Delay between each transfer/character (in PBA clock periods). .stay_act =0, //! Sets this chip to stay active after last transfer to it. .spi_mode =1, //! Which SPI mode to use when transmitting. .modfdis =1 //! Disables the mode fault detection. }; spi_options_t SPI1_OPTIONS_3 = { .reg = 3, //! The SPI channel to set up. .baudrate = 30000000, //! Preferred baudrate for the SPI. .bits =8, //! Number of bits in each character (8 to 16). .spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods). .trans_delay =0, //! Delay between each transfer/character (in PBA clock periods). .stay_act =1, //! Sets this chip to stay active after last transfer to it. .spi_mode =0, //! Which SPI mode to use when transmitting. .modfdis =1 //! Disables the mode fault detection. }; spi_initMaster(SPI1, &SPI1_OPTIONS_0); spi_selectionMode(SPI1,1,0,0); spi_enable(SPI1); spi_setupChipReg(SPI1,&SPI1_OPTIONS_0,PBA_SPEED); spi_setupChipReg(SPI1,&SPI1_OPTIONS_3,PBA_SPEED); spi_selectChip(SPI1, 3); static const gpio_map_t USB_USART_GPIO_MAP = { {USB_USART_RX_PIN, USB_USART_RX_FUNCTION}, {USB_USART_TX_PIN, USB_USART_TX_FUNCTION}, {USB_USART_RTS_PIN, USB_USART_RTS_FUNCTION}, {USB_USART_CTS_PIN, USB_USART_CTS_FUNCTION} }; gpio_enable_module(USB_USART_GPIO_MAP, sizeof(USB_USART_GPIO_MAP) / sizeof(USB_USART_GPIO_MAP[0])); static const usart_options_t USB_USART_OPTIONS = { .baudrate = 3000000, .charlength = 8, .paritytype = USART_NO_PARITY, .stopbits = USART_1_STOPBIT, .channelmode = USART_NORMAL_CHMODE }; usart_init_hw_handshaking(USB_USART, &USB_USART_OPTIONS, PBA_SPEED); static const gpio_map_t LCD_USART_GPIO_MAP = { {LCD_USART_RX_PIN, LCD_USART_RX_FUNCTION}, {LCD_USART_TX_PIN, LCD_USART_TX_FUNCTION} }; gpio_enable_module(LCD_USART_GPIO_MAP, sizeof(LCD_USART_GPIO_MAP) / sizeof(LCD_USART_GPIO_MAP[0])); static const usart_options_t LCD_USART_OPTIONS = { .baudrate = 115200, .charlength = 8, .paritytype = USART_NO_PARITY, .stopbits = USART_1_STOPBIT, .channelmode = USART_NORMAL_CHMODE }; usart_init_rs232(LCD_USART, &LCD_USART_OPTIONS, PBA_SPEED); LCD_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received LCD_USART->rtor=230; //set to timeout in 2ms my_pdca_init_channel(LCD_USART_RX_PDCA_CHANNEL, (uint32_t)(&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer)),LCD_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE); pdca_disable(LCD_USART_RX_PDCA_CHANNEL); my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE); pdca_disable(USB_USART_RX_PDCA_CHANNEL); USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received USB_USART->rtor=15000; //set to timeout in 1ms // GPIO pins used for SD/MMC interface static const gpio_map_t SD_MMC_SPI_GPIO_MAP = { {SPI0_SCK_PIN, SPI0_SCK_FUNCTION }, // SPI Clock. {SPI0_MISO_PIN, SPI0_MISO_FUNCTION}, // MISO. {SPI0_MOSI_PIN, SPI0_MOSI_FUNCTION}, // MOSI. {SPI0_NPCS0_PIN, SPI0_NPCS0_FUNCTION} // Chip Select NPCS. }; //SPI options. spi_options_t SD_spiOptions = { .reg = SD_MMC_SPI_NPCS, .baudrate = SD_SPI_SPEED, // Defined in conf_sd_mmc_spi.h. .bits = 8, // Defined in conf_sd_mmc_spi.h. .spck_delay = 0, .trans_delay = 0, .stay_act = 1, .spi_mode = 0, .modfdis = 1 }; // Assign I/Os to SPI. gpio_enable_module(SD_MMC_SPI_GPIO_MAP,sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0])); // Initialize as master. spi_initMaster(SPI0, &SD_spiOptions); // Set SPI selection mode: variable_ps, pcs_decode, delay. spi_selectionMode(SPI0, 0, 0, 0); // Enable SPI module. spi_enable(SPI0); // Initialize SD/MMC driver with SPI clock (PBA). sd_mmc_spi_init(SD_spiOptions, PBA_SPEED); tc_init_fast(FAST_TC); tc_init_slow(SLOW_TC); static const gpio_map_t DACIFB_GPIO_MAP = { {AVR32_DACREF_PIN,AVR32_DACREF_FUNCTION}, {AVR32_ADCREFP_PIN,AVR32_ADCREFP_FUNCTION}, {AVR32_ADCREFN_PIN,AVR32_ADCREFN_FUNCTION}, {DAC0A_pin, DAC0A_FUNCTION}, {DAC1A_pin, DAC1A_FUNCTION} }; gpio_enable_module(DACIFB_GPIO_MAP, sizeof(DACIFB_GPIO_MAP) / sizeof(DACIFB_GPIO_MAP[0])); dacifb_opt_t dacifb_opt = { .reference = DACIFB_REFERENCE_EXT , // VDDANA Reference .channel_selection = DACIFB_CHANNEL_SELECTION_A, // Selection Channels A&B .low_power = false, // Low Power Mode .dual = false, // Dual Mode .prescaler_clock_hz = DAC_PRESCALER_CLK // Prescaler Clock (Should be 500Khz) }; // DAC Channel Configuration dacifb_channel_opt_t dacifb_channel_opt = { .auto_refresh_mode = true, // Auto Refresh Mode .trigger_mode = DACIFB_TRIGGER_MODE_MANUAL, // Trigger selection .left_adjustment = false, // Right Adjustment .data_shift = 0, // Number of Data Shift .data_round_enable = false // Data Rouding Mode }; }; volatile avr32_dacifb_t *dacifb0 = &AVR32_DACIFB0; // DACIFB IP registers address volatile avr32_dacifb_t *dacifb1 = &AVR32_DACIFB1; // DACIFB IP registers address //The factory calibration for DADIFB is broken, so use manual calibration //dacifb_get_calibration_data(DAC0,&dacifb_opt,0); dacifb_opt.gain_calibration_value=0x0090; dacifb_opt.offset_calibration_value=0x0153; // configure DACIFB0 dacifb_configure(DAC0,&dacifb_opt,PBA_SPEED); dacifb_configure_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK); dacifb_start_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED); //The factory calibration for DADIFB is broken, so use manual calibration dacifb_set_value(DAC0,DACIFB_CHANNEL_SELECTION_A,false,1024); //dacifb_get_calibration_data(DAC1, &dacifb_opt,1); dacifb_opt.gain_calibration_value=0x0084; dacifb_opt.offset_calibration_value=0x0102; // configure DACIFB1 dacifb_configure(DAC1,&dacifb_opt,PBA_SPEED); dacifb_configure_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK); dacifb_start_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED); dacifb_set_value(DAC1,DACIFB_CHANNEL_SELECTION_A,false,1024); DAC0->dr0=2048; DAC1->dr0=4095; }