static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr,
u32 regnum, u16 data)
{
debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr,
regnum, data);
return phy_setup_op(priv, phy_addr, regnum,
ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data);
}
static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data)
{
debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr,
regnum, data);
if ((CONFIG_ZYNQ_GEM1_PHY_LESS == 1) && (phy_addr == CONFIG_ZYNQ_GEM_PHY_ADDR1))
return 0;
return phy_setup_op(dev, phy_addr, regnum,
ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data);
}
static u32 phyread(struct zynq_gem_priv *priv, u32 phy_addr,
u32 regnum, u16 *val)
{
u32 ret;
ret = phy_setup_op(priv, phy_addr, regnum,
ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val);
if (!ret)
debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__,
phy_addr, regnum, *val);
return ret;
}
static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val)
{
u32 ret;
if ((CONFIG_ZYNQ_GEM1_PHY_LESS == 1) && (phy_addr == CONFIG_ZYNQ_GEM_PHY_ADDR1)) {
*val = fake_phy_regs[regnum];
return 0;
}
ret = phy_setup_op(dev, phy_addr, regnum,
ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val);
if (!ret)
debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__,
phy_addr, regnum, *val);
return ret;
}
