static int nicintel_shutdown(void *data)
{
physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE);
physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE);
pci_cleanup(pacc);
return 0;
}
static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool readonly, bool autocleanup,
bool round)
{
void *virt_addr;
uintptr_t offset = 0;
if (len == 0) {
msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr);
return ERROR_PTR;
}
if (round)
offset = round_to_page_boundaries(&phys_addr, &len);
if (readonly)
virt_addr = sys_physmap_ro_cached(phys_addr, len);
else
virt_addr = sys_physmap_rw_uncached(phys_addr, len);
if (ERROR_PTR == virt_addr) {
if (NULL == descr)
descr = "memory";
msg_perr("Error accessing %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n",
descr, len, PRIxPTR_WIDTH, phys_addr);
msg_perr(MEM_DEV " mmap failed: %s\n", strerror(errno));
#ifdef __linux__
if (EINVAL == errno) {
msg_perr("In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),\n");
msg_perr("CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.\n");
msg_perr("Please check if either is enabled in your kernel before reporting a failure.\n");
msg_perr("You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n");
msg_perr("disabling the other option unfortunately requires a kernel recompile. Sorry!\n");
}
#elif defined (__OpenBSD__)
msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "
"and reboot, or reboot into\n"
"single user mode.\n");
#endif
return ERROR_PTR;
}
if (autocleanup) {
struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data));
if (d == NULL) {
msg_perr("%s: Out of memory!\n", __func__);
physunmap(virt_addr, len);
return ERROR_PTR;
}
d->virt_addr = virt_addr;
d->len = len;
if (register_shutdown(undo_physmap, d) != 0) {
msg_perr("%s: Could not register shutdown function!\n", __func__);
physunmap(virt_addr, len);
return ERROR_PTR;
}
}
return virt_addr + offset;
}
int ogp_spi_shutdown(void)
{
physunmap(ogp_spibar, 4096);
pci_cleanup(pacc);
release_io_perms();
return 0;
}
static int gfxnvidia_shutdown(void *data)
{
physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE);
/* Flash interface access is disabled (and screen enabled) automatically
* by PCI restore.
*/
pci_cleanup(pacc);
return 0;
}
static int undo_physmap(void *data)
{
if (data == NULL) {
msg_perr("%s: tried to physunmap without valid data!\n", __func__);
return 1;
}
struct undo_physmap_data *d = data;
physunmap(d->virt_addr, d->len);
free(data);
return 0;
}
int nicintel_init(void)
{
uintptr_t addr;
/* Needed only for PCI accesses on some platforms.
* FIXME: Refactor that into get_mem_perms/rget_io_perms/get_pci_perms?
*/
if (rget_io_perms())
return 1;
/* No need to check for errors, pcidev_init() will not return in case
* of errors.
* FIXME: BAR2 is not available if the device uses the CardBus function.
*/
addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel);
nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE);
if (nicintel_bar == ERROR_PTR)
goto error_out_unmap;
/* FIXME: Using pcidev_dev _will_ cause pretty explosions in the future. */
addr = pcidev_readbar(pcidev_dev, PCI_BASE_ADDRESS_0);
/* FIXME: This is not an aligned mapping. Use 4k? */
nicintel_control_bar = physmap("Intel NIC control/status reg",
addr, NICINTEL_CONTROL_MEMMAP_SIZE);
if (nicintel_control_bar == ERROR_PTR)
goto error_out;
if (register_shutdown(nicintel_shutdown, NULL))
return 1;
/* FIXME: This register is pretty undocumented in all publicly available
* documentation from Intel. Let me quote the complete info we have:
* "Flash Control Register: The Flash Control register allows the CPU to
* enable writes to an external Flash. The Flash Control Register is a
* 32-bit field that allows access to an external Flash device."
* Ah yes, we also know where it is, but we have absolutely _no_ idea
* what we should do with it. Write 0x0001 because we have nothing
* better to do with our time.
*/
pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR);
max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE;
register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL);
return 0;
error_out_unmap:
physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE);
error_out:
pci_cleanup(pacc);
return 1;
}
static int ogp_spi_shutdown(void *data)
{
physunmap(ogp_spibar, 4096);
return 0;
}
