/**
* @fn nm_bsp_reset
* @brief Reset NMC1500 SoC by setting CHIP_EN and RESET_N signals low,
* CHIP_EN high then RESET_N high
*/
void nm_bsp_reset(void)
{
pio_set_pin_low(CONF_WINC_PIN_CHIP_ENABLE);
pio_set_pin_low(CONF_WINC_PIN_RESET);
nm_bsp_sleep(100);
pio_set_pin_high(CONF_WINC_PIN_CHIP_ENABLE);
nm_bsp_sleep(10);
pio_set_pin_high(CONF_WINC_PIN_RESET);
nm_bsp_sleep(10);
}
static void sram_init(void)
{
/* Enable PMC clock for SMC */
pmc_enable_periph_clk(ID_SMC);
/* Complete SMC configuration between SRAM and SMC waveforms. */
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(1)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(6)
| SMC_PULSE_NCS_WR_PULSE(6)
| SMC_PULSE_NRD_PULSE(6)
| SMC_PULSE_NCS_RD_PULSE(6));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(7)
| SMC_CYCLE_NRD_CYCLE(7));
smc_set_mode(SMC, 0,
SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE |
SMC_MODE_DBW_8_BIT);
/* Configure LB, enable SRAM access */
pio_configure_pin(PIN_EBI_NLB, PIN_EBI_NLB_FLAGS);
/* Pull down LB, enable SRAM access */
pio_set_pin_low(PIN_EBI_NLB);
}
/**
* SCPI pin action: clr
*/
scpi_result_t pin_action_clr (uint32_t pin, uint32_t flags, const char *name)
{
if ((flags & PIO_TYPE_Msk) != PIO_OUTPUT_0 && (flags & PIO_TYPE_Msk) != PIO_OUTPUT_1) {
printf ("Pin '%s' is not an output!\r\n", name);
return SCPI_RES_ERR;
}
pio_set_pin_low(pin);
return SCPI_RES_OK;
}
void cph_deca_reset(void) {
// low gate - turn on MOSFET and drive to ground
pio_set_pin_low(DW_RSTn_PIO_IDX);
// sleep here??
// high gate - turn off MOSFET and open drain
pio_set_pin_high(DW_RSTn_PIO_IDX);
// Why sleep here? Left over from original code.
cph_millis_delay(1);
}
void cph_deca_force_wakeup() {
reset_DW1000();
spi_set_rate_low();
uint32_t id = dwt_readdevid();
if (id == 0xFFFFFFFF) {
TRACE("DW asleep..waking\r\n");
// asleep, wakeup
pio_set_pin_high(DW_WAKEUP_PIO_IDX);
cph_millis_delay(1);
pio_set_pin_low(DW_WAKEUP_PIO_IDX);
cph_millis_delay(1);
}
}
/**
* \brief Go/No-Go test of the first 10K-Bytes of external SRAM access.
*
* \param base_addr Base address of the SRAM.
*
* \return 0 if test is failed else 1.
*/
static uint8_t access_sram_test(uint32_t base_addr)
{
uint32_t i;
uint8_t *ptr = (uint8_t *) (base_addr);
#ifdef PIN_EBI_NLB
/* Pull down LB, enable sram access */
pio_set_pin_low(PIN_EBI_NLB);
#endif
/* Clear test data area */
for (i = 0; i < SRAM_TEST_SIZE; ++i) {
ptr[i] = 0xff;
}
for (i = 0; i < SRAM_TEST_SIZE; ++i) {
if (i & 1) {
ptr[i] = ((0x5a & i) & 0xff);
} else {
ptr[i] = ((0xa5 & i) & 0xff);
}
}
for (i = 0; i < SRAM_TEST_SIZE; ++i) {
if (i & 1) {
if (ptr[i] != ((0x5a & i) & 0xff)) {
return 0;
}
} else {
if (ptr[i] != ((0xa5 & i) & 0xff)) {
return 0;
}
}
}
#ifdef PIN_EBI_NLB
/* Pull up LB, SRAM standby */
pio_set_pin_high(PIN_EBI_NLB);
#endif
return 1;
}
static void ext_sram_init(void)
{
pmc_enable_periph_clk(ID_SMC);
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(1)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(6)
| SMC_PULSE_NCS_WR_PULSE(6)
| SMC_PULSE_NRD_PULSE(6)
| SMC_PULSE_NCS_RD_PULSE(6));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(7)
| SMC_CYCLE_NRD_CYCLE(7));
smc_set_mode(SMC, 0,
SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE |
SMC_MODE_DBW_8_BIT);
/* Configure LB, enable SRAM access */
pio_configure_pin(PIN_EBI_NLB, PIN_EBI_NLB_FLAGS);
/* Pull down LB, enable sram access */
pio_set_pin_low(PIN_EBI_NLB);
}
/**
* \brief Disable transmitter and Enable receiver.
*/
static void func_receiver(void)
{
uint32_t ul_temp;
/* Disable Transmitter. */
usart_disable_tx(BOARD_USART);
/* Configure the TXD pin as PIO. */
pio_configure_pin(PIN_USART_TXD_IDX, PIN_USART_TXD_IO_FLAGS);
pio_set_pin_low(PIN_USART_TXD_IDX);
/* Enable receiver. */
usart_enable_rx(BOARD_USART);
/* Read dummy to make sure that there are no characters in US_THR! */
if (usart_is_rx_ready(BOARD_USART)) {
usart_read(BOARD_USART, &ul_temp);
/* avoid Cppcheck Warning */
UNUSED(ul_temp);
}
}
/**
* \brief pio_capture Application entry point.
*
* \return Unused (ANSI-C compatibility).
*
*/
int main(void)
{
uint8_t uc_i;
uint32_t ul_length;
uint32_t ul_mode;
uint8_t uc_key;
static uint8_t uc_rx_even_only;
static uint8_t uc_tx_without_en;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Configure PIOA clock. */
pmc_enable_periph_clk(ID_PIOA);
pmc_enable_periph_clk(ID_PIOC);
/* Configure PIO Capture handler */
pio_capture_handler_set(capture_handler);
/* Output example information. */
puts(STRING_HEADER);
printf("Frequency: %d MHz.\r\n",
(uint8_t) (sysclk_get_cpu_hz() / 1000000));
printf("Press r to Receive data on PIO Parallel Capture.\r\n");
printf("Press s to Send data on PIO Parallel Capture.\r\n");
uc_key = 0;
while ((uc_key != 'r') && (uc_key != 's')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'r') {
printf("** RECEIVE mode **\r\n");
/* Initialize PIO capture mode value. */
ul_mode = 0;
/* Set up the parallel capture mode data size as 8 bits. */
ul_mode |= 0 << PIO_PCMR_DSIZE_Pos;
printf("Press y to sample the data when both data enable pins are enabled.\r\n");
printf("Press n to sample the data, don't care the status of the data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample the data when both data enable pins are enabled. */
ul_mode &= ~PIO_PCMR_ALWYS;
printf("Receive data when both data enable pins are enabled.\r\n");
} else {
/* Sample the data, don't care the status of the data enable pins. */
ul_mode |= PIO_PCMR_ALWYS;
printf("Receive data, don't care the status of the data enable pins.\r\n");
}
printf("Press y to sample all the data\r\n");
printf("Press n to sample the data only one out of two.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample all the data. */
ul_mode &= ~PIO_PCMR_HALFS;
printf("All data are sampled.\r\n");
} else {
/* Sample the data only one out of two. */
ul_mode |= PIO_PCMR_HALFS;
/* Only if half-Sampling is set, data with an even index are sampled. */
ul_mode &= ~PIO_PCMR_FRSTS;
printf("Only one out of two data is sampled, with an even index.\r\n");
}
/* Initialize PIO Parallel Capture function. */
pio_capture_set_mode(PIOA, ul_mode);
pio_capture_enable(PIOA);
/* Disable all PIOA I/O line interrupt. */
pio_disable_interrupt(PIOA, 0xFFFFFFFF);
/* Configure and enable interrupt of PIO. */
NVIC_DisableIRQ(PIOA_IRQn);
NVIC_ClearPendingIRQ(PIOA_IRQn);
NVIC_SetPriority(PIOA_IRQn, PIO_IRQ_PRI);
NVIC_EnableIRQ(PIOA_IRQn);
while (1) {
g_uc_cbk_received = 0;
/* Clear Receive buffer. */
for (uc_i = 0; uc_i < SIZE_BUFF_RECEPT; uc_i++) {
pio_rx_buffer[uc_i] = 0;
}
/* Set up PDC receive buffer, waiting for 64 bytes. */
packet_t.ul_addr = (uint32_t) pio_rx_buffer;
packet_t.ul_size = SIZE_BUFF_RECEPT;
p_pdc = pio_capture_get_pdc_base(PIOA);
pdc_rx_init(p_pdc, &packet_t, NULL);
/* Enable PDC transfer. */
pdc_enable_transfer(p_pdc, PERIPH_PTCR_RXTEN);
/* Configure the PIO capture interrupt mask. */
pio_capture_enable_interrupt(PIOA,
(PIO_PCIER_ENDRX | PIO_PCIER_RXBUFF));
printf("Waiting...\r\n");
while (g_uc_cbk_received == 0) {
}
}
} else if (uc_key == 's') {
printf("** SEND mode **\r\n");
printf("This is for debug purpose only !\r\n");
printf("Frequency of PIO controller clock must be strictly superior");
printf("to 2 times the frequency of the clock of the device which");
printf(" generates the parallel data.\r\n");
printf("\r\nPlease connect the second board, ");
printf("and put it in receive mode.\r\n");
/* Configure PIO pins which simulate as a sensor. */
pio_configure_pin_group(PIOA, PIO_CAPTURE_CONTROL_PIN_MSK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_configure_pin_group(PIOC, PIO_CAPTURE_DATA_PINS_MASK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
/* Enable sync. output data. */
pio_enable_output_write(PIOC, PIO_CAPTURE_DATA_PINS_MASK);
/* Initialize the capture data line. */
pio_sync_output_write(PIOC, 0);
printf("Press y to send data with data enable pins.\r\n");
printf("Press n to send data without data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_tx_without_en = 0;
printf("Send data with both data enable pins enabled.\r\n");
} else {
uc_tx_without_en = 1;
printf("Send data without enabling the data enable pins.\r\n");
}
printf("Press y to indicate that receiver samples all data.\r\n");
printf("Press n to indicate that receiver samples data with an even index.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_rx_even_only = 0;
printf("Receiver samples all data.\r\n");
} else {
uc_rx_even_only = 1;
printf("Receiver samples data with an even index.\r\n");
}
ul_length = SIZE_BUFF_RECEPT * (1 + uc_rx_even_only);
while (1) {
if (uc_tx_without_en) {
printf("\r\nSend data without enabling the data enable pins.\r\n");
} else {
printf("\r\nSend data with both data enable pins enabled.\r\n");
}
if (!uc_tx_without_en) {
/* Set enable pins. */
pio_set_pin_high(PIO_CAPTURE_EN1_IDX);
pio_set_pin_high(PIO_CAPTURE_EN2_IDX);
}
for (uc_i = 0; uc_i < ul_length;) {
/* Send data. */
pio_sync_output_write(PIOC,
(uc_i << PIO_CAPTURE_DATA_POS));
/* Set clock. */
pio_set_pin_high(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
/* Clear clock. */
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
uc_i++;
}
if (!uc_tx_without_en) {
/* Clear enable pins. */
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
}
printf("Press a key.\r\n");
while (uart_read(CONSOLE_UART, &uc_key)) {
}
}
}
return 0;
}
/**
* \brief usart_rs485 Application entry point.
*
* Configure USART in RS485 mode. If the application starts earlier, it acts
* as a receiver. Otherwise, it should be a transmitter.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
static uint8_t uc_sync = SYNC_CHAR;
uint32_t time_elapsed = 0;
uint32_t ul_i;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
/* Configure USART. */
configure_usart();
/* Get board USART PDC base address and enable receiver and transmitter. */
g_p_pdc = usart_get_pdc_base(BOARD_USART);
pdc_enable_transfer(g_p_pdc, PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* 1ms tick. */
configure_systick();
/* Initialize receiving buffer to distinguish with the sent frame. */
memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE);
/*
* Enable transmitter here, and disable receiver first, to avoid receiving
* characters sent by itself. It's necessary for half duplex RS485.
*/
usart_enable_tx(BOARD_USART);
usart_disable_rx(BOARD_USART);
/* Send a sync character XON (0x11). */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
/* Delay until the line is cleared, an estimated time used. */
wait(50);
/* Read the acknowledgement. */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
/* Then enable receiver. */
usart_enable_rx(BOARD_USART);
/* Wait until time out or acknowledgement is received. */
time_elapsed = get_tick_count();
while (!usart_is_rx_buf_end(BOARD_USART)) {
if (get_tick_count() - time_elapsed > TIMEOUT) {
break;
}
}
/* If acknowledgement received in a short time. */
if (usart_is_rx_buf_end(BOARD_USART)) {
/* Acknowledgement. */
if (uc_sync == ACK_CHAR) {
/* Act as transmitter, start transmitting. */
g_state = TRANSMITTING;
puts("-I- Start transmitting!\r");
g_st_packet.ul_addr = (uint32_t)g_uc_transmit_buffer;
g_st_packet.ul_size = PDC_BUF_SIZE;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
/* Enable transmitting interrupt. */
usart_enable_interrupt(BOARD_USART, US_IER_ENDTX);
}
} else {
/* Start receiving, act as receiver. */
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
puts("-I- Receiving sync character.\r");
while (!usart_is_rx_buf_end(BOARD_USART)) {
}
/* Sync character is received. */
if (uc_sync == SYNC_CHAR) {
/* SEND XOff as acknowledgement. */
uc_sync = ACK_CHAR;
/*
* Delay to prevent the character from being discarded by
* transmitter due to responding too soon.
*/
wait(100);
pio_set_pin_high(PIN_RE_IDX);
g_st_packet.ul_addr = (uint32_t)&uc_sync;
g_st_packet.ul_size = 1;
pdc_tx_init(g_p_pdc, &g_st_packet, NULL);
g_state = RECEIVING;
puts("-I- Start receiving!\r");
g_st_packet.ul_addr = (uint32_t)g_uc_receive_buffer;
g_st_packet.ul_size = PDC_BUF_SIZE;
pdc_rx_init(g_p_pdc, &g_st_packet, NULL);
pio_set_pin_low(PIN_RE_IDX);
/* Enable receiving interrupt. */
usart_enable_interrupt(BOARD_USART, US_IER_ENDRX);
}
}
while (g_state != RECEIVED) {
}
ul_i = 0;
/* Print received frame out. */
while ((ul_i < BUFFER_SIZE) && (g_uc_receive_buffer[ul_i] != '\0')) {
if (g_uc_transmit_buffer[ul_i] != g_uc_receive_buffer[ul_i]) {
puts("-E- Error occurred while receiving!\r");
/* Infinite loop here. */
while (1) {
}
}
ul_i++;
}
puts("-I- Received successfully!\r");
while (1) {
}
}
uint32 inittestapplication(void) {
uint32 devID;
instanceConfig_t instConfig;
int i, result;
SPI_ConfigFastRate(SPI_BaudRatePrescaler_16); //max SPI before PLLs configured is ~4M
i = 10;
//this is called here to wake up the device (i.e. if it was in sleep mode before the restart)
devID = instancereaddeviceid();
printf("devID %08X\r\n", devID);
//if the read of devide ID fails, the DW1000 could be asleep
if (DWT_DEVICE_ID != devID) {
// port_SPIx_clear_chip_select(); //CS low
// Sleep(1); //200 us to wake up then waits 5ms for DW1000 XTAL to stabilise
// port_SPIx_set_chip_select(); //CS high
// Sleep(7);
printf("asleep...wakeup!\r\n");
pio_set_pin_high(DW_WAKEUP_PIO_IDX);
Sleep(1);
pio_set_pin_low(DW_WAKEUP_PIO_IDX);
Sleep(7);
devID = instancereaddeviceid();
printf("devID %08X\r\n", devID);
// SPI not working or Unsupported Device ID
if (DWT_DEVICE_ID != devID) {
return (-1);
}
//clear the sleep bit - so that after the hard reset below the DW does not go into sleep
dwt_softreset();
}
//reset the DW1000 by driving the RSTn line low
reset_DW1000();
result = instance_init();
if (0 > result)
return (-2); // Some failure has occurred
SPI_ConfigFastRate(SPI_BaudRatePrescaler_4); //increase SPI to max
devID = instancereaddeviceid();
printf("devID %08X\r\n", devID);
if (DWT_DEVICE_ID != devID) // Means it is NOT MP device
{
// SPI not working or Unsupported Device ID
return (-3);
}
if (is_tag) {
instance_mode = TAG;
led_on(LED_PC7);
} else {
instance_mode = ANCHOR;
#if (DR_DISCOVERY == 1)
led_on(LED_PC6);
#else
if(instance_anchaddr & 0x1)
led_on(LED_PC6);
if(instance_anchaddr & 0x2)
led_on(LED_PC7);
#endif
}
instancesetrole(instance_mode); // Set this instance role
if (use_fast2wr) //if fast ranging then initialise instance for fast ranging application
{
instance_init_f(instance_mode); //initialise Fast 2WR specific data
//when using fast ranging the channel config is either mode 2 or mode 6
//default is mode 2
dr_mode = decarangingmode();
if ((dr_mode & 0x1) == 0)
dr_mode = 1;
} else {
instance_init_s(instance_mode);
dr_mode = decarangingmode();
}
instConfig.channelNumber = chConfig[dr_mode].channel;
instConfig.preambleCode = chConfig[dr_mode].preambleCode;
instConfig.pulseRepFreq = chConfig[dr_mode].prf;
instConfig.pacSize = chConfig[dr_mode].pacSize;
instConfig.nsSFD = chConfig[dr_mode].nsSFD;
instConfig.sfdTO = chConfig[dr_mode].sfdTO;
instConfig.dataRate = chConfig[dr_mode].datarate;
instConfig.preambleLen = chConfig[dr_mode].preambleLength;
instance_config(&instConfig); // Set operating channel etc
#if (DR_DISCOVERY == 0)
addressconfigure(); // set up initial payload configuration
#endif
instancesettagsleepdelay(POLL_SLEEP_DELAY, BLINK_SLEEP_DELAY); //set the Tag sleep time
//if TA_SW1_2 is on use fast ranging (fast 2wr)
if (use_fast2wr) {
//Fast 2WR specific config
//configure the delays/timeouts
instance_config_f();
} else //use default ranging modes
{
// NOTE: this is the delay between receiving the blink and sending the ranging init message
// The anchor ranging init response delay has to match the delay the tag expects
// the tag will then use the ranging response delay as specified in the ranging init message
// use this to set the long blink response delay (e.g. when ranging with a PC anchor that wants to use the long response times != 150ms)
if (use_long_blink_delay) {
instancesetblinkreplydelay(FIXED_LONG_BLINK_RESPONSE_DELAY);
} else //this is for ARM to ARM tag/anchor (using normal response times 150ms)
{
instancesetblinkreplydelay(FIXED_REPLY_DELAY);
}
//set the default response delays
instancesetreplydelay(FIXED_REPLY_DELAY, 0);
}
// return devID;
return 0;
}
