int main()
{
struct netif *netif, server_netif;
struct ip_addr ipaddr, netmask, gw;
/* the mac address of the board. this should be unique per board */
unsigned char mac_ethernet_address[] = { 0x00, 0x0a, 0x35, 0x00, 0x01, 0x02 };
netif = &server_netif;
init_platform();
/* initliaze IP addresses to be used */
IP4_ADDR(&ipaddr, 192, 168, 1, 10);
IP4_ADDR(&netmask, 255, 255, 255, 0);
IP4_ADDR(&gw, 192, 168, 1, 1);
print_app_header();
print_ip_settings(&ipaddr, &netmask, &gw);
lwip_init();
/* Add network interface to the netif_list, and set it as default */
if (!xemac_add(netif, &ipaddr, &netmask, &gw, mac_ethernet_address, PLATFORM_EMAC_BASEADDR)) {
xil_printf("Error adding N/W interface\n\r");
return -1;
}
netif_set_default(netif);
/* Create a new DHCP client for this interface.
* Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
* the predefined regular intervals after starting the client.
*/
/* dhcp_start(netif); */
/* now enable interrupts */
platform_enable_interrupts();
/* specify that the network if is up */
netif_set_up(netif);
/* start the application (web server, rxtest, txtest, etc..) */
start_application();
/* receive and process packets */
while (1) {
xemacif_input(netif);
transfer_data();
}
/* never reached */
cleanup_platform();
return 0;
}
void spirit1_spibus_io(ot_u8 cmd_len, ot_u8 resp_len, ot_u8* cmd) {
///@note BOARD_DMA_CLKON() must be defined in the board support header as a
/// macro or inline function. As the board may be using DMA for numerous
/// peripherals, we cannot assume in this module if it is appropriate to turn-
/// off the DMA for all other modules.
platform_disable_interrupts();
__SPI_CLKON();
__SPI_ENABLE();
__SPI_CS_ON();
/// Set-up DMA, and trigger it. TX goes out from parameter. RX goes into
/// module buffer. If doing a read, the garbage data getting duplexed onto
/// TX doesn't affect the SPIRIT1. If doing a write, simply disregard the
/// RX duplexed data.
BOARD_RFSPI_CLKON();
BOARD_DMA_CLKON();
__DMA_CLEAR_IFG();
cmd_len += resp_len;
_DMARX->CNDTR = cmd_len;
_DMATX->CNDTR = cmd_len;
_DMATX->CMAR = (ot_u32)cmd;
__DMA_ENABLE();
/// Use Cortex-M WFE (Wait For Event) to hold until DMA is complete. This
/// is the CM way of doing a busywait loop, but turning off the CPU core.
/// The while loop is for safety purposes, in case another event comes.
//do {
//__WFE();
//}
while((DMA1->ISR & _DMARX_IFG) == 0);
__DMA_CLEAR_IRQ();
__DMA_CLEAR_IFG();
__DMA_DISABLE();
/// Turn-off and disable SPI to save energy
__SPI_CS_OFF();
__SPI_DISABLE();
__SPI_CLKOFF();
BOARD_DMA_CLKOFF();
BOARD_RFSPI_CLKOFF();
platform_enable_interrupts();
}
void sx127x_spibus_io(ot_u8 cmd_len, ot_u8 resp_len, ot_u8* cmd) {
///@note BOARD_DMA_CLKON() must be defined in the board support header as a
/// macro or inline function. As the board may be using DMA for numerous
/// peripherals, we cannot assume in this module if it is appropriate to turn-
/// off the DMA for all other modules.
platform_disable_interrupts();
__SPI_CLKON();
__SPI_ENABLE();
__SPI_CS_ON();
/// Set-up DMA, and trigger it. TX goes out from parameter. RX goes into
/// module buffer. If doing a read, the garbage data getting duplexed onto
/// TX doesn't affect the SX127x. If doing a write, simply disregard the
/// RX duplexed data.
BOARD_RFSPI_CLKON();
BOARD_DMA_CLKON();
__DMA_CLEAR_IFG();
cmd_len += resp_len;
_DMARX->CNDTR = cmd_len;
_DMATX->CNDTR = cmd_len;
_DMATX->CMAR = (ot_u32)cmd;
__DMA_ENABLE();
/// WFE only works on EXTI line interrupts, as far as I can test.
/// So do busywait until DMA is done RX-ing
//do {
//__WFE();
//}
while((DMA1->ISR & _DMARX_IFG) == 0);
__DMA_CLEAR_IRQ();
__DMA_CLEAR_IFG();
__DMA_DISABLE();
/// Turn-off and disable SPI to save energy
__SPI_CS_OFF();
__SPI_DISABLE();
__SPI_CLKOFF();
BOARD_DMA_CLKOFF();
BOARD_RFSPI_CLKOFF();
platform_enable_interrupts();
}
void sub_memcpy_dma(ot_u8* dest, ot_u8* src, ot_uint length) {
/// Use 8, 16, or 32 bit chunks based on detected alignment
static const ot_u16 ccr[4] = { 0x4AD1, 0x40D1, 0x45D1, 0x40D1 };
static const ot_u16 len_div[4] = { 2, 0, 1, 0 };
ot_int align;
platform_disable_interrupts();
MEMCPY_DMACHAN->CCR = 0;
MEMCPY_DMA->IFCR = MEMCPY_DMA_INT;
MEMCPY_DMACHAN->CPAR = (ot_u32)dest;
MEMCPY_DMACHAN->CMAR = (ot_u32)src;
align = ((ot_u32)dest | (ot_u32)src | (ot_u32)length) & 3;
length >>= len_div[align];
MEMCPY_DMACHAN->CNDTR = length;
MEMCPY_DMACHAN->CCR = ccr[align];
while((MEMCPY_DMA->ISR & MEMCPY_DMA_INT) == 0);
platform_enable_interrupts();
}
ot_u16 crc16drv_block_manual(ot_u8* block_addr, ot_int block_size, ot_u16 init) {
/// @note Interrupts must be disabled during the runtime of this function, in
/// order to prevent CRC hardware registers from getting borked by multiple
/// users. Fortunately, CRC HW is extremely fast, about 1 byte/cycle. For
/// doing long computations, though, it is still recommended to use the CRC16
/// streaming object rather than this function directly.
//ot_int units;
ot_u16 output;
platform_disable_interrupts();
CRC->INIT = init;
CRC->POL = 0x8005;
CRC->CR = (b01 << 3) | 1;
///@todo unroll this loop using alignment optimizations
while (block_size--) {
CRC->DR = *block_addr++;
}
output = (__IO ot_u16)CRC->DR;
platform_enable_interrupts();
return output;
}
int main()
{
struct ip_addr ipaddr, netmask, gw;
/* the mac address of the board. this should be unique per board */
unsigned char mac_ethernet_address[] =
{ 0x00, 0x0a, 0x35, 0x00, 0x01, 0x02 };
echo_netif = &server_netif;
#if defined (__arm__) && !defined (ARMR5)
#if XPAR_GIGE_PCS_PMA_SGMII_CORE_PRESENT == 1 || XPAR_GIGE_PCS_PMA_1000BASEX_CORE_PRESENT == 1
ProgramSi5324();
ProgramSfpPhy();
#endif
#endif
init_platform();
#if LWIP_DHCP==1
ipaddr.addr = 0;
gw.addr = 0;
netmask.addr = 0;
#else
/* initliaze IP addresses to be used */
IP4_ADDR(&ipaddr, 192, 168, 1, 10);
IP4_ADDR(&netmask, 255, 255, 255, 0);
IP4_ADDR(&gw, 192, 168, 1, 1);
#endif
print_app_header();
lwip_init();
/* Add network interface to the netif_list, and set it as default */
if (!xemac_add(echo_netif, &ipaddr, &netmask,
&gw, mac_ethernet_address,
PLATFORM_EMAC_BASEADDR)) {
xil_printf("Error adding N/W interface\n\r");
return -1;
}
netif_set_default(echo_netif);
/* now enable interrupts */
platform_enable_interrupts();
/* specify that the network if is up */
netif_set_up(echo_netif);
#if (LWIP_DHCP==1)
/* Create a new DHCP client for this interface.
* Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
* the predefined regular intervals after starting the client.
*/
dhcp_start(echo_netif);
dhcp_timoutcntr = 24;
while(((echo_netif->ip_addr.addr) == 0) && (dhcp_timoutcntr > 0))
xemacif_input(echo_netif);
if (dhcp_timoutcntr <= 0) {
if ((echo_netif->ip_addr.addr) == 0) {
xil_printf("DHCP Timeout\r\n");
xil_printf("Configuring default IP of 192.168.1.10\r\n");
IP4_ADDR(&(echo_netif->ip_addr), 192, 168, 1, 10);
IP4_ADDR(&(echo_netif->netmask), 255, 255, 255, 0);
IP4_ADDR(&(echo_netif->gw), 192, 168, 1, 1);
}
}
ipaddr.addr = echo_netif->ip_addr.addr;
gw.addr = echo_netif->gw.addr;
netmask.addr = echo_netif->netmask.addr;
#endif
print_ip_settings(&ipaddr, &netmask, &gw);
/* start the application (web server, rxtest, txtest, etc..) */
start_application();
/* receive and process packets */
while (1) {
if (TcpFastTmrFlag) {
tcp_fasttmr();
TcpFastTmrFlag = 0;
}
if (TcpSlowTmrFlag) {
tcp_slowtmr();
TcpSlowTmrFlag = 0;
}
xemacif_input(echo_netif);
transfer_data();
}
/* never reached */
cleanup_platform();
return 0;
}
int main()
{
struct netif *netif, server_netif;
struct ip_addr ipaddr, netmask, gw;
/* the mac address of the board. this should be unique per board */
unsigned char mac_ethernet_address[] = { 0x00, 0x0a, 0x35, 0x00, 0x01, 0x02 };
netif = &server_netif;
if (init_platform() < 0) {
xil_printf("ERROR initializing platform.\r\n");
return -1;
}
xil_printf("\r\n\r\n");
xil_printf("-----lwIP RAW Mode Demo Application ------\r\n");
/* initliaze IP addresses to be used */
#if (LWIP_DHCP==0)
IP4_ADDR(&ipaddr, 192, 168, 1, 10);
IP4_ADDR(&netmask, 255, 255, 255, 0);
IP4_ADDR(&gw, 192, 168, 1, 1);
print_ip_settings(&ipaddr, &netmask, &gw);
#endif
lwip_init();
#if (LWIP_DHCP==1)
ipaddr.addr = 0;
gw.addr = 0;
netmask.addr = 0;
#endif
/* Add network interface to the netif_list, and set it as default */
if (!xemac_add(netif, &ipaddr, &netmask, &gw, mac_ethernet_address, PLATFORM_EMAC_BASEADDR)) {
xil_printf("Error adding N/W interface\r\n");
return -1;
}
netif_set_default(netif);
/* specify that the network if is up */
netif_set_up(netif);
/* now enable interrupts */
platform_enable_interrupts();
#if (LWIP_DHCP==1)
/* Create a new DHCP client for this interface.
* Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
* the predefined regular intervals after starting the client.
*/
dhcp_start(netif);
dhcp_timoutcntr = 24;
TxPerfConnMonCntr = 0;
while(((netif->ip_addr.addr) == 0) && (dhcp_timoutcntr > 0)) {
xemacif_input(netif);
if (TcpFastTmrFlag) {
tcp_fasttmr();
TcpFastTmrFlag = 0;
}
if (TcpSlowTmrFlag) {
tcp_slowtmr();
TcpSlowTmrFlag = 0;
}
}
if (dhcp_timoutcntr <= 0) {
if ((netif->ip_addr.addr) == 0) {
xil_printf("DHCP Timeout\r\n");
xil_printf("Configuring default IP of 192.168.1.10\r\n");
IP4_ADDR(&(netif->ip_addr), 192, 168, 1, 10);
IP4_ADDR(&(netif->netmask), 255, 255, 255, 0);
IP4_ADDR(&(netif->gw), 192, 168, 1, 1);
}
}
/* receive and process packets */
print_ip_settings(&(netif->ip_addr), &(netif->netmask), &(netif->gw));
#endif
/* start the application (web server, rxtest, txtest, etc..) */
start_applications();
print_headers();
while (1) {
if (TcpFastTmrFlag) {
tcp_fasttmr();
TcpFastTmrFlag = 0;
}
if (TcpSlowTmrFlag) {
tcp_slowtmr();
TcpSlowTmrFlag = 0;
}
xemacif_input(netif);
transfer_data();
}
/* never reached */
cleanup_platform();
return 0;
}
int main()
{
struct ip_addr ipaddr, netmask, gw;
unsigned FPGA_port_number;
char *FPGA_ip_address;
char *FPGA_netmask;
char *FPGA_gateway;
unsigned integer_ip;
unsigned int FPGA_ip_address_a1,FPGA_ip_address_a2,FPGA_ip_address_a3,FPGA_ip_address_a4;
unsigned int FPGA_netmask_a1,FPGA_netmask_a2,FPGA_netmask_a3,FPGA_netmask_a4;
unsigned int FPGA_gateway_a1,FPGA_gateway_a2,FPGA_gateway_a3,FPGA_gateway_a4;
//EXAMPLE: set FPGA IP and port number
FPGA_ip_address=FPGA_IP;
FPGA_netmask=FPGA_NM;
FPGA_gateway=FPGA_GW;
FPGA_port_number=FPGA_PORT;
//extract FPGA IP address from string
if (ip_to_int (FPGA_ip_address,&FPGA_ip_address_a1,&FPGA_ip_address_a2,&FPGA_ip_address_a3,&FPGA_ip_address_a4) == INVALID) {
printf ("'%s' is not a valid IP address for FPGA server.\n", FPGA_ip_address);
return 1;
}
//extract FPGA netmask address from string
if (ip_to_int (FPGA_netmask,&FPGA_netmask_a1,&FPGA_netmask_a2,&FPGA_netmask_a3,&FPGA_netmask_a4) == INVALID) {
printf ("'%s' is not a valid netmask address for FPGA server.\n", FPGA_netmask);
return 1;
}
//extract FPGA gateway address from string
if (ip_to_int (FPGA_gateway,&FPGA_gateway_a1,&FPGA_gateway_a2,&FPGA_gateway_a3,&FPGA_gateway_a4) == INVALID) {
printf ("'%s' is not a valid gateway address for FPGA server.\n", FPGA_gateway);
return 1;
}
/* the mac address of the board. this should be unique per board */
unsigned char mac_ethernet_address[] =
{ 0x00, 0x0a, 0x35, 0x00, 0x01, 0x02 };
echo_netif = &server_netif;
init_platform();
Xil_DCacheDisable();
/* initliaze IP addresses to be used */
IP4_ADDR(&ipaddr, FPGA_ip_address_a4, FPGA_ip_address_a3, FPGA_ip_address_a2, FPGA_ip_address_a1);
IP4_ADDR(&netmask, FPGA_netmask_a4, FPGA_netmask_a3, FPGA_netmask_a2, FPGA_netmask_a1);
IP4_ADDR(&gw, FPGA_gateway_a4, FPGA_gateway_a3, FPGA_gateway_a2, FPGA_gateway_a1);
print_app_header();
print_ip_settings(&ipaddr, &netmask, &gw);
lwip_init();
/* Add network interface to the netif_list, and set it as default */
if (!xemac_add(echo_netif, &ipaddr, &netmask,&gw, mac_ethernet_address,PLATFORM_EMAC_BASEADDR)) {
xil_printf("Error adding N/W interface\n\r");
return -1;
}
netif_set_default(echo_netif);
/* specify that the network if is up */
netif_set_up(echo_netif);
/* now enable interrupts */
platform_enable_interrupts();
/* start the application (web server, rxtest, txtest, etc..) */
start_application();
/* receive and process packets */
while (1) {
xemacif_input(echo_netif);
transfer_data();
}
/* never reached */
cleanup_platform();
return 0;
}
int main()
{
// disable caches -- still fast enough for copies, no worries about coherency
Xil_DCacheDisable();
struct ip_addr ipaddr, netmask, gw;
/* the mac address of the board. this should be unique per board */
unsigned char mac_ethernet_address[] =
{ 0x00, 0x0a, 0x35, 0x00, 0x05, 0x12 };
echo_netif = &server_netif;
#if XPAR_GIGE_PCS_PMA_CORE_PRESENT == 1
ProgramSi5324();
ProgramSfpPhy();
#endif
init_platform();
/* initliaze IP addresses to be used */
/* 129.241.110.214 */
ipaddr.addr=0;
netmask.addr=0;
gw.addr=0;
/*IP4_ADDR(&ipaddr, 129, 241, 110, 240);
IP4_ADDR(&netmask, 255, 255, 254, 0);
IP4_ADDR(&gw, 129, 241, 110, 1);*/
print_app_header();
print_ip_settings(&ipaddr, &netmask, &gw);
lwip_init();
/* Add network interface to the netif_list, and set it as default */
if (!xemac_add(echo_netif, &ipaddr, &netmask,
&gw, mac_ethernet_address,
PLATFORM_EMAC_BASEADDR)) {
xil_printf("Error adding N/W interface\n\r");
return -1;
}
netif_set_default(echo_netif);
/* Create a new DHCP client for this interface.
* Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at
* the predefined regular intervals after starting the client.
*/
/* dhcp_start(echo_netif); */
dhcp_start(echo_netif);
/* now enable interrupts */
platform_enable_interrupts();
/* specify that the network if is up */
netif_set_up(echo_netif);
/* start the application (web server, rxtest, txtest, etc..) */
start_application();
/* receive and process packets */
int msg = 0;
while (!finished) {
xemacif_input(echo_netif);
transfer_data();
if(!msg && echo_netif->ip_addr.addr)
{
msg=1;
xil_printf("Acquired DHCP address!\n");
print_ip("",&(echo_netif->ip_addr));
}
}
xil_printf("Cheetah finished, exiting..\n");
cleanup_platform();
return 0;
}
