kern_return_t pmem_copy(const pmem_OSBuffer *orig, pmem_OSBuffer **copy) { *copy = pmem_alloc(orig->size, orig->tag); if (*copy == 0) { printf("ARGH?\n\n"); return KERN_FAILURE; } strncpy((*copy)->buffer, orig->buffer, orig->size); return KERN_SUCCESS; }
static inline int alloc_fmem(int width, int height, MCVENC_FMEM_INFO_T *fmem) { int mem_x, mem_y; void *Ypic_vaddr, *Cpic_vaddr; mem_x = ((width + 15) / 16) * 16; mem_y = ((height + 15) / 16) * 16; Ypic_vaddr = pmem_alloc(mem_x * mem_y, 32, &fmem->Ypic_addr); if (Ypic_vaddr == NULL) return -1; Cpic_vaddr = pmem_alloc(mem_x * mem_y / 2, 32, &fmem->Cpic_addr); if (Cpic_vaddr == NULL) { pmem_free(Ypic_vaddr, mem_x * mem_y); return -1; } return 0; }
Vdec_ReturnType vdec_commit_memory(struct VDecoder* dec) { unsigned frame_size = 0; unsigned output_sz = 0; unsigned input_sz = VDEC_INPUT_SIZE; unsigned off = 0; int n; int r; frame_size = dec->width * dec->height; output_sz = frame_size * 3/2; if (dec->ctxt->inputReq.bufferSize > VDEC_INPUT_SIZE) { input_sz = dec->ctxt->inputReq.bufferSize; } dec->arena_size = VDEC_NFRAMES * VDEC_INPUT_SIZE + dec->ctxt->outputBuffer.numBuffers * output_sz; if (pmem_alloc(&dec->arena, dec->arena_size)) { QTV_MSG_PRIO1(QTVDIAG_GENERAL,QTVDIAG_PRIO_ERROR,"vdec: failed to allocate pmem arena (%d bytes)\n", dec->arena_size); return VDEC_EFAILED; } QTV_MSG_PRIO1(QTVDIAG_GENERAL,QTVDIAG_PRIO_MED,"vdec: allocated %d bytes of pmem\n", dec->arena_size); off = 0; for (n = 0; n < VDEC_NFRAMES; n++) { struct vdec_frame *fr = dec->input + n; fr->pmem_id = dec->arena.fd; fr->pmem_offset = off; fr->phys = dec->arena.phys + off; fr->base = ((unsigned char*) dec->arena.data) + off; off += input_sz; QTV_MSG_PRIO5(QTVDIAG_GENERAL,QTVDIAG_PRIO_LOW," input[%d] base=%p phys=0x%08x off=0x%08x id=%d\n", n, fr->base, fr->phys, fr->pmem_offset, fr->pmem_id); } for (n = 0; n < dec->ctxt->outputBuffer.numBuffers; n++) { struct vdec_frame *fr = dec->output + n; fr->pmem_id = dec->arena.fd; fr->pmem_offset = off; fr->phys = dec->arena.phys + off; fr->base = ((unsigned char*) dec->arena.data) + off; off += output_sz; memset(fr->base,0,frame_size); memset(&(((unsigned char*)fr->base)[frame_size]),128,frame_size>>1); QTV_MSG_PRIO5(QTVDIAG_GENERAL,QTVDIAG_PRIO_LOW," output[%d] base=%p phys=0x%08x off=0x%08x id=%d\n", n, fr->base, fr->phys, fr->pmem_offset, fr->pmem_id); } dec->ctxt->inputBuffer.base =(unsigned char*) (dec->input[0].base); dec->ctxt->inputBuffer.bufferSize = input_sz; dec->ctxt->inputBuffer.numBuffers = VDEC_NFRAMES; dec->ctxt->outputBuffer.base = (unsigned char*) &(dec->output[0]); dec->ctxt->outputBuffer.bufferSize = output_sz; return VDEC_SUCCESS; }
kern_return_t pmem_make(const char *string, uint32_t len, OSMallocTag_t tag, pmem_OSBuffer **buffer) { *buffer = pmem_alloc(len, tag); if (*buffer == 0) { return KERN_FAILURE; } strncpy((*buffer)->buffer, string, len); return KERN_SUCCESS; }
void dyngdt_init_and_lock() { spl_lock(&global_gdt_init_lock); phys_addr_t pa = pmem_alloc(GDT_VSZ, PAGE_SIZE_4K); if(!pa) fatal("failed to allocate space for dynamic gdt\n"); if(!vmem_map(spc_current(), pa, (void*)GDT_VIRTUAL, PG_WRITABLE | PG_GLOBAL)) fatal("mapping the GDT for this cpu failed, already initialized?\n"); memset((void*)GDT_VIRTUAL, 0, GDT_VSZ); }
/* expand heap by one frame */ static int kheap_expand(void) { uintptr_t paddr, vaddr; // allocate physical frame paddr = pmem_alloc(); if (!paddr) return -1; // map physical frame to the next virtual address vaddr = KHEAP_BASE_ADDR + kheap_frames * MEM_PAGE_SIZE; ptt_map(vaddr, paddr, 1, 1); ++kheap_frames; return 0; }
int pmem_alloc_umem(size_t size, size_t alignment, struct pmem_region *rgn) { struct pmem_region constraint, result; /* Find and allocate a chunk of PMEM_TYPE_UMEM physical memory */ pmem_region_unset_all(&constraint); constraint.start = 0; constraint.end = (paddr_t)(-1); constraint.type = PMEM_TYPE_UMEM; constraint.type_is_set = true; constraint.allocated = false; constraint.allocated_is_set = true; if (pmem_alloc(size, alignment, &constraint, &result)) return -ENOMEM; *rgn = result; return 0; }
unsigned long shvpu5_load_firmware(char *filename, size_t *size) { void *vaddr; unsigned char *p; unsigned long paddr; int fd; size_t len; ssize_t ret; fd = open(filename, O_RDONLY); if (fd < 0) { perror("firmware open"); goto fail_open; } len = lseek(fd, 0, SEEK_END); logd("size of %s = %x\n", filename, len); *size = len; vaddr = p = pmem_alloc(len, 32, &paddr); if (vaddr == NULL) { fprintf(stderr, "pmem alloc failed.\n"); goto fail_pmem_alloc; } lseek(fd, 0, SEEK_SET); do { ret = read(fd, p, len); if (ret <= 0) { perror("firmware read"); goto fail_read; } len -= ret; p += ret; } while (len > 0); close(fd); return paddr; fail_read: pmem_free(vaddr, lseek(fd, 0, SEEK_END)); fail_pmem_alloc: close(fd); fail_open: return -1; }
static int pmem_probe(struct platform_device *pdev) { struct pmem_device *pmem; struct resource *res; if (WARN_ON(pdev->num_resources > 1)) return -ENXIO; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -ENXIO; pmem = pmem_alloc(&pdev->dev, res); if (IS_ERR(pmem)) return PTR_ERR(pmem); platform_set_drvdata(pdev, pmem); return 0; }
static int nd_pmem_probe(struct device *dev) { struct nd_region *nd_region = to_nd_region(dev->parent); struct nd_namespace_common *ndns; struct nd_namespace_io *nsio; struct pmem_device *pmem; ndns = nvdimm_namespace_common_probe(dev); if (IS_ERR(ndns)) return PTR_ERR(ndns); nsio = to_nd_namespace_io(&ndns->dev); pmem = pmem_alloc(dev, &nsio->res, nd_region->id); if (IS_ERR(pmem)) return PTR_ERR(pmem); pmem->ndns = ndns; dev_set_drvdata(dev, pmem); ndns->rw_bytes = pmem_rw_bytes; if (is_nd_btt(dev)) return nvdimm_namespace_attach_btt(ndns); if (is_nd_pfn(dev)) return nvdimm_namespace_attach_pfn(ndns); if (nd_btt_probe(ndns, pmem) == 0) { /* we'll come back as btt-pmem */ return -ENXIO; } if (nd_pfn_probe(ndns, pmem) == 0) { /* we'll come back as pfn-pmem */ return -ENXIO; } return pmem_attach_disk(dev, ndns, pmem); }
long mcvdec_uf_get_frame_memory(MCVDEC_CONTEXT_T *context, long xpic_size, long ypic_size, long required_fmem_cnt, long nsampling, long *fmem_cnt, long fmem_x_size[], long fmem_size[], MCVDEC_FMEM_INFO_T *fmem[]) { MCVDEC_FMEM_INFO_T *_fmem; size_t fmemsize; long fmem_x; int i, ret; void *ypic_vaddr; unsigned long ypic_paddr, cpic_paddr; unsigned long align, alloc_size; shvpu_decode_PrivateType *shvpu_decode_Private = (shvpu_decode_PrivateType *)context->user_info; logd("%s(%d, %d, %d, %d) invoked.\n", __FUNCTION__, xpic_size, ypic_size, required_fmem_cnt, nsampling); if (shvpu_decode_Private->features.tl_conv_mode == OMX_FALSE) { fmem_x = ROUND_2POW(xpic_size, 32); align = 32; fmemsize = fmem_x * (ROUND_2POW(ypic_size, 16)); alloc_size = fmemsize * 3 / 2; } else { unsigned long pitch; int next_power = 0; int align_bits; pitch = xpic_size; for (i = 0; i < 32; i++) { if (pitch <= 1) break; if (pitch & 1) next_power = 1; pitch >>=1; } pitch = (1 << (i + next_power)); if (!shvpu_decode_Private->ipmmui_data) { shvpu_decode_Private->ipmmui_data = init_ipmmu( shvpu_decode_Private->uio_start_phys, pitch, shvpu_decode_Private->features.tl_conv_tbm, shvpu_decode_Private->features.tl_conv_vbm); } align_bits = i + next_power + shvpu_decode_Private->features.tl_conv_tbm; fmem_x = pitch; align = (1 << align_bits); fmemsize = fmem_x * (ROUND_2POW(ypic_size, 16)); alloc_size = ((fmemsize * 3 / 2) + (align - 1)) & ~(align - 1); alloc_size += align; } #ifdef MERAM_ENABLE open_meram(&shvpu_decode_Private->meram_data); setup_icb(&shvpu_decode_Private->meram_data, &shvpu_decode_Private->meram_data.decY_icb, fmem_x, ROUND_2POW(ypic_size, 16), 128, 0xD, 1, 21); setup_icb(&shvpu_decode_Private->meram_data, &shvpu_decode_Private->meram_data.decC_icb, fmem_x, ROUND_2POW(ypic_size, 16) / 2, 64, 0xC, 1, 22); #endif /* if the SYNC mode, the required_fmem_cnt value may not be enough because of few (buffered) stream information. A simple heuristic solution is one extra buffer chunk prepared. */ if (shvpu_decode_Private->avCodec->codecMode == MCVDEC_MODE_SYNC) required_fmem_cnt += 1; /* If OMX output buffers have been allocated by AllocateBuffers(), the fmem buffers must be shared with down-stream modules, such as renderer. So more number of fmem buffers may be necessary for keeping efficient flow of buffers. */ if (!shvpu_decode_Private->features.use_buffer_mode) { required_fmem_cnt += shvpu_decode_Private-> ports[OMX_BASE_FILTER_OUTPUTPORT_INDEX]-> sPortParam.nBufferCountActual; if (required_fmem_cnt > MCVDEC_MAX_FMEM_CNT) required_fmem_cnt = MCVDEC_MAX_FMEM_CNT; } shvpu_decode_Private->avCodec->fmem = (shvpu_fmem_data *) calloc (required_fmem_cnt, sizeof(shvpu_fmem_data)); if (shvpu_decode_Private->avCodec->fmem == NULL) return MCVDEC_FMEM_SKIP_BY_USER; _fmem = *fmem = (MCVDEC_FMEM_INFO_T *) calloc(required_fmem_cnt, sizeof(MCVDEC_FMEM_INFO_T)); if (*fmem == NULL) { free(shvpu_decode_Private->avCodec->fmem); shvpu_decode_Private->avCodec->fmem = NULL; return MCVDEC_FMEM_SKIP_BY_USER; } shvpu_decode_Private->avCodec->fmem_info = _fmem; shvpu_decode_Private->avCodec->fmem_size = required_fmem_cnt; *fmem_cnt = 0; for (i=0; i<required_fmem_cnt; i++) { ypic_vaddr = pmem_alloc(alloc_size, align, &ypic_paddr); if (ypic_vaddr == NULL) break; shvpu_decode_Private->avCodec->fmem[i].fmem_start = ypic_paddr; shvpu_decode_Private->avCodec->fmem[i].fmem_len = alloc_size; pthread_mutex_init(&shvpu_decode_Private-> avCodec->fmem[i].filled, NULL); if (shvpu_decode_Private->features.tl_conv_mode == OMX_TRUE) { /*alignment offset*/ ypic_paddr = (ypic_paddr + (align - 1)) & ~(align - 1); #ifndef VPU_INTERNAL_TL /*access via IPMMUI*/ ypic_paddr = phys_to_ipmmui( shvpu_decode_Private->ipmmui_data, ypic_paddr); #endif } cpic_paddr = ypic_paddr + fmemsize; _fmem[i].Ypic_addr = ypic_paddr; logd("fmem[%d].Ypic_addr = %lx\n", i, _fmem[i].Ypic_addr); _fmem[i].Ypic_bot_addr = ypic_paddr + fmemsize / 2; logd("fmem[%d].Ypic_bot_addr = %lx\n", i, _fmem[i].Ypic_bot_addr); _fmem[i].Cpic_addr = cpic_paddr; logd("fmem[%d].Cpic_addr = %lx\n", i, _fmem[i].Cpic_addr); _fmem[i].Cpic_bot_addr = cpic_paddr + fmemsize / 4; logd("fmem[%d].Cpic_bot_addr = %lx\n", i, _fmem[i].Cpic_bot_addr); *fmem_cnt = i + 1; } fmem_x_size[MCVDEC_FMX_DEC] = fmem_x_size[MCVDEC_FMX_REF] = fmem_x_size[MCVDEC_FMX_FLT] = fmem_x; fmem_size[MCVDEC_FMX_DEC] = fmem_size[MCVDEC_FMX_REF] = fmem_size[MCVDEC_FMX_FLT] = fmemsize; if (*fmem_cnt == required_fmem_cnt) return MCVDEC_NML_END; /* cleanup on failure */ for (i=0; i < *fmem_cnt; i++) { shvpu_fmem_data *outbuf = &shvpu_decode_Private->avCodec->fmem[i]; phys_pmem_free(outbuf->fmem_start, outbuf->fmem_len); pthread_mutex_destroy(&outbuf->filled); } free(shvpu_decode_Private->avCodec->fmem); shvpu_decode_Private->avCodec->fmem = NULL; free(*fmem); *fmem = NULL; return MCVDEC_FMEM_SKIP_BY_USER; }
void *dballoc(pgctx_t *ctx, unsigned size) { void *addr; addr = pmem_alloc(&ctx->mm, _ptr(ctx, ctx->root->heap), size); return addr; }
int main() { JpgDecHal* jpgDecoder = new JpgDecHal(); if(!jpgDecoder->lock()) { xlog("can't lock resource"); return -1; } FILE *fp; int src_fd; unsigned long index; unsigned char *src_va; src_va = (unsigned char *)pmem_alloc(BUFFER_SIZE , &src_fd); if(src_va == NULL) { xlog("Can not allocate memory\n"); return -1; } fp = fopen("/data/422.jpg", "r"); fread(src_va , 1 , BUFFER_SIZE , fp); fclose(fp); jpgDecoder->setSrcAddr(src_va); // jpgDecoder->setSrcAddr(jpg_file); jpgDecoder->setSrcSize(BUFFER_SIZE); jpgDecoder->parse(); unsigned int w = jpgDecoder->getJpgWidth(); unsigned int h = jpgDecoder->getJpgHeight(); xlog("file width/height : %d %d", w, h); jpgDecoder->setOutWidth(w); jpgDecoder->setOutHeight(h); jpgDecoder->setOutFormat(JpgDecHal::kRGB_565_Format); int dst_size = w * h * 2; unsigned char *dst_buffer = (unsigned char *)malloc(dst_size); jpgDecoder->setDstAddr((unsigned char*) dst_buffer); jpgDecoder->setDstSize((unsigned int)dst_size); if(jpgDecoder->start()) { FILE *fp; fp = fopen("/data/ttt.raw", "w"); int index; for(index = 0 ; index < dst_size ; index++) { fprintf(fp, "%c", dst_buffer[index]); } fclose(fp); } else { xlog("decode failed~~~"); } pmem_free(src_va , BUFFER_SIZE , src_fd); jpgDecoder->unlock(); delete jpgDecoder; return 0; }
long decode_init(shvpu_decode_PrivateType *shvpu_decode_Private) { extern const MCVDEC_API_T avcdec_api_tbl; shvpu_decode_codec_t *pCodec; MCVDEC_CONTEXT_T *pContext; long ret; unsigned long ce_firmware_addr; struct codec_init_ops *cops; int num_views; /*** allocate memory ***/ pCodec = (shvpu_decode_codec_t *) calloc(1, sizeof(shvpu_decode_codec_t)); if (pCodec == NULL) return -1L; memset((void *)pCodec, 0, sizeof(shvpu_decode_codec_t)); /*** initialize driver ***/ ret = shvpu_driver_init(&pCodec->pDriver); if (ret != MCIPH_NML_END) return ret; extern unsigned long uio_virt_to_phys(void *, long, unsigned long); extern long notify_buffering(MCVDEC_CONTEXT_T *, long); extern long notify_userdata(MCVDEC_CONTEXT_T *, MCVDEC_USERDATA_T *, long); static const MCVDEC_CMN_PROPERTY_T _cprop_def = { .max_slice_cnt = 16, .fmem_alloc_mode = MCVDEC_ALLOC_FRAME_OR_FIELD, .output_unit = MCVDEC_UNIT_FRAME, .fmem_notice_mode = MCVDEC_FMEM_INDEX_ENABLE, .first_hdr_enable = MCVDEC_OFF, .ec_mode = MCVDEC_ECMODE_TYPE1, .max_imd_ratio_10 = 80, .func_userdata_callback = notify_userdata, .func_imd_buffering_ready = notify_buffering, .virt_to_phys_func = uio_virt_to_phys, #if defined(VPU5HA_SERIES) .buffering_pic_cnt = BUFFERING_COUNT, .ce_config = MCVDEC_2CE, .num_views = 1, #endif }; pCodec->cprop = _cprop_def; switch(shvpu_decode_Private->video_coding_type) { case OMX_VIDEO_CodingAVC: pCodec->cprop.stream_type = MCVDEC_H264, avcCodec_init(&pCodec->vpu_codec_params, shvpu_decode_Private); break; case OMX_VIDEO_CodingMPEG4: pCodec->cprop.stream_type = MCVDEC_MPEG4, pCodec->cprop.max_slice_cnt = 1, mpegCodec_init(&pCodec->vpu_codec_params, shvpu_decode_Private); break; default: goto free_pcodec; }; cops = pCodec->vpu_codec_params.ops; pCodec->cprop.func_get_intrinsic_header = cops->intrinsic_func_callback; pCodec->wbuf_dec.work_area_size = pCodec->vpu_codec_params.wbuf_size; pCodec->wbuf_dec.work_area_addr = calloc(1, pCodec->wbuf_dec.work_area_size); logd("work_area_addr = %p\n", pCodec->wbuf_dec.work_area_addr); ce_firmware_addr = shvpu5_load_firmware(pCodec->vpu_codec_params.ce_firmware_name, &pCodec->fw_size.ce_firmware_size); logd("ce_firmware_addr = %lx\n", ce_firmware_addr); pCodec->fw.vlc_firmware_addr = shvpu5_load_firmware(pCodec->vpu_codec_params.vlc_firmware_name, &pCodec->fw_size.vlc_firmware_size); logd("vlc_firmware_addr = %lx\n", pCodec->fw.vlc_firmware_addr); #if defined(VPU_VERSION_5) pCodec->fw.ce_firmware_addr = ce_firmware_addr; num_views = 1; #elif defined(VPU5HA_SERIES) pCodec->fw.ce_firmware_addr[0] = ce_firmware_addr; num_views = pCodec->cprop.num_views; #endif pCodec->cprop.codec_params = pCodec->vpu_codec_params.codec_params; cops->init_intrinsic_array(&shvpu_decode_Private->intrinsic); logd("----- invoke mcvdec_init_decoder() -----\n"); ret = mcvdec_init_decoder(pCodec->vpu_codec_params.api_tbl, &pCodec->cprop, &pCodec->wbuf_dec, &pCodec->fw, shvpu_decode_Private->intrinsic, pCodec->pDriver->pDrvInfo, &pContext); logd("----- resume from mcvdec_init_decoder() -----\n"); if (ret != MCIPH_NML_END) return ret; /*** initialize work area ***/ void *vaddr; unsigned long paddr; cops->calc_buf_sizes(num_views, shvpu_decode_Private, pCodec, &pCodec->imd_info.imd_buff_size, &pCodec->ir_info.ir_info_size, &pCodec->mv_info.mv_info_size); pCodec->imd_info.imd_buff_mode = MCVDEC_MODE_NOMAL; vaddr = pmem_alloc(pCodec->imd_info.imd_buff_size, 512, &pCodec->imd_info.imd_buff_addr); logd("imd_info.imd_buff_addr = %lx\n", pCodec->imd_info.imd_buff_addr); if (!vaddr) return -1; pCodec->ir_info.ir_info_addr = (unsigned long) pmem_alloc(pCodec->ir_info.ir_info_size, 512, &paddr); logd("ir_info.ir_info_addr = %lx\n", pCodec->ir_info.ir_info_addr); if (!pCodec->ir_info.ir_info_addr) return -1; vaddr = pmem_alloc(pCodec->mv_info.mv_info_size, 512, &pCodec->mv_info.mv_info_addr); logd("mv_info.mv_info_addr = %lx\n", pCodec->mv_info.mv_info_addr); if (!vaddr) return -1; logd("----- invoke mcvdec_set_vpu5_work_area() -----\n"); ret = mcvdec_set_vpu5_work_area(pContext, &pCodec->imd_info, &pCodec->ir_info, &pCodec->mv_info); logd("----- resume from mcvdec_set_vpu5_work_area() -----\n"); if (ret != MCIPH_NML_END) return ret; /*** set play mode ***/ logd("----- invoke mcvdec_set_play_mode() -----\n"); ret = mcvdec_set_play_mode(pContext, MCVDEC_PLAY_FORWARD, 0, 0); logd("----- resume from mcvdec_set_play_mode() -----\n"); pCodec->frameCount = pCodec->bufferingCount = 0; if (shvpu_decode_Private->enable_sync) { pCodec->codecMode = MCVDEC_MODE_SYNC; pCodec->outMode = MCVDEC_OUTMODE_PULL; } else { pCodec->codecMode = MCVDEC_MODE_BUFFERING; pCodec->outMode = MCVDEC_OUTMODE_PUSH; } pCodec->pSIQueue = calloc(1, sizeof(queue_t)); shvpu_queue_init(pCodec->pSIQueue); pCodec->enoughHeaders = pCodec->enoughPreprocess = OMX_FALSE; pthread_cond_init(&pCodec->cond_buffering, NULL); pthread_mutex_init(&pCodec->mutex_buffering, NULL); pContext->user_info = (void *)shvpu_decode_Private; shvpu_decode_Private->avCodec = pCodec; shvpu_decode_Private->avCodecContext = pContext; return ret; free_pcodec: free(pCodec); return -1; } void decode_deinit(shvpu_decode_PrivateType *shvpu_decode_Private) { if (shvpu_decode_Private) { shvpu_decode_codec_t *pCodec = shvpu_decode_Private->avCodec; decode_finalize(shvpu_decode_Private->avCodecContext); if (shvpu_decode_Private->intrinsic) pCodec->vpu_codec_params.ops->deinit_intrinsic_array (shvpu_decode_Private->intrinsic); #ifdef MERAM_ENABLE close_meram(&shvpu_decode_Private->meram_data); #endif if (!pCodec) return; if (shvpu_decode_Private->avCodec->fmem) { int i, bufs = shvpu_decode_Private->avCodec->fmem_size; shvpu_fmem_data *outbuf = shvpu_decode_Private->avCodec->fmem; for (i = 0 ; i < bufs; i++) { phys_pmem_free(outbuf->fmem_start, outbuf->fmem_len); pthread_mutex_destroy(&outbuf->filled); outbuf++; } free(shvpu_decode_Private->avCodec->fmem); shvpu_decode_Private->avCodec->fmem = NULL; } free(shvpu_decode_Private->avCodec->fmem_info); phys_pmem_free(pCodec->mv_info.mv_info_addr, pCodec->mv_info.mv_info_size); pmem_free((void *)pCodec->ir_info.ir_info_addr, pCodec->ir_info.ir_info_size); phys_pmem_free(pCodec->imd_info.imd_buff_addr, pCodec->imd_info.imd_buff_size); #if defined(VPU_VERSION_5) phys_pmem_free(pCodec->fw.ce_firmware_addr, pCodec->fw_size.ce_firmware_size); #elif defined(VPU5HA_SERIES) phys_pmem_free(pCodec->fw.ce_firmware_addr[0], pCodec->fw_size.ce_firmware_size); #endif phys_pmem_free(pCodec->fw.vlc_firmware_addr, pCodec->fw_size.vlc_firmware_size); pCodec->vpu_codec_params.ops->deinit_codec (&shvpu_decode_Private->avCodec->vpu_codec_params); free_remaining_streams(pCodec->pSIQueue); free(pCodec->pSIQueue); free(pCodec->wbuf_dec.work_area_addr); free(pCodec); shvpu_decode_Private->avCodec = NULL; } } int decode_finalize(void *context) { int ret; logd("----- invoke mcvdec_end_decoder() -----\n"); ret = mcvdec_end_decoder(context); logd("----- resume from mcvdec_end_decoder() -----\n"); return ret; }
int main() { printf("enter m4u test main()! \n"); // 1. alloc memory unsigned char *pSrc = NULL; unsigned char *pDst = NULL; unsigned int srcsize = SRC_W*SRC_H*SRC_BPP; unsigned int dstsize = DST_W*DST_H*DST_BPP; #ifdef __USE_M4U__ pSrc = new unsigned char[SRC_W*SRC_H*SRC_BPP]; pDst = new unsigned char[DST_W*DST_H*DST_BPP]; unsigned int srcPa = 0; unsigned int dstPa = 0; // alloc MVA ... MTKM4UDrv CM4u; CM4u.m4u_enable_m4u_func(M4U_CLNTMOD_ROT); CM4u.m4u_enable_m4u_func(M4U_CLNTMOD_WDMA); ///> --------------------4. config LCD port // config port M4U_PORT_STRUCT M4uPort; M4uPort.ePortID = M4U_PORT_ROT_EXT; M4uPort.Virtuality = 1; M4uPort.Security = 0; M4uPort.domain = 0; M4uPort.Distance = 1; M4uPort.Direction = 0; CM4u.m4u_config_port(&M4uPort); M4uPort.ePortID = M4U_PORT_WDMA0; M4uPort.Virtuality = 1; M4uPort.Security = 0; M4uPort.domain = 0; M4uPort.Distance = 1; M4uPort.Direction = 0; CM4u.m4u_config_port(&M4uPort); // allocate MVA buffer for m4u module CM4u.m4u_alloc_mva(M4U_CLNTMOD_ROT, // Module ID (unsigned int)pSrc, // buffer virtual start address srcsize, // buffer size 0, cache_coherent, &srcPa); // return MVA address CM4u.m4u_dump_info(M4U_CLNTMOD_ROT); CM4u.m4u_insert_tlb_range(M4U_CLNTMOD_ROT, srcPa, srcPa+srcsize-1, SEQ_RANGE_LOW_PRIORITY, 1); CM4u.m4u_alloc_mva(M4U_CLNTMOD_WDMA, // Module ID (unsigned int)pDst, // buffer virtual start address dstsize, // buffer size 0, cache_coherent, &dstPa); // return MVA address CM4u.m4u_dump_info(M4U_CLNTMOD_WDMA); CM4u.m4u_insert_tlb_range(M4U_CLNTMOD_WDMA, dstPa, dstPa+dstsize-1, SEQ_RANGE_LOW_PRIORITY, 1); //srcPa = 0x5000; //dstPa = 0x2000; printf("psrc=0x%x, srcPa=0x%x, pDst=0x%x, disPa=0x%x\n", pSrc, srcPa, pDst, dstPa); #else unsigned int srcPa = 0; unsigned int dstPa = 0; int src_ID, dst_ID; pSrc = (unsigned char *) pmem_alloc(SRC_W*SRC_H*SRC_BPP , &src_ID); srcPa = (unsigned int)pmem_get_phys(src_ID); pDst = (unsigned char *) pmem_alloc(DST_W*DST_H*DST_BPP , &dst_ID); dstPa = (unsigned int)pmem_get_phys(dst_ID); printf("psrc=0x%x, srcPa=0x%x, pDst=0x%x, disPa=0x%x\n", pSrc, srcPa, pDst, dstPa); #endif CM4u.m4u_monitor_start(M4U_PORT_ROT_EXT); if(pSrc==NULL || pDst==NULL) { printf("error: alloc mem fail! \n"); return 0; } memcpy(pSrc, rgb565_256x256, SRC_W*SRC_H*SRC_BPP); memset(pDst, 0, DST_W*DST_H*DST_BPP); printf("copy done\n"); int m4u_fd = open("/dev/M4U_device", O_RDWR); unsigned int regbase; regbase = (unsigned int)mmap((void*)0x50000000, 0x14000, (PROT_READ | PROT_WRITE | PROT_EXEC), MAP_SHARED, m4u_fd, 0x14000000); if(regbase != 0x50000000) { printf("error to mmap register!! 0x%x\n", regbase); printf("\n"); //while(1); } printf("mapped regbase = 0x%x, fd=%d\n", regbase, m4u_fd); #ifdef __USE_M4U__ if(!cache_coherent) { //CM4u.m4u_cache_flush_all(M4U_CLNTMOD_ROT); CM4u.m4u_cache_sync(M4U_CLNTMOD_ROT, M4U_CACHE_FLUSH_BEFORE_HW_READ_MEM, (unsigned int)pSrc, srcsize); CM4u.m4u_cache_sync(M4U_CLNTMOD_WDMA, M4U_CACHE_FLUSH_BEFORE_HW_WRITE_MEM, (unsigned int)pDst, dstsize); } #endif disp_subsys_reg_base_init(regbase); printf("-1\n"); // config path int module_list[] = {DISP_ROT, DISP_SCL, DISP_WDMA0}; // get mutex disp_mutex_lock(0, module_list, 3, SINGLE_MODE); printf("0\n"); // set path disp_set_path(module_list, 3); printf("1\n"); DpConfiguration dc; DpCommandRecorder cr; dc.w = SRC_W; dc.h = SRC_H; dc.scalingW = DST_W; dc.scalingH = DST_H; dc.roi.x = 0; dc.roi.y = 0; dc.roi.w = SRC_W; dc.roi.h = SRC_H; dc.enDither = false; dc.enTTD = false; dc.enBLS = false; dc.addr[0] = srcPa; //dc.addr[1] = 0; //dc.addr[2] = 0; dc.inFormat = SRC_FORMAT; dc.outFormat = eFMT_YUV_444_1P;//DST_FORMAT; dc.enSrcPitch = false; dc.srcPitch = 0; dc.enDstPitch = false; dc.dstPitch = 0; dc.rot = ROT_DEGREE_0; dc.flip = ROT_FLIP_DISABLE; dc.interlaced = false; dc.fieldID = 0; printf("2\n"); // 2. define DDP engines //DpEngine *pRot = DpEngine::Factory(tROT); DpEngine_ROT *pRot = new DpEngine_ROT; DpEngine_SCL *pScl = new DpEngine_SCL; DpEngine_WDMA *pWdma0 = new DpEngine_WDMA(0); printf("3\n"); // 3. config DDP engines DpCommandRecorder cmdRecord; pRot->onReset(cmdRecord); pRot->onConfig(dc,cmdRecord); pRot->onEnable(cmdRecord); dc.inFormat = eFMT_YUV_444_1P; dc.outFormat = eFMT_YUV_444_1P;//DST_FORMAT; pScl->onReset(cmdRecord); pScl->onConfig(dc,cmdRecord); pScl->onEnable(cmdRecord); printf("4\n"); dc.addr[0] = dstPa; dc.inFormat = eFMT_YUV_444_1P; dc.outFormat = DST_FORMAT;//DST_FORMAT; pWdma0->onReset(cmdRecord); pWdma0->onConfig(dc,cmdRecord); pWdma0->onEnable(cmdRecord); printf("5\n"); disp_mutex_unlock(0); pWdma0->onWaitDone(); printf("engine finished\n"); #ifdef __USE_M4U__ CM4u.m4u_monitor_stop(M4U_PORT_ROT_EXT); CM4u.m4u_invalid_tlb_range(M4U_CLNTMOD_WDMA, dstPa, dstPa+dstsize-1); CM4u.m4u_invalid_tlb_range(M4U_CLNTMOD_ROT, srcPa, srcPa+srcsize-1); CM4u.m4u_dealloc_mva(M4U_CLNTMOD_ROT, (unsigned int)pSrc, (unsigned int)srcsize, srcPa); CM4u.m4u_dealloc_mva(M4U_CLNTMOD_WDMA, (unsigned int)pDst, (unsigned int)dstsize, dstPa); #else pmem_free(pSrc, srcsize, src_ID); pmem_free(pDst, dstsize, dst_ID); #endif }
long encode_init(shvpu_avcenc_codec_t *pCodec) { MCVENC_CONTEXT_T *pContext; long ret; extern const MCVENC_API_T avcenc_api_tbl; MCVENC_CMN_PROPERTY_T *pCmnProp = &pCodec->cmnProp; AVCENC_OPTION_T *pAvcOpt = &pCodec->avcOpt; shvpu_work_memory_t *pCmnWorkMem = &pCodec->cmnWorkMem; int num_views; #if defined(VPU_VERSION_5) num_views = 1; #elif defined(VPU5HA_SERIES) num_views = pCmnProp->num_views; #endif size_t fwsize; ret = shvpu_driver_init(&pCodec->pDriver); if (ret != 0) return ret; /*** initialize encoder ***/ extern unsigned long uio_virt_to_phys(void *, long, unsigned long); #if defined(VPU_VERSION_5) pCmnWorkMem->wbuf_enc.work_area_size = 0x5800, /* 20 + 2KiB */ #elif defined(VPU5HA_SERIES) pCmnWorkMem->wbuf_enc.work_area_size = 12000 + (1024 * num_views) + (1024 * pCmnProp->max_rate_delay * num_views) + (10 * 1024); #endif pCmnWorkMem->wbuf_enc.work_area_addr = malloc_aligned(pCmnWorkMem->wbuf_enc.work_area_size, 4); logd("work_area_addr = %p\n", pCmnWorkMem->wbuf_enc.work_area_addr); pCmnWorkMem->fw.ce_firmware_addr = shvpu5_load_firmware(VPU5HG_FIRMWARE_PATH "/p264e_h.bin", &pCmnWorkMem->ce_fw_size); logd("ce_firmware_addr = %lx\n", pCmnWorkMem->fw.ce_firmware_addr); pCmnWorkMem->fw.vlc_firmware_addr = shvpu5_load_firmware(VPU5HG_FIRMWARE_PATH "/s264e.bin", &pCmnWorkMem->vlc_fw_size); logd("vlc_firmware_addr = %lx\n", pCmnWorkMem->fw.vlc_firmware_addr); logd("----- invoke mcvenc_init_encoder() -----\n"); ret = mcvenc_init_encoder((MCVENC_API_T *)&avcenc_api_tbl, pCmnProp, &pCmnWorkMem->wbuf_enc, &pCmnWorkMem->fw, pCodec->pDriver->pDrvInfo, &pContext); logd("----- resume from mcvenc_init_encoder() -----\n"); if (ret != MCIPH_NML_END) return ret; pContext->user_info = (void *)pCodec; logd("drv_info = %p\n", pCodec->pDriver->pDrvInfo); pCodec->pContext = pContext; /*** initialize work area ***/ void *vaddr; unsigned long paddr; size_t a, b, mb_width, mb_height; int i; a = 4 * pCmnProp->bitrate / 8; b = pCmnProp->x_pic_size * pCmnProp->y_pic_size * 4; pCmnWorkMem->imd_info.imd_buff_size = (a > b) ? a : b; pCmnWorkMem->imd_info.imd_buff_size = ((pCmnWorkMem->imd_info.imd_buff_size + 2047) / 2048) * 2048 * num_views; vaddr = pmem_alloc(pCmnWorkMem->imd_info.imd_buff_size, 32, &pCmnWorkMem->imd_info.imd_buff_addr); logd("pCmnWorkMem->imd_info.imd_buff_addr = %lx\n", pCmnWorkMem->imd_info.imd_buff_addr); if (!vaddr) return -1; pCmnWorkMem->ldec_info.ldec_num = 3; for (i=0; i<pCmnWorkMem->ldec_info.ldec_num; i++) { ret = alloc_fmem(pCmnProp->x_pic_size, pCmnProp->y_pic_size, &pCmnWorkMem->ldec_info.fmem[i][0]); if (ret < 0) return -1; pCmnWorkMem->ldec_info.fmem[i][1].Ypic_addr = 0U; pCmnWorkMem->ldec_info.fmem[i][1].Cpic_addr = 0U; } #if defined(VPU_VERSION_5) pCmnWorkMem->ir_info.ir_info_size = 4800; #elif defined(VPU5HA_SERIES) pCmnWorkMem->ir_info.ir_info_size = 6656; #endif pCmnWorkMem->ir_info.ir_info_addr = (unsigned long) pmem_alloc(pCmnWorkMem->ir_info.ir_info_size, 32, &paddr); logd("pCmnWorkMem->ir_info.ir_info_addr = %lx\n", pCmnWorkMem->ir_info.ir_info_addr); if (!pCmnWorkMem->ir_info.ir_info_addr) return -1; mb_width = (pCmnProp->x_pic_size + 15) / 16; mb_height = (pCmnProp->y_pic_size + 15) / 16; #if defined(VPU_VERSION_5) pCmnWorkMem->mv_info_size = ((16 * mb_width * ((mb_height + 1) / 2) + 255) / 256) * 256; #elif defined(VPU5HA_SERIES) pCmnWorkMem->mv_info_size = ((16 * mb_width * ((mb_height + 1) / 2) + 511) / 512) * 512 + 512; #endif vaddr = pmem_alloc(pCmnWorkMem->mv_info_size, 32, &pCmnWorkMem->mv_info.mv_info_addr[0]); logd("pCmnWorkMem->mv_info.mv_info_addr[0] = %lx\n", pCmnWorkMem->mv_info.mv_info_addr[0]); if (!vaddr) return -1; vaddr = pmem_alloc(pCmnWorkMem->mv_info_size, 32, &pCmnWorkMem->mv_info.mv_info_addr[1]); logd("pCmnWorkMem->mv_info.mv_info_addr[1] = %lx\n", pCmnWorkMem->mv_info.mv_info_addr[1]); if (!vaddr) return -1; pCmnWorkMem->mv_info.mv_info_addr[2] = 0; pCmnWorkMem->mv_info.mv_info_addr[3] = 0; if (!vaddr) return -1; logd("----- invoke mcvenc_set_vpu5_work_area() -----\n"); ret = mcvenc_set_vpu5_work_area(pContext, &pCmnWorkMem->imd_info, &pCmnWorkMem->ldec_info, &pCmnWorkMem->ir_info, &pCmnWorkMem->mv_info); logd("----- resume from mcvenc_set_vpu5_work_area() -----\n"); if (ret != MCIPH_NML_END) return ret; #if 0 /*** set common option ***/ logd("----- invoke mcvenc_set_option() -----\n"); ret = mcvenc_set_option(pContext, MCVDEC_PLAY_FORWARD, 0, 0); logd("----- resume from mcvenc_set_option() -----\n"); #endif /*** set avc specific option ***/ if (pCodec->avcOptSet) { #if defined(VPU_VERSION_5) pAvcOpt->sps_constraint_set0_flag = pCodec->sps_constraint_flags[0]; pAvcOpt->sps_constraint_set1_flag = pCodec->sps_constraint_flags[1]; pAvcOpt->sps_constraint_set2_flag = pCodec->sps_constraint_flags[2]; pAvcOpt->sps_constraint_set3_flag = pCodec->sps_constraint_flags[3]; #elif defined(VPU5HA_SERIES) memcpy(&pAvcOpt->sps_constraint_set_flag, &pCodec->sps_constraint_flags, sizeof(pCodec->sps_constraint_flags)); #endif logd("----- invoke avcdec_set_option() -----\n"); ret = avcenc_set_option(pContext, pAvcOpt, pCodec->avcOptSet); logd("----- resume from avcdec_set_option() = %d -----\n", ret); } #if 0 /*** set VUI ***/ ret = avcenc_set_VUI(); /*** set Q matrix ***/ ret = avcenc_set_Q_matrix(); #endif init_failed: return ret; }