void vApplicationIdleHook( void )
{
// Digital Input Disable on Analogue Pins
// When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled.
// The corresponding PIN Register bit will always read as zero when this bit is set. When an
// analogue signal is applied to the ADC7..0 pin and the digital input from this pin is not needed, this
// bit should be written logic one to reduce power consumption in the digital input buffer.
#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) // Mega with 2560
DIDR0 = 0xFF;
DIDR2 = 0xFF;
#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644PA__) || defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega1284PA__) // Goldilocks with 1284p
DIDR0 = 0xFF;
#elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega8__) // assume we're using an Arduino with 328p
DIDR0 = 0x3F;
#elif defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega16U4__) // assume we're using an Arduino Leonardo with 32u4
DIDR0 = 0xF3;
DIDR2 = 0x3F;
#endif
// Analogue Comparator Disable
// When the ACD bit is written logic one, the power to the Analogue Comparator is switched off.
// This bit can be set at any time to turn off the Analogue Comparator.
// This will reduce power consumption in Active and Idle mode.
// When changing the ACD bit, the Analogue Comparator Interrupt must be disabled by clearing the ACIE bit in ACSR.
// Otherwise an interrupt can occur when the ACD bit is changed.
ACSR &= ~_BV(ACIE);
ACSR |= _BV(ACD);
// There are several macros provided in this header file to actually put the device into sleep mode.
// The simplest way is to optionally set the desired sleep mode using set_sleep_mode()
// (it usually defaults to idle mode where the CPU is put on sleep but all peripheral clocks are still running),
// and then call sleep_mode(). This macro automatically sets the sleep enable bit,
// goes to sleep, and clears the sleep enable bit.
// SLEEP_MODE_IDLE (0)
// SLEEP_MODE_ADC _BV(SM0)
// SLEEP_MODE_PWR_DOWN _BV(SM1)
// SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1))
// SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2))
// SLEEP_MODE_EXT_STANDBY (_BV(SM0) | _BV(SM1) | _BV(SM2))
set_sleep_mode( SLEEP_MODE_IDLE );
portENTER_CRITICAL();
sleep_enable();
#if defined(BODS) && defined(BODSE) // only if there is support to disable the BOD.
sleep_bod_disable();
#endif
portEXIT_CRITICAL();
sleep_cpu(); // good night.
sleep_reset(); // reset the sleep_mode() faster than sleep_disable();
}
long lEMACSend( void )
{
static unsigned portBASE_TYPE uxTxBufferIndex = 0;
portBASE_TYPE xWaitCycles = 0;
long lReturn = pdPASS;
char *pcBuffer;
/* Is a buffer available? */
while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AT91C_TRANSMIT_OK ) )
{
/* There is no room to write the Tx data to the Tx buffer. Wait a
short while, then try again. */
xWaitCycles++;
if( xWaitCycles > emacMAX_WAIT_CYCLES )
{
/* Give up. */
lReturn = pdFAIL;
break;
}
else
{
vTaskDelay( emacBUFFER_WAIT_DELAY );
}
}
/* lReturn will only be pdPASS if a buffer is available. */
if( lReturn == pdPASS )
{
/* Copy the headers into the Tx buffer. These will be in the uIP buffer. */
pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;
memcpy( ( void * ) pcBuffer, ( void * ) uip_buf, emacTOTAL_FRAME_HEADER_SIZE );
if( uip_len > emacTOTAL_FRAME_HEADER_SIZE )
{
memcpy( ( void * ) &( pcBuffer[ emacTOTAL_FRAME_HEADER_SIZE ] ), ( void * ) uip_appdata, ( uip_len - emacTOTAL_FRAME_HEADER_SIZE ) );
}
/* Send. */
portENTER_CRITICAL();
{
if( uxTxBufferIndex >= ( NB_TX_BUFFERS - 1 ) )
{
/* Fill out the necessary in the descriptor to get the data sent. */
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( uip_len & ( unsigned long ) AT91C_LENGTH_FRAME )
| AT91C_LAST_BUFFER
| AT91C_TRANSMIT_WRAP;
uxTxBufferIndex = 0;
}
else
{
/* Fill out the necessary in the descriptor to get the data sent. */
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( uip_len & ( unsigned long ) AT91C_LENGTH_FRAME )
| AT91C_LAST_BUFFER;
uxTxBufferIndex++;
}
AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TSTART;
}
portEXIT_CRITICAL();
}
return lReturn;
}
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulSpeed;
unsigned long ulCD;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR_Wrapper )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned long ) 0 )
)
{
portENTER_CRITICAL();
{
/* Enable clock to USART0... */
AT91C_BASE_PS->PS_PCER = AT91C_PS_US0;
/* Disable all USART0 interrupt sources to begin... */
AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
/* Reset various status bits (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
AT91C_BASE_PIO->PIO_PDR = TXD0 | RXD0; /* Enable RXD and TXD pins */
AT91C_BASE_US0->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS;
/* Clear Transmit and Receive Counters */
AT91C_BASE_US0->US_RCR = 0;
AT91C_BASE_US0->US_TCR = 0;
/* Input clock to baud rate generator is MCK */
ulSpeed = configCPU_CLOCK_HZ * 10;
ulSpeed = ulSpeed / 16;
ulSpeed = ulSpeed / ulWantedBaud;
/* compute the error */
ulCD = ulSpeed / 10;
if ((ulSpeed - (ulCD * 10)) >= 5)
ulCD++;
/* Define the baud rate divisor register */
AT91C_BASE_US0->US_BRGR = ulCD;
/* Define the USART mode */
AT91C_BASE_US0->US_MR = US_CLKS_MCK | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1 | US_CHMODE_NORMAL;
/* Write the Timeguard Register */
AT91C_BASE_US0->US_TTGR = 0;
/* Setup the interrupt for USART0.
Store interrupt handler function address in USART0 vector register... */
AT91C_BASE_AIC->AIC_SVR[ portUSART0_AIC_CHANNEL ] = (unsigned long)vUART_ISR_Wrapper;
/* USART0 interrupt level-sensitive, priority 1... */
AT91C_BASE_AIC->AIC_SMR[ portUSART0_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 1;
/* Clear some pending USART0 interrupts (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
/* Enable USART0 interrupt sources (but not Tx for now)... */
AT91C_BASE_US0->US_IER = US_RXRDY;
/* Enable USART0 interrupts in the AIC... */
AT91C_BASE_AIC->AIC_IECR = ( 1 << portUSART0_AIC_CHANNEL );
/* Enable receiver and transmitter... */
AT91C_BASE_US0->US_CR = US_RXEN | US_TXEN;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
xSemaphoreHandle xEMACInit( void )
{
/* Code supplied by Atmel -------------------------------*/
/* Disable pull up on RXDV => PHY normal mode (not in test mode),
PHY has internal pull down. */
AT91C_BASE_PIOB->PIO_PPUDR = 1 << 15;
#if USE_RMII_INTERFACE != 1
/* PHY has internal pull down : set MII mode. */
AT91C_BASE_PIOB->PIO_PPUDR = 1 << 16;
#endif
/* Clear PB18 <=> PHY powerdown. */
AT91C_BASE_PIOB->PIO_PER = 1 << 18;
AT91C_BASE_PIOB->PIO_OER = 1 << 18;
AT91C_BASE_PIOB->PIO_CODR = 1 << 18;
/* After PHY power up, hardware reset. */
AT91C_BASE_RSTC->RSTC_RMR = emacRESET_KEY | emacRESET_LENGTH;
AT91C_BASE_RSTC->RSTC_RCR = emacRESET_KEY | AT91C_RSTC_EXTRST;
/* Wait for hardware reset end. */
while( !( AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL ) )
{
__asm volatile ( "NOP" );
}
__asm volatile ( "NOP" );
/* Setup the pins. */
AT91C_BASE_PIOB->PIO_ASR = emacPERIPHERAL_A_SETUP;
AT91C_BASE_PIOB->PIO_PDR = emacPERIPHERAL_A_SETUP;
/* Enable com between EMAC PHY.
Enable management port. */
AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE;
/* MDC = MCK/32. */
AT91C_BASE_EMAC->EMAC_NCFGR |= ( 2 ) << 10;
/* Wait for PHY auto init end (rather crude delay!). */
vTaskDelay( emacPHY_INIT_DELAY );
/* PHY configuration. */
#if USE_RMII_INTERFACE != 1
{
unsigned long ulControl;
/* PHY has internal pull down : disable MII isolate. */
vReadPHY( AT91C_PHY_ADDR, MII_BMCR, &ulControl );
vReadPHY( AT91C_PHY_ADDR, MII_BMCR, &ulControl );
ulControl &= ~BMCR_ISOLATE;
vWritePHY( AT91C_PHY_ADDR, MII_BMCR, ulControl );
}
#endif
/* Disable management port again. */
AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE;
#if USE_RMII_INTERFACE != 1
/* Enable EMAC in MII mode, enable clock ERXCK and ETXCK. */
AT91C_BASE_EMAC->EMAC_USRIO = AT91C_EMAC_CLKEN ;
#else
/* Enable EMAC in RMII mode, enable RMII clock (50MHz from oscillator
on ERFCK). */
AT91C_BASE_EMAC->EMAC_USRIO = AT91C_EMAC_RMII | AT91C_EMAC_CLKEN ;
#endif
/* End of code supplied by Atmel ------------------------*/
/* Setup the buffers and descriptors. */
prvSetupDescriptors();
/* Load our MAC address into the EMAC. */
prvSetupMACAddress();
/* Are we connected? */
if( prvProbePHY() )
{
/* Enable the interrupt! */
portENTER_CRITICAL();
{
prvSetupEMACInterrupt();
vPassEMACSemaphore( xSemaphore );
}
portEXIT_CRITICAL();
}
return xSemaphore;
}
void AccelerometerReadSingle(unsigned char RegisterAddress, unsigned char* pData)
{
EnableSmClkUser(ACCELEROMETER_USER);
xSemaphoreTake(AccelerometerMutex, portMAX_DELAY);
/* wait for bus to be free */
while (UCB1STAT & UCBBUSY);
AccelerometerBusy = 1;
LengthCount = 1;
Index = 0;
pAccelerometerData = pData;
/* transmit address */
ACCELEROMETER_IFG = 0;
ACCELEROMETER_CTL1 |= UCTR + UCTXSTT;
while (!(ACCELEROMETER_IFG & UCTXIFG));
/* write register address */
ACCELEROMETER_IFG = 0;
ACCELEROMETER_TXBUF = RegisterAddress;
while (!(ACCELEROMETER_IFG & UCTXIFG));
/* send a repeated start (same slave address now it is a read command)
* read possible extra character from rxbuffer
*/
ACCELEROMETER_RXBUF;
ACCELEROMETER_IFG = 0;
ACCELEROMETER_IE |= UCRXIE;
ACCELEROMETER_CTL1 &= ~UCTR;
/* for a read of a single byte the stop must be sent while the byte is being
* received. If this is interrupted an extra byte may be read.
* however, it will be discarded during the next read
*/
if (LengthCount == 1)
{
/* errata usci30: prevent interruption of sending stop
* so that only one byte is read
* this requires 62 us @ 320 kHz, 51 @ 400 kHz
*/
portENTER_CRITICAL();
ACCELEROMETER_CTL1 |= UCTXSTT;
while (ACCELEROMETER_CTL1 & UCTXSTT);
ACCELEROMETER_CTL1 |= UCTXSTP;
portEXIT_CRITICAL();
}
else
{
ACCELEROMETER_CTL1 |= UCTXSTT;
}
/* wait until all data has been received and the stop bit has been sent */
while (AccelerometerBusy);
while (ACCELEROMETER_CTL1 & UCTXSTP);
Index = 0;
pAccelerometerData = NULL;
DisableSmClkUser(ACCELEROMETER_USER);
xSemaphoreGive(AccelerometerMutex);
}
/*
* Controller task as described above.
*/
static void vCounterControlTask( void * pvParameters )
{
unsigned portLONG ulLastCounter;
portSHORT sLoops;
portSHORT sError = pdFALSE;
const portCHAR * const pcTaskStartMsg = "Priority manipulation tasks started.\r\n";
const portCHAR * const pcTaskFailMsg = "Priority manipulation Task Failed\r\n";
/* Just to stop warning messages. */
( void ) pvParameters;
/* Queue a message for printing to say the task has started. */
vPrintDisplayMessage( &pcTaskStartMsg );
for( ;; )
{
/* Start with the counter at zero. */
ulCounter = ( unsigned portLONG ) 0;
/* First section : */
/* Check the continuous count task is running. */
for( sLoops = 0; sLoops < priLOOPS; sLoops++ )
{
/* Suspend the continuous count task so we can take a mirror of the
shared variable without risk of corruption. */
vTaskSuspend( xContinuousIncrementHandle );
ulLastCounter = ulCounter;
vTaskResume( xContinuousIncrementHandle );
/* Now delay to ensure the other task has processor time. */
vTaskDelay( priSLEEP_TIME );
/* Check the shared variable again. This time to ensure mutual
exclusion the whole scheduler will be locked. This is just for
demo purposes! */
vTaskSuspendAll();
{
if( ulLastCounter == ulCounter )
{
/* The shared variable has not changed. There is a problem
with the continuous count task so flag an error. */
sError = pdTRUE;
xTaskResumeAll();
vPrintDisplayMessage( &pcTaskFailMsg );
vTaskSuspendAll();
}
}
xTaskResumeAll();
}
/* Second section: */
/* Suspend the continuous counter task so it stops accessing the shared variable. */
vTaskSuspend( xContinuousIncrementHandle );
/* Reset the variable. */
ulCounter = ( unsigned portLONG ) 0;
/* Resume the limited count task which has a higher priority than us.
We should therefore not return from this call until the limited count
task has suspended itself with a known value in the counter variable.
The scheduler suspension is not necessary but is included for test
purposes. */
vTaskSuspendAll();
vTaskResume( xLimitedIncrementHandle );
xTaskResumeAll();
/* Does the counter variable have the expected value? */
if( ulCounter != priMAX_COUNT )
{
sError = pdTRUE;
vPrintDisplayMessage( &pcTaskFailMsg );
}
if( sError == pdFALSE )
{
/* If no errors have occurred then increment the check variable. */
portENTER_CRITICAL();
usCheckVariable++;
portEXIT_CRITICAL();
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/* Resume the continuous count task and do it all again. */
vTaskResume( xContinuousIncrementHandle );
}
}
/////////////////////////////////////////////////////////////////////////////
// Local encoder callback function
// Should return:
// 1 if value has been changed
// 0 if value hasn't been changed
// -1 if invalid or unsupported encoder
/////////////////////////////////////////////////////////////////////////////
static s32 Encoder_Handler(seq_ui_encoder_t encoder, s32 incrementer)
{
#if 0
// leads to: comparison is always true due to limited range of data type
if( (encoder >= SEQ_UI_ENCODER_GP1 && encoder <= SEQ_UI_ENCODER_GP16) ) {
#else
if( encoder <= SEQ_UI_ENCODER_GP16 ) {
#endif
if( seq_ui_button_state.SELECT_PRESSED && !seq_ui_button_state.CHANGE_ALL_STEPS ) {
// select button pressed: indirect MUTED flag modification (taken over when select button depressed)
u16 mask = 1 << encoder;
if( incrementer < 0 || (incrementer == 0 && !(latched_mute & mask)) )
latched_mute |= mask;
else
latched_mute &= ~mask;
} else {
// select button not pressed: direct MUTED flag modification
// access to seq_core_trk[] must be atomic!
portENTER_CRITICAL();
u8 visible_track = SEQ_UI_VisibleTrackGet();
u16 mask = 1 << encoder;
u16 *muted = (u16 *)&seq_core_trk_muted;
if( seq_ui_button_state.CHANGE_ALL_STEPS ) {
switch( encoder ) {
case SEQ_UI_ENCODER_GP1:
case SEQ_UI_ENCODER_GP2:
*muted = 0xffff;
SEQ_UI_Msg(SEQ_UI_MSG_USER, 1000, "All Tracks", "muted");
break;
case SEQ_UI_ENCODER_GP3:
case SEQ_UI_ENCODER_GP4:
case SEQ_UI_ENCODER_GP5:
muted = (u16 *)&seq_core_trk[visible_track].layer_muted;
*muted = 0xffff;
SEQ_UI_Msg(SEQ_UI_MSG_USER, 1000, "All Layers", "of current Track muted");
break;
case SEQ_UI_ENCODER_GP6:
case SEQ_UI_ENCODER_GP7:
case SEQ_UI_ENCODER_GP8: {
*muted = 0xffff;
int track;
for(track=0; track<SEQ_CORE_NUM_TRACKS; ++track) {
seq_core_trk[track].layer_muted = 0xffff;
}
SEQ_UI_Msg(SEQ_UI_MSG_USER, 1000, "All Layers", "and Tracks muted");
} break;
case SEQ_UI_ENCODER_GP9:
case SEQ_UI_ENCODER_GP10:
*muted = 0x0000;
SEQ_UI_Msg(SEQ_UI_MSG_USER_R, 1000, "All Tracks", "unmuted");
break;
case SEQ_UI_ENCODER_GP11:
case SEQ_UI_ENCODER_GP12:
case SEQ_UI_ENCODER_GP13:
muted = (u16 *)&seq_core_trk[visible_track].layer_muted;
*muted = 0x0000;
SEQ_UI_Msg(SEQ_UI_MSG_USER_R, 1000, "All Layers", "of current Track unmuted");
break;
case SEQ_UI_ENCODER_GP14:
case SEQ_UI_ENCODER_GP15:
case SEQ_UI_ENCODER_GP16: {
*muted = 0x0000;
int track;
for(track=0; track<SEQ_CORE_NUM_TRACKS; ++track) {
seq_core_trk[track].layer_muted = 0x0000;
}
SEQ_UI_Msg(SEQ_UI_MSG_USER_R, 1000, "All Layers", "and Tracks unmuted");
} break;
}
} else {
if( seq_ui_button_state.MUTE_PRESSED )
muted = (u16 *)&seq_core_trk[visible_track].layer_muted;
else if( SEQ_BPM_IsRunning() ) { // Synched Mutes only when sequencer is running
if( !(*muted & mask) && seq_core_options.SYNCHED_MUTE && !seq_ui_button_state.FAST_ENCODERS ) { // Fast button will disable synched mute
muted = (u16 *)&seq_core_trk_synched_mute;
} else if( (*muted & mask) && seq_core_options.SYNCHED_UNMUTE && !seq_ui_button_state.FAST_ENCODERS ) { // Fast button will disable synched unmute
muted = (u16 *)&seq_core_trk_synched_unmute;
}
} else {
// clear synched mutes/unmutes if sequencer not running
seq_core_trk_synched_mute = 0;
seq_core_trk_synched_unmute = 0;
}
if( incrementer < 0 )
*muted |= mask;
else if( incrementer > 0 )
*muted &= ~mask;
else
*muted ^= mask;
}
portEXIT_CRITICAL();
if( muted == ((u16 *)&seq_core_trk_muted) ) {
// send to external
SEQ_MIDI_IN_ExtCtrlSend(SEQ_MIDI_IN_EXT_CTRL_MUTES, (*muted & mask) ? 127 : 0, encoder);
}
}
return 1; // value changed
}
return -1; // invalid or unsupported encoder
}
/////////////////////////////////////////////////////////////////////////////
// Local button callback function
// Should return:
// 1 if value has been changed
// 0 if value hasn't been changed
// -1 if invalid or unsupported button
/////////////////////////////////////////////////////////////////////////////
static s32 Button_Handler(seq_ui_button_t button, s32 depressed)
{
#if 0
// leads to: comparison is always true due to limited range of data type
if( button >= SEQ_UI_BUTTON_GP1 && button <= SEQ_UI_BUTTON_GP16 ) {
#else
if( button <= SEQ_UI_BUTTON_GP16 ) {
#endif
if( depressed ) return 0; // ignore when button depressed
// re-using encoder routine
return Encoder_Handler(button, 0);
}
switch( button ) {
case SEQ_UI_BUTTON_Select:
portENTER_CRITICAL();
if( depressed ) {
// select button released: take over latched mutes
if( seq_ui_button_state.MUTE_PRESSED ) {
u8 visible_track = SEQ_UI_VisibleTrackGet();
seq_core_trk[visible_track].layer_muted = latched_mute;
} else {
u16 new_mutes = latched_mute & ~seq_core_trk_muted;
if( SEQ_BPM_IsRunning() && seq_core_options.SYNCHED_MUTE && !seq_ui_button_state.FAST_ENCODERS ) // Fast button will disable synched mute
seq_core_trk_synched_mute |= new_mutes;
else
seq_core_trk_muted |= new_mutes;
u16 new_unmutes = ~latched_mute & seq_core_trk_muted;
if( SEQ_BPM_IsRunning() && seq_core_options.SYNCHED_UNMUTE && !seq_ui_button_state.FAST_ENCODERS ) // Fast button will disable synched unmute
seq_core_trk_synched_unmute |= new_unmutes;
else
seq_core_trk_muted &= ~new_unmutes;
}
} else {
// select pressed: init latched mutes which will be taken over once SELECT button released
if( seq_ui_button_state.MUTE_PRESSED ) {
u8 visible_track = SEQ_UI_VisibleTrackGet();
latched_mute = seq_core_trk[visible_track].layer_muted;
} else {
latched_mute = seq_core_trk_muted;
}
}
portEXIT_CRITICAL();
return 1;
}
return -1; // invalid or unsupported button
}
/////////////////////////////////////////////////////////////////////////////
// Local Display Handler function
// IN: <high_prio>: if set, a high-priority LCD update is requested
/////////////////////////////////////////////////////////////////////////////
static s32 LCD_Handler(u8 high_prio)
{
// layout:
// 00000000001111111111222222222233333333330000000000111111111122222222223333333333
// 01234567890123456789012345678901234567890123456789012345678901234567890123456789
// <--------------------------------------><-------------------------------------->
// > 1< 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
// ...horizontal VU meters...
// Mute All screen:
// 00000000001111111111222222222233333333330000000000111111111122222222223333333333
// 01234567890123456789012345678901234567890123456789012345678901234567890123456789
// <--------------------------------------><-------------------------------------->
// Mute Mute Mute all Tracks Unmute Unmute Unmute all Tracks
// all Tracks G1T1 Layers and all Layersall Tracks G1T1 Layers and all Layers
if( seq_ui_button_state.CHANGE_ALL_STEPS ) {
if( high_prio )
return 0;
SEQ_LCD_CursorSet(0, 0);
SEQ_LCD_PrintString(" Mute Mute Mute all Tracks Unmute Unmute Unmute all Tracks");
SEQ_LCD_CursorSet(0, 1);
SEQ_LCD_PrintString("all Tracks ");
SEQ_LCD_PrintGxTy(ui_selected_group, ui_selected_tracks);
SEQ_LCD_PrintString(" Layers and all Layersall Tracks ");
SEQ_LCD_PrintGxTy(ui_selected_group, ui_selected_tracks);
SEQ_LCD_PrintString(" Layers and all Layers");
return 0;
}
if( high_prio ) {
///////////////////////////////////////////////////////////////////////////
// frequently update VU meters
SEQ_LCD_CursorSet(0, 1);
u8 track;
u16 mute_flags = 0;
u16 mute_flags_from_midi = 0;
if( !ui_cursor_flash && seq_ui_button_state.SELECT_PRESSED ) {
mute_flags = latched_mute;
} else {
if( seq_ui_button_state.MUTE_PRESSED ) {
u8 visible_track = SEQ_UI_VisibleTrackGet();
mute_flags = seq_core_trk[visible_track].layer_muted;
mute_flags_from_midi = seq_core_trk[visible_track].layer_muted_from_midi;
} else {
mute_flags = seq_core_trk_muted;
}
}
if( seq_ui_button_state.MUTE_PRESSED ) {
u8 layer;
u16 mask = (1 << 0);
for(layer=0; layer<16; ++layer, mask <<= 1)
if( mute_flags_from_midi & mask ) {
SEQ_LCD_PrintString("MIDI ");
} else if( mute_flags & mask ) {
SEQ_LCD_PrintString("Mute ");
} else {
SEQ_LCD_PrintHBar((seq_layer_vu_meter[layer] >> 3) & 0xf);
}
} else {
int remaining_steps = (seq_core_steps_per_measure - seq_core_state.ref_step) + 1;
seq_core_trk_t *t = &seq_core_trk[0];
u16 mask = (1 << 0);
for(track=0; track<16; ++t, ++track, mask <<= 1)
if( mute_flags & mask ) {
if( !seq_ui_button_state.SELECT_PRESSED && (seq_core_trk_synched_unmute & mask) ) {
SEQ_LCD_PrintFormattedString("U%3d ", remaining_steps);
} else {
SEQ_LCD_PrintString("Mute ");
}
} else {
if( !seq_ui_button_state.SELECT_PRESSED && (seq_core_trk_synched_mute & mask) ) {
SEQ_LCD_PrintFormattedString("M%3d ", remaining_steps);
} else {
SEQ_LCD_PrintHBar(t->vu_meter >> 3);
}
}
}
} else {
/////////////////////////////////////////////////////////////////////////////
// fetches the pos entries of a song
// returns -1 if recursion counter reached max position
/////////////////////////////////////////////////////////////////////////////
s32 SEQ_SONG_FetchPos(u8 force_immediate_change, u8 dont_dump_mixer_map)
{
int recursion_ctr = 0;
u8 again;
do {
again = 0;
// stop song once recursion counter reached 64 loops
if( ++recursion_ctr >= 64 ) {
SEQ_BPM_Stop();
return -1; // recursion detected
}
// reset song position if we reached the end (loop over 128 steps)
if( song_pos >= SEQ_SONG_NUM_STEPS )
song_pos = 0;
// get step entry
seq_song_step_t *s = (seq_song_step_t *)&seq_song_steps[song_pos];
// branch depending on action
switch( s->action ) {
case SEQ_SONG_ACTION_End:
#if 0
if( song_active ) // not in phrase mode
SEQ_BPM_Stop();
#else
song_finished = 1; // deactivate song incrementer
#endif
break;
case SEQ_SONG_ACTION_JmpPos:
song_pos = s->action_value % SEQ_SONG_NUM_STEPS;
again = 1;
break;
case SEQ_SONG_ACTION_JmpSong: {
if( song_active ) { // not in phrase mode
u32 new_song_num = s->action_value % SEQ_SONG_NUM;
SEQ_SONG_Save(song_num);
SEQ_SONG_Load(new_song_num);
song_pos = 0;
again = 1;
}
} break;
case SEQ_SONG_ACTION_SelMixerMap:
SEQ_MIXER_Load(s->action_value);
SEQ_MIDI_IN_ExtCtrlSend(SEQ_MIDI_IN_EXT_CTRL_MIXER_MAP, s->action_value, 0);
if( !dont_dump_mixer_map )
SEQ_MIXER_SendAll();
++song_pos;
again = 1;
break;
case SEQ_SONG_ACTION_Tempo: {
float bpm = (float)s->action_value;
if( bpm < 25.0 )
bpm = 25.0;
float ramp = (float)s->pattern_g1;
SEQ_CORE_BPM_Update(bpm, ramp);
++song_pos;
again = 1;
} break;
case SEQ_SONG_ACTION_Mutes: {
// access to seq_core_trk[] must be atomic!
portENTER_CRITICAL();
seq_core_trk_muted =
((s->pattern_g1 & 0x0f) << 0) |
((s->pattern_g2 & 0x0f) << 4) |
((s->pattern_g3 & 0x0f) << 8) |
((s->pattern_g4 & 0x0f) << 12);
portEXIT_CRITICAL();
++song_pos;
again = 1;
} break;
case SEQ_SONG_ACTION_GuideTrack: {
if( s->action_value <= 16 )
seq_song_guide_track = s->action_value;
++song_pos;
again = 1;
} break;
default:
if( s->action >= SEQ_SONG_ACTION_Loop1 && s->action <= SEQ_SONG_ACTION_Loop16 ) {
song_loop_ctr = 0;
song_loop_ctr_max = s->action - SEQ_SONG_ACTION_Loop1;
// TODO: implement prefetching until end of step!
SEQ_SONG_FetchHlp_PatternChange(0, s->pattern_g1, s->bank_g1, force_immediate_change);
SEQ_SONG_FetchHlp_PatternChange(1, s->pattern_g2, s->bank_g2, force_immediate_change);
SEQ_SONG_FetchHlp_PatternChange(2, s->pattern_g3, s->bank_g3, force_immediate_change);
SEQ_SONG_FetchHlp_PatternChange(3, s->pattern_g4, s->bank_g4, force_immediate_change);
}
}
} while( again );
return 0; // no error
}
void vInitialiseTimerForIntQueueTest( void )
{
/* Ensure interrupts do not start until full configuration is complete. */
portENTER_CRITICAL();
{
EnablePRCR( PRC1_BIT );
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
/* Enable the timers. */
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
/* Enable compare match A interrupt request. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Clear the timer on compare match A. */
TMR0.TCR.BIT.CCLR = 1;
TMR2.TCR.BIT.CCLR = 1;
/* Set the compare match value. */
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
/* Enable TMR 0, 2 interrupts. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Map TMR0 CMIA0 interrupt to vector slot B number 128 and set
priority above the kernel's priority, but below the max syscall
priority. */
ICU.SLIBXR128.BYTE = 3; /* Three is TMR0 compare match A. */
IPR( PERIB, INTB128 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IEN( PERIB, INTB128 ) = 1;
/* Ensure that the flag is set to 0, otherwise the interrupt will not be
accepted. */
IR( PERIB, INTB128 ) = 0;
/* Do the same for TMR2, but to vector 129. */
ICU.SLIBXR129.BYTE = 9; /* Nine is TMR2 compare match A. */
IPR( PERIB, INTB129 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;
IEN( PERIB, INTB129 ) = 1;
IR( PERIB, INTB129 ) = 0;
}
portEXIT_CRITICAL();
}
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned char ucQueueLength )
{
unsigned short usSPBRG;
/* Create the queues used by the ISR's to interface to tasks. */
xRxedChars = xQueueCreate( ucQueueLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
xCharsForTx = xQueueCreate( ucQueueLength, ( unsigned portBASE_TYPE ) sizeof( char ) );
portENTER_CRITICAL();
/* Setup the IO pins to enable the USART IO. */
serTX_PIN = serINPUT; // YES really! See datasheet
serRX_PIN = serINPUT;
/* Set the TX config register. */
TXSTA = 0b00100000;
// ||||||||--bit0: TX9D = n/a
// |||||||---bit1: TRMT = ReadOnly
// ||||||----bit2: BRGH = High speed
// |||||-----bit3: SENDB = n/a
// ||||------bit4: SYNC = Asynchronous mode
// |||-------bit5: TXEN = Transmit enable
// ||--------bit6: TX9 = 8-bit transmission
// |---------bit7: CSRC = n/a
/* Set the Receive config register. */
RCSTA = 0b10010000;
// ||||||||--bit0: RX9D = ReadOnly
// |||||||---bit1: OERR = ReadOnly
// ||||||----bit2: FERR = ReadOnly
// |||||-----bit3: ADDEN = n/a
// ||||------bit4: CREN = Enable receiver
// |||-------bit5: SREN = n/a
// ||--------bit6: RX9 = 8-bit reception
// |---------bit7: SPEN = Serial port enabled
/* Calculate the baud rate generator value.
We use low-speed (BRGH=0), the formula is
SPBRG = ( ( FOSC / Desired Baud Rate ) / 64 ) - 1 */
usSPBRG = ( ( APROCFREQ / ulWantedBaud ) / 64 ) - 1;
if( usSPBRG > 255 )
{
SPBRG = 255;
}
else
{
SPBRG = usSPBRG;
}
/* Set the serial interrupts to use the same priority as the tick. */
bTXIP = serLOW_PRIORITY;
bRCIP = serLOW_PRIORITY;
/* Enable the Rx interrupt now, the Tx interrupt will get enabled when
we have data to send. */
bRCIE = serINTERRUPT_ENABLED;
portEXIT_CRITICAL();
/* Unlike other ports, this serial code does not allow for more than one
com port. We therefore don't return a pointer to a port structure and
can instead just return NULL. */
return NULL;
}
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn;
UART_InitTypeDef xUART1_Init;
GPIO_InitTypeDef GPIO_InitStructure;
/* Create the queues used to hold Rx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* Create the semaphore used to wake a task waiting for space to become
available in the FIFO. */
vSemaphoreCreateBinary( xTxFIFOSemaphore );
/* If the queue/semaphore was created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xTxFIFOSemaphore != serINVALID_QUEUE ) )
{
/* Pre take the semaphore so a task will block if it tries to access
it. */
xSemaphoreTake( xTxFIFOSemaphore, 0 );
/* Configure the UART. */
xUART1_Init.UART_WordLength = UART_WordLength_8D;
xUART1_Init.UART_StopBits = UART_StopBits_1;
xUART1_Init.UART_Parity = UART_Parity_No;
xUART1_Init.UART_BaudRate = ulWantedBaud;
xUART1_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
xUART1_Init.UART_Mode = UART_Mode_Tx_Rx;
xUART1_Init.UART_FIFO = UART_FIFO_Enable;
/* Enable the UART1 Clock */
SCU_APBPeriphClockConfig( __UART1, ENABLE );
/* Enable the GPIO3 Clock */
SCU_APBPeriphClockConfig( __GPIO3, ENABLE );
/* Configure UART1_Rx pin GPIO3.2 */
GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
GPIO_Init( GPIO3, &GPIO_InitStructure );
/* Configure UART1_Tx pin GPIO3.3 */
GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
GPIO_Init( GPIO3, &GPIO_InitStructure );
portENTER_CRITICAL();
{
/* Configure the UART itself. */
UART_DeInit( UART1 );
UART_Init( UART1, &xUART1_Init );
UART_ITConfig( UART1, UART_IT_Receive | UART_IT_Transmit, ENABLE );
UART1->ICR = serCLEAR_ALL_INTERRUPTS;
UART_LoopBackConfig( UART1, DISABLE );
UART_IrDACmd( IrDA1, DISABLE );
/* Configure the VIC for the UART interrupts. */
VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
VIC_ITCmd( UART1_ITLine, ENABLE );
UART_Cmd( UART1, ENABLE );
lTaskWaiting = pdFALSE;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
void IRAM_ATTR spicommon_dmaworkaround_transfer_active(int dmachan)
{
portENTER_CRITICAL(&dmaworkaround_mux);
dmaworkaround_channels_busy[dmachan-1] = 1;
portEXIT_CRITICAL(&dmaworkaround_mux);
}
/* See the header file for descriptions of public functions. */
long lEMACSend( char *pcFrom, unsigned long ulLength, long lEndOfFrame )
{
static unsigned portBASE_TYPE uxTxBufferIndex = 0;
portBASE_TYPE xWaitCycles = 0;
long lReturn = pdPASS;
char *pcBuffer;
unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
/* If the length of data to be transmitted is greater than each individual
transmit buffer then the data will be split into more than one buffer.
Loop until the entire length has been buffered. */
while( ulDataBuffered < ulLength )
{
/* Is a buffer available? */
while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AT91C_TRANSMIT_OK ) )
{
/* There is no room to write the Tx data to the Tx buffer. Wait a
short while, then try again. */
xWaitCycles++;
if( xWaitCycles > emacMAX_WAIT_CYCLES )
{
/* Give up. */
lReturn = pdFAIL;
break;
}
else
{
vTaskDelay( emacBUFFER_WAIT_DELAY );
}
}
/* lReturn will only be pdPASS if a buffer is available. */
if( lReturn == pdPASS )
{
portENTER_CRITICAL();
{
/* Get the address of the buffer from the descriptor, then copy
the data into the buffer. */
pcBuffer = ( char * ) xTxDescriptors[ uxTxBufferIndex ].addr;
/* How much can we write to the buffer? */
ulDataRemainingToSend = ulLength - ulDataBuffered;
if( ulDataRemainingToSend <= ETH_TX_BUFFER_SIZE )
{
/* We can write all the remaining bytes. */
ulLengthToSend = ulDataRemainingToSend;
}
else
{
/* We can not write more than ETH_TX_BUFFER_SIZE in one go. */
ulLengthToSend = ETH_TX_BUFFER_SIZE;
}
/* Copy the data into the buffer. */
memcpy( ( void * ) pcBuffer, ( void * ) &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
ulDataBuffered += ulLengthToSend;
/* Is this the last data for the frame? */
if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
{
/* No more data remains for this frame so we can start the
transmission. */
ulLastBuffer = AT91C_LAST_BUFFER;
}
else
{
/* More data to come for this frame. */
ulLastBuffer = 0;
}
/* Fill out the necessary in the descriptor to get the data sent,
then move to the next descriptor, wrapping if necessary. */
if( uxTxBufferIndex >= ( NB_TX_BUFFERS - 1 ) )
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AT91C_LENGTH_FRAME )
| ulLastBuffer
| AT91C_TRANSMIT_WRAP;
uxTxBufferIndex = 0;
}
else
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AT91C_LENGTH_FRAME )
| ulLastBuffer;
uxTxBufferIndex++;
}
/* If this is the last buffer to be sent for this frame we can
start the transmission. */
if( ulLastBuffer )
{
AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TSTART;
}
}
portEXIT_CRITICAL();
}
else
{
break;
}
}
return lReturn;
}
int kirim_file_ke_ftp(char *abs_path, char *nf) {
char posisifile[128];
char namafile[32];
int res, flag=1, oz=0, rspn=1;
unsigned long int size, i,uf;
FIL fd2;
time_t timeval;
strcpy(posisifile, abs_path);
strcpy(namafile, nf);
#ifdef DEBUG_FTP
printf("___path: %s, nama: %s\r\n", posisifile, namafile);
#endif
if (res = f_open(&fd2, abs_path, FA_READ | FA_WRITE)) {
printf("%s(): Buka file error %d !\r\n", __FUNCTION__, res);
return 0;
}
f_lseek( &fd2, fd2.fsize - 6 );
f_read( &fd2, abs_path, 6, &res);
#ifdef DEBUG_FTP
//printf("___mo dikirim, CEK %s @@@, nf: %s\r\n", posisifile, namafile);
#endif
files++;
if (strncmp( abs_path, "SENDED", 6) == 0) {
#ifdef DEBUG_FTP
printf("file %s sudah dikirim !\r\n", posisifile);
#endif
file_sudah++;
} else {
f_lseek( &fd2, 0); // kembalikan pointer //
flag=55;
oz=0;
while(1) {
rspn = upload_file(namafile);
#ifdef DEBUG_FTP
//printf("respon upload : %d, oz: %d, flag: %d\r\n", rspn, oz, flag);
#endif
if (rspn==0) {
flag = 77;
#ifdef DEBUG_FTP
printf("_____KELUAR loop, flag: %d\r\n", flag);
#endif
break;
}
vTaskDelay(10);
//cek_awal();
oz++;
if (oz>20) break;
}
if (flag==77) {
size = sizeof (abs_path);
#ifdef DEBUG_FTP
//printf("Sudah konek !!!...........Kirim data size: %d, res: %d!!!\r\n", size, res);
#endif
for (;;) {
f_read( &fd2, abs_path, size, &res);
//printf("res: %d\r\n");
portENTER_CRITICAL();
for (i=0; i<res; i++) {
//tulis_char( abs_path[i] );
serX_putchar(PAKAI_GSM_FTP, &abs_path[i], 1000);
}
portEXIT_CRITICAL();
if ( res < size ) break;
}
//printf("kirim data: %d byte\r\n", i);
// untuk mengakhiri data ftp //
vTaskDelay(100);
oz=0;
while(1) {
if (oz>50) {
status_modem = 0;
#ifdef PAKAI_SELENOID
printf("__RESTART MODEM__");
unset_selenoid(1); // mati relay 1
vTaskDelay(500);
set_selenoid(1); // hidup relay 1
#endif
break;
}
oz++;
uf = send_etx(oz);
if (uf == 0) {
flag = 88;
break;
}
/*
if (uf==11) {
flag = 77;
break;
}
//*/
vTaskDelay(500);
//cek_awal();
}
if (flag==77) {
f_close( &fd2 );
printf("Upload GAGAL parsial !!! tanpa ETX\r\n");
oz=0;
return 90;
}
// tulis SENDED pada akhir file //
sprintf(abs_path, "%s", ctime( &timeval ));
sprintf( &abs_path[24], "SENDED");
#ifdef DEBUG_FTP
printf("TULIS %s \r\n", abs_path);
#endif
f_write( &fd2, abs_path, strlen(abs_path), &res);
file_sukses++;
printf("FILE %s terkirim ke FTP\r\n", posisifile);
} else {
printf("Upload %s file ERROR !\r\n", namafile);
//break;
}
}
f_close( &fd2 );
vTaskDelay(100); // kasih waktu buat proses yg lain.
}
unsigned long lMACBSend(volatile avr32_macb_t *macb, const void *pvFrom, unsigned long ulLength, long lEndOfFrame)
{
const unsigned char *pcFrom = pvFrom;
static unsigned long uxTxBufferIndex = 0;
void *pcBuffer;
unsigned long ulLastBuffer, ulDataBuffered = 0, ulDataRemainingToSend, ulLengthToSend;
/* If the length of data to be transmitted is greater than each individual
transmit buffer then the data will be split into more than one buffer.
Loop until the entire length has been buffered. */
while( ulDataBuffered < ulLength )
{
// Is a buffer available ?
while( !( xTxDescriptors[ uxTxBufferIndex ].U_Status.status & AVR32_TRANSMIT_OK ) )
{
// There is no room to write the Tx data to the Tx buffer.
// Wait a short while, then try again.
#ifdef FREERTOS_USED
vTaskDelay( BUFFER_WAIT_DELAY );
#else
__asm__ __volatile__ ("nop");
#endif
}
portENTER_CRITICAL();
{
// Get the address of the buffer from the descriptor,
// then copy the data into the buffer.
pcBuffer = ( void * ) xTxDescriptors[ uxTxBufferIndex ].addr;
// How much can we write to the buffer ?
ulDataRemainingToSend = ulLength - ulDataBuffered;
if( ulDataRemainingToSend <= ETHERNET_CONF_TX_BUFFER_SIZE )
{
// We can write all the remaining bytes.
ulLengthToSend = ulDataRemainingToSend;
}
else
{
// We can't write more than ETH_TX_BUFFER_SIZE in one go.
ulLengthToSend = ETHERNET_CONF_TX_BUFFER_SIZE;
}
// Copy the data into the buffer.
memcpy( pcBuffer, &( pcFrom[ ulDataBuffered ] ), ulLengthToSend );
ulDataBuffered += ulLengthToSend;
// Is this the last data for the frame ?
if( lEndOfFrame && ( ulDataBuffered >= ulLength ) )
{
// No more data remains for this frame so we can start the transmission.
ulLastBuffer = AVR32_LAST_BUFFER;
}
else
{
// More data to come for this frame.
ulLastBuffer = 0;
}
// Fill out the necessary in the descriptor to get the data sent,
// then move to the next descriptor, wrapping if necessary.
if( uxTxBufferIndex >= ( ETHERNET_CONF_NB_TX_BUFFERS - 1 ) )
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
| ulLastBuffer
| AVR32_TRANSMIT_WRAP;
uxTxBufferIndex = 0;
}
else
{
xTxDescriptors[ uxTxBufferIndex ].U_Status.status = ( ulLengthToSend & ( unsigned long ) AVR32_LENGTH_FRAME )
| ulLastBuffer;
uxTxBufferIndex++;
}
/* If this is the last buffer to be sent for this frame we can
start the transmission. */
if( ulLastBuffer )
{
macb->ncr |= AVR32_MACB_TSTART_MASK;
}
}
portEXIT_CRITICAL();
}
return ulLength;
}
/*-----------------------------------------------------------*/
void i2cMessage( const unsigned char * const pucMessage, long lMessageLength, unsigned char ucSlaveAddress, unsigned short usBufferAddress, unsigned long ulDirection, SemaphoreHandle_t xMessageCompleteSemaphore, TickType_t xBlockTime )
{
extern volatile xI2CMessage *pxCurrentMessage;
xI2CMessage *pxNextFreeMessage;
signed portBASE_TYPE xReturn;
portENTER_CRITICAL();
{
/* This message is guaranteed to be free as there are two more messages
than spaces in the queue allowing for one message to be in process of
being transmitted and one to be left free. */
pxNextFreeMessage = &( xTxMessages[ ulNextFreeMessage ] );
/* Fill the message with the data to be sent. */
/* Pointer to the actual data. Only a pointer is stored (i.e. the
actual data is not copied, so the data being pointed to must still
be valid when the message eventually gets sent (it may be queued for
a while. */
pxNextFreeMessage->pucBuffer = ( unsigned char * ) pucMessage;
/* This is the address of the I2C device we are going to transmit this
message to. */
pxNextFreeMessage->ucSlaveAddress = ucSlaveAddress | ( unsigned char ) ulDirection;
/* A semaphore can be used to allow the I2C ISR to indicate that the
message has been sent. This can be NULL if you don't want to wait for
the message transmission to complete. */
pxNextFreeMessage->xMessageCompleteSemaphore = xMessageCompleteSemaphore;
/* How many bytes are to be sent? */
pxNextFreeMessage->lMessageLength = lMessageLength;
/* The address within the WIZnet device to which the data will be
written. This could be the address of a register, or alternatively
a location within the WIZnet Tx buffer. */
pxNextFreeMessage->ucBufferAddressLowByte = ( unsigned char ) ( usBufferAddress & 0xff );
/* Second byte of the address. */
usBufferAddress >>= 8;
pxNextFreeMessage->ucBufferAddressHighByte = ( unsigned char ) ( usBufferAddress & 0xff );
/* Increment to the next message in the array - with a wrap around check. */
ulNextFreeMessage++;
if( ulNextFreeMessage >= ( i2cQUEUE_LENGTH + i2cEXTRA_MESSAGES ) )
{
ulNextFreeMessage = ( unsigned long ) 0;
}
/* Is the I2C interrupt in the middle of transmitting a message? */
if( *pulBusFree == ( unsigned long ) pdTRUE )
{
/* No message is currently being sent or queued to be sent. We
can start the ISR sending this message immediately. */
pxCurrentMessage = pxNextFreeMessage;
I2C_I2CONCLR = i2cSI_BIT;
I2C_I2CONSET = i2cSTA_BIT;
*pulBusFree = ( unsigned long ) pdFALSE;
}
else
{
/* The I2C interrupt routine is mid sending a message. Queue
this message ready to be sent. */
xReturn = xQueueSend( xMessagesForTx, &pxNextFreeMessage, xBlockTime );
/* We may have blocked while trying to queue the message. If this
was the case then the interrupt would have been enabled and we may
now find that the I2C interrupt routine is no longer sending a
message. */
if( ( *pulBusFree == ( unsigned long ) pdTRUE ) && ( xReturn == pdPASS ) )
{
/* Get the next message in the queue (this should be the
message we just posted) and start off the transmission
again. */
xQueueReceive( xMessagesForTx, &pxNextFreeMessage, i2cNO_BLOCK );
pxCurrentMessage = pxNextFreeMessage;
I2C_I2CONCLR = i2cSI_BIT;
I2C_I2CONSET = i2cSTA_BIT;
*pulBusFree = ( unsigned long ) pdFALSE;
}
}
}
portEXIT_CRITICAL();
}
bool xMACBInit(volatile avr32_macb_t *macb)
{
bool global_interrupt_enabled = Is_global_interrupt_enabled();
volatile unsigned long status;
// generate an hardware reset of the phy
ethernet_phy_hw_reset();
// generate a software reset of the phy
ethernet_phy_sw_reset(macb);
// set up registers
macb->ncr = 0;
macb->tsr = ~0UL;
macb->rsr = ~0UL;
if (global_interrupt_enabled) Disable_global_interrupt();
macb->idr = ~0UL;
status = macb->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
#if ETHERNET_CONF_USE_RMII_INTERFACE
// RMII used, set 0 to the USRIO Register
macb->usrio &= ~AVR32_MACB_RMII_MASK;
#else
// RMII not used, set 1 to the USRIO Register
macb->usrio |= AVR32_MACB_RMII_MASK;
#endif
// Load our MAC address into the MACB.
prvSetupMACAddress(macb);
// Setup the buffers and descriptors.
prvSetupDescriptors(macb);
#if ETHERNET_CONF_SYSTEM_CLOCK <= 20000000
macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV8 << AVR32_MACB_NCFGR_CLK_OFFSET);
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 40000000
macb->ncfgr |= (AVR32_MACB_NCFGR_CLK_DIV16 << AVR32_MACB_NCFGR_CLK_OFFSET);
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 80000000
macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV32 << AVR32_MACB_NCFGR_CLK_OFFSET;
#elif ETHERNET_CONF_SYSTEM_CLOCK <= 160000000
macb->ncfgr |= AVR32_MACB_NCFGR_CLK_DIV64 << AVR32_MACB_NCFGR_CLK_OFFSET;
#else
# error System clock too fast
#endif
// Are we connected?
if( prvProbePHY(macb) == true )
{
// Enable the interrupt!
portENTER_CRITICAL();
{
prvSetupMACBInterrupt(macb);
}
portEXIT_CRITICAL();
// Enable Rx and Tx, plus the stats register.
macb->ncr = AVR32_MACB_NCR_TE_MASK | AVR32_MACB_NCR_RE_MASK;
return (true);
}
return (false);
}
__attribute__((weak)) void vPortSuppressTicksAndSleep(TickType_t xExpectedIdleTime) {
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;
TickCounter_t tmp; /* because of how we get the current tick counter */
bool tickISRfired;
/* Make sure the tick timer reload value does not overflow the counter. */
if(xExpectedIdleTime>xMaximumPossibleSuppressedTicks) {
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
}
/* Stop the tick timer momentarily. The time the counter is stopped for
* is accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time.
*/
DISABLE_TICK_COUNTER();
/* Calculate the reload value required to wait xExpectedIdleTime
* tick periods. -1 is used because this code will execute part way
* through one of the tick periods.
*/
GET_TICK_CURRENT_VAL(&tmp);
ulReloadValue = tmp+(UL_TIMER_COUNTS_FOR_ONE_TICK*(xExpectedIdleTime-1UL));
if (ulReloadValue>ulStoppedTimerCompensation) {
ulReloadValue -= ulStoppedTimerCompensation;
}
/* Enter a critical section but don't use the taskENTER_CRITICAL()
* method as that will mask interrupts that should exit sleep mode.
*/
TICKLESS_DISABLE_INTERRUPTS();
/* If a context switch is pending or a task is waiting for the scheduler
* to be unsuspended then abandon the low power entry.
*/
if (eTaskConfirmSleepModeStatus()==eAbortSleep) {
ENABLE_TICK_COUNTER(); /* Restart SysTick. */
TICKLESS_ENABLE_INTERRUPTS();
} else {
#if configUSE_LP_TIMER
DisableDevice();
ClearInterruptFlag();
WriteCompareReg(xExpectedIdleTime-1);
EnableDevice(); /* start timer */
#else
SET_TICK_DURATION(ulReloadValue); /* Set the new reload value. */
RESET_TICK_COUNTER_VAL(); /* Reset the counter. */
ENABLE_TICK_COUNTER(); /* Restart tick timer. */
TICK_INTERRUPT_FLAG_RESET(); /* reset flag so we know later if it has fired */
#endif
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
* set its parameter to 0 to indicate that its implementation contains
* its own wait for interrupt or wait for event instruction, and so wfi
* should not be executed again. However, the original expected idle
* time variable must remain unmodified, so a copy is taken.
*/
/* CPU *HAS TO WAIT* in the sequence below for an interrupt. If vOnPreSleepProcessing() is not used, a default implementation is provided */
/* default wait/sleep code */
__asm volatile("dsb");
__asm volatile("wfi");
__asm volatile("isb");
/* ----------------------------------------------------------------------------
* Here the CPU *HAS TO BE* low power mode, waiting to wake up by an interrupt
* ----------------------------------------------------------------------------*/
/* Stop tick counter. Again, the time the tick counter is stopped for is
* accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time.
*/
tickISRfired = TICK_INTERRUPT_HAS_FIRED(); /* need to check Interrupt flag here, as might be modified below */
DISABLE_TICK_COUNTER();
TICKLESS_ENABLE_INTERRUPTS();/* Re-enable interrupts */
if (tickISRfired) {
/* The tick interrupt has already executed, and the timer
* count reloaded with the modulo/match value.
* Reset the counter register with whatever remains of
* this tick period.
*/
GET_TICK_CURRENT_VAL(&tmp);
#if COUNTS_UP
SET_TICK_DURATION((UL_TIMER_COUNTS_FOR_ONE_TICK-1UL)-tmp);
#else
SET_TICK_DURATION((UL_TIMER_COUNTS_FOR_ONE_TICK-1UL)-(ulReloadValue-tmp));
#endif
/* The tick interrupt handler will already have pended the tick
* processing in the kernel. As the pending tick will be
* processed as soon as this function exits, the tick value
* maintained by the tick is stepped forward by one less than the
* time spent waiting.
*/
ulCompleteTickPeriods = xExpectedIdleTime-1UL;
} else {
/* Something other than the tick interrupt ended the sleep.
* Work out how long the sleep lasted rounded to complete tick
* periods (not the ulReload value which accounted for part ticks).
*/
GET_TICK_CURRENT_VAL(&tmp);
ulCompletedSysTickIncrements = (xExpectedIdleTime*UL_TIMER_COUNTS_FOR_ONE_TICK)-tmp;
/* How many complete tick periods passed while the processor was waiting? */
ulCompleteTickPeriods = ulCompletedSysTickIncrements/UL_TIMER_COUNTS_FOR_ONE_TICK;
/* The reload value is set to whatever fraction of a single tick period remains. */
SET_TICK_DURATION(((ulCompleteTickPeriods+1)*UL_TIMER_COUNTS_FOR_ONE_TICK)-ulCompletedSysTickIncrements);
}
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
value. The critical section is used to ensure the tick interrupt
can only execute once in the case that the reload register is near
zero.
*/
RESET_TICK_COUNTER_VAL();
portENTER_CRITICAL();
{
ENABLE_TICK_COUNTER();
vTaskStepTick(ulCompleteTickPeriods);
SET_TICK_DURATION(UL_TIMER_COUNTS_FOR_ONE_TICK-1UL);
}
portEXIT_CRITICAL();
}
}
static void prvChangePriorityWhenSuspendedTask( void *pvParameters )
{
const portCHAR * const pcTaskStartMsg = "Priority change when suspended task started.\r\n";
const portCHAR * const pcTaskFailMsg = "Priority change when suspended task failed.\r\n";
/* Just to stop warning messages. */
( void ) pvParameters;
/* Queue a message for printing to say the task has started. */
vPrintDisplayMessage( &pcTaskStartMsg );
for( ;; )
{
/* Start with the counter at 0 so we know what the counter should be
when we check it next. */
ulPrioritySetCounter = ( unsigned portLONG ) 0;
/* Resume the helper task. At this time it has a priority lower than
ours so no context switch should occur. */
vTaskResume( xChangePriorityWhenSuspendedHandle );
/* Check to ensure the task just resumed has not executed. */
portENTER_CRITICAL();
{
if( ulPrioritySetCounter != ( unsigned portLONG ) 0 )
{
xPriorityRaiseWhenSuspendedError = pdTRUE;
vPrintDisplayMessage( &pcTaskFailMsg );
}
}
portEXIT_CRITICAL();
/* Now try raising the priority while the scheduler is suspended. */
vTaskSuspendAll();
{
vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, ( configMAX_PRIORITIES - 1 ) );
/* Again, even though the helper task has a priority greater than
ours, it should not have executed yet because the scheduler is
suspended. */
portENTER_CRITICAL();
{
if( ulPrioritySetCounter != ( unsigned portLONG ) 0 )
{
xPriorityRaiseWhenSuspendedError = pdTRUE;
vPrintDisplayMessage( &pcTaskFailMsg );
}
}
portEXIT_CRITICAL();
}
xTaskResumeAll();
/* Now the scheduler has been resumed the helper task should
immediately preempt us and execute. When it executes it will increment
the ulPrioritySetCounter exactly once before suspending itself.
We should now always find the counter set to 1. */
portENTER_CRITICAL();
{
if( ulPrioritySetCounter != ( unsigned portLONG ) 1 )
{
xPriorityRaiseWhenSuspendedError = pdTRUE;
vPrintDisplayMessage( &pcTaskFailMsg );
}
}
portEXIT_CRITICAL();
/* Delay until we try this again. */
vTaskDelay( priSLEEP_TIME * 2 );
/* Set the priority of the helper task back ready for the next
execution of this task. */
vTaskSuspendAll();
vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, tskIDLE_PRIORITY );
xTaskResumeAll();
}
}
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
uip_ipaddr_t xIPAddr;
struct timer periodic_timer, arp_timer;
extern void ( vEMAC_ISR_Wrapper )( void );
/* Create the semaphore used by the ISR to wake this task. */
vSemaphoreCreateBinary( xEMACSemaphore );
/* Initialise the uIP stack. */
timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
uip_init();
uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
uip_sethostaddr( xIPAddr );
httpd_init();
/* Initialise the MAC. */
while( Init_EMAC() != pdPASS )
{
vTaskDelay( uipINIT_WAIT );
}
portENTER_CRITICAL();
{
MAC_INTENABLE = INT_RX_DONE;
VICIntEnable |= 0x00200000;
VICVectAddr21 = ( portLONG ) vEMAC_ISR_Wrapper;
prvSetMACAddress();
}
portEXIT_CRITICAL();
for( ;; )
{
/* Is there received data ready to be processed? */
uip_len = uiGetEMACRxData( uip_buf );
if( uip_len > 0 )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
prvENET_Send();
}
}
}
else
{
if( timer_expired( &periodic_timer ) )
{
timer_reset( &periodic_timer );
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
/* Call the ARP timer function every 10 seconds. */
if( timer_expired( &arp_timer ) )
{
timer_reset( &arp_timer );
uip_arp_timer();
}
}
else
{
/* We did not receive a packet, and there was no periodic
processing to perform. Block for a fixed period. If a packet
is received during this period we will be woken by the ISR
giving us the Semaphore. */
xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );
}
}
}
}
__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
TickType_t xModifiableIdleTime;
/* Make sure the SysTick reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
}
/* Stop the SysTick momentarily. The time the SysTick is stopped for
is accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE;
/* Calculate the reload value required to wait xExpectedIdleTime
tick periods. -1 is used because this code will execute part way
through one of the tick periods. */
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
if( ulReloadValue > ulStoppedTimerCompensation )
{
ulReloadValue -= ulStoppedTimerCompensation;
}
/* Enter a critical section but don't use the taskENTER_CRITICAL()
method as that will mask interrupts that should exit sleep mode. */
__disable_irq();
__dsb( portSY_FULL_READ_WRITE );
__isb( portSY_FULL_READ_WRITE );
/* If a context switch is pending or a task is waiting for the scheduler
to be unsuspended then abandon the low power entry. */
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
{
/* Restart from whatever is left in the count register to complete
this tick period. */
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE;
/* Reset the reload register to the value required for normal tick
periods. */
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Re-enable interrupts - see comments above __disable_irq() call
above. */
__enable_irq();
}
else
{
/* Set the new reload value. */
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
/* Clear the SysTick count flag and set the count value back to
zero. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE;
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
set its parameter to 0 to indicate that its implementation contains
its own wait for interrupt or wait for event instruction, and so wfi
should not be executed again. However, the original expected idle
time variable must remain unmodified, so a copy is taken. */
xModifiableIdleTime = xExpectedIdleTime;
configPRE_SLEEP_PROCESSING( &xModifiableIdleTime );
if( xModifiableIdleTime > 0 )
{
__dsb( portSY_FULL_READ_WRITE );
__wfi();
__isb( portSY_FULL_READ_WRITE );
}
configPOST_SLEEP_PROCESSING( &xExpectedIdleTime );
/* Stop SysTick. Again, the time the SysTick is stopped for is
accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE );
/* Re-enable interrupts - see comments above __disable_irq() call
above. */
__enable_irq();
if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG ) != 0 )
{
uint32_t ulCalculatedLoadValue;
/* The tick interrupt has already executed, and the SysTick
count reloaded with ulReloadValue. Reset the
portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
period. */
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
/* Don't allow a tiny value, or values that have somehow
underflowed because the post sleep hook did something
that took too long. */
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
{
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
}
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
/* The tick interrupt handler will already have pended the tick
processing in the kernel. As the pending tick will be
processed as soon as this function exits, the tick value
maintained by the tick is stepped forward by one less than the
time spent waiting. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
Work out how long the sleep lasted rounded to complete tick
periods (not the ulReload value which accounted for part
ticks). */
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* How many complete tick periods passed while the processor
was waiting? */
ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
/* The reload value is set to whatever fraction of a single tick
period remains. */
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
}
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
value. The critical section is used to ensure the tick interrupt
can only execute once in the case that the reload register is near
zero. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
portENTER_CRITICAL();
{
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE;
vTaskStepTick( ulCompleteTickPeriods );
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
}
portEXIT_CRITICAL();
}
}
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn;
UART_InitTypeDef UART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
EIC_IRQInitTypeDef EIC_IRQInitStructure;
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* If the queues were created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
{
portENTER_CRITICAL();
{
/* Enable the UART0 Clock. */
MRCC_PeripheralClockConfig( MRCC_Peripheral_UART0, ENABLE );
/* Configure the UART0_Tx as alternate function */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
GPIO_Init(GPIO0, &GPIO_InitStructure);
/* Configure the UART0_Rx as input floating */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIO0, &GPIO_InitStructure);
/* Configure UART0. */
UART_InitStructure.UART_WordLength = UART_WordLength_8D;
UART_InitStructure.UART_StopBits = UART_StopBits_1;
UART_InitStructure.UART_Parity = UART_Parity_No;
UART_InitStructure.UART_BaudRate = ulWantedBaud;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
UART_InitStructure.UART_Mode = UART_Mode_Tx_Rx;
UART_InitStructure.UART_TxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */
UART_InitStructure.UART_RxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */
UART_Init(UART0, &UART_InitStructure);
/* Enable the UART0 */
UART_Cmd(UART0, ENABLE);
/* Configure the IEC for the UART interrupts. */
EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
EIC_IRQInitStructure.EIC_IRQChannel = UART0_IRQChannel;
EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
EIC_IRQInit(&EIC_IRQInitStructure);
xQueueEmpty = pdTRUE;
UART_ITConfig( UART0, UART_IT_Transmit | UART_IT_Receive, ENABLE );
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
static void prvSemaphoreTest( void *pvParameters )
{
xSemaphoreParameters *pxParameters;
volatile unsigned long *pulSharedVariable, ulExpectedValue;
unsigned long ulCounter;
short sError = pdFALSE, sCheckVariableToUse;
/* See which check variable to use. sNextCheckVariable is not semaphore
protected! */
portENTER_CRITICAL();
sCheckVariableToUse = sNextCheckVariable;
sNextCheckVariable++;
portEXIT_CRITICAL();
/* Queue a message for printing to say the task has started. */
vPrintDisplayMessage( &pcSemaphoreTaskStart );
/* A structure is passed in as the parameter. This contains the shared
variable being guarded. */
pxParameters = ( xSemaphoreParameters * ) pvParameters;
pulSharedVariable = pxParameters->pulSharedVariable;
/* If we are blocking we use a much higher count to ensure loads of context
switches occur during the count. */
if( pxParameters->xBlockTime > ( portTickType ) 0 )
{
ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE;
}
else
{
ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE;
}
for( ;; )
{
/* Try to obtain the semaphore. */
if( xSemaphoreTake( pxParameters->xSemaphore, pxParameters->xBlockTime ) == pdPASS )
{
/* We have the semaphore and so expect any other tasks using the
shared variable to have left it in the state we expect to find
it. */
if( *pulSharedVariable != ulExpectedValue )
{
vPrintDisplayMessage( &pcPollingSemaphoreTaskError );
sError = pdTRUE;
}
/* Clear the variable, then count it back up to the expected value
before releasing the semaphore. Would expect a context switch or
two during this time. */
for( ulCounter = ( unsigned long ) 0; ulCounter <= ulExpectedValue; ulCounter++ )
{
*pulSharedVariable = ulCounter;
if( *pulSharedVariable != ulCounter )
{
if( sError == pdFALSE )
{
vPrintDisplayMessage( &pcPollingSemaphoreTaskError );
}
sError = pdTRUE;
}
}
/* Release the semaphore, and if no errors have occurred increment the check
variable. */
if( xSemaphoreGive( pxParameters->xSemaphore ) == pdFALSE )
{
vPrintDisplayMessage( &pcPollingSemaphoreTaskError );
sError = pdTRUE;
}
if( sError == pdFALSE )
{
if( sCheckVariableToUse < semtstNUM_TASKS )
{
( sCheckVariables[ sCheckVariableToUse ] )++;
}
}
/* If we have a block time then we are running at a priority higher
than the idle priority. This task takes a long time to complete
a cycle (deliberately so to test the guarding) so will be starving
out lower priority tasks. Block for some time to allow give lower
priority tasks some processor time. */
vTaskDelay( pxParameters->xBlockTime * semtstDELAY_FACTOR );
}
else
{
if( pxParameters->xBlockTime == ( portTickType ) 0 )
{
/* We have not got the semaphore yet, so no point using the
processor. We are not blocking when attempting to obtain the
semaphore. */
taskYIELD();
}
}
}
}
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
uip_ipaddr_t xIPAddr;
struct timer periodic_timer, arp_timer;
/* Create the semaphore used by the ISR to wake this task. */
vSemaphoreCreateBinary( xSemaphore );
/* Initialise the uIP stack. */
timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
uip_init();
uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
uip_sethostaddr( xIPAddr );
uip_ipaddr( xIPAddr, uipNET_MASK0, uipNET_MASK1, uipNET_MASK2, uipNET_MASK3 );
uip_setnetmask( xIPAddr );
uip_ipaddr( xIPAddr, uipGATEWAY_ADDR0, uipGATEWAY_ADDR1, uipGATEWAY_ADDR2, uipGATEWAY_ADDR3 );
uip_setdraddr( xIPAddr );
httpd_init();
/* Initialise the MAC. */
ENET_InitClocksGPIO();
ENET_Init();
portENTER_CRITICAL();
{
ENET_Start();
prvSetMACAddress();
VIC_Config( ENET_ITLine, VIC_IRQ, 1 );
VIC_ITCmd( ENET_ITLine, ENABLE );
ENET_DMA->ISR = uipDMI_RX_CURRENT_DONE;
ENET_DMA->IER = uipDMI_RX_CURRENT_DONE;
}
portEXIT_CRITICAL();
while(1)
{
/* Is there received data ready to be processed? */
uip_len = ENET_HandleRxPkt( uip_buf );
if( uip_len > 0 )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
prvENET_Send();
}
}
}
else
{
if( timer_expired( &periodic_timer ) )
{
timer_reset( &periodic_timer );
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
prvENET_Send();
}
}
/* Call the ARP timer function every 10 seconds. */
if( timer_expired( &arp_timer ) )
{
timer_reset( &arp_timer );
uip_arp_timer();
}
}
else
{
/* We did not receive a packet, and there was no periodic
processing to perform. Block for a fixed period. If a packet
is received during this period we will be woken by the ISR
giving us the Semaphore. */
xSemaphoreTake( xSemaphore, configTICK_RATE_HZ / 2 );
}
}
}
}
/*
* Controller task as described above.
*/
static portTASK_FUNCTION( vCounterControlTask, pvParameters )
{
unsigned long ulLastCounter;
short sLoops;
short sError = pdFALSE;
/* Just to stop warning messages. */
( void ) pvParameters;
for( ;; )
{
/* Start with the counter at zero. */
ulCounter = ( unsigned long ) 0;
/* First section : */
/* Check the continuous count task is running. */
for( sLoops = 0; sLoops < priLOOPS; sLoops++ )
{
/* Suspend the continuous count task so we can take a mirror of the
shared variable without risk of corruption. */
vTaskSuspend( xContinousIncrementHandle );
ulLastCounter = ulCounter;
vTaskResume( xContinousIncrementHandle );
/* Now delay to ensure the other task has processor time. */
vTaskDelay( priSLEEP_TIME );
/* Check the shared variable again. This time to ensure mutual
exclusion the whole scheduler will be locked. This is just for
demo purposes! */
vTaskSuspendAll();
{
if( ulLastCounter == ulCounter )
{
/* The shared variable has not changed. There is a problem
with the continuous count task so flag an error. */
sError = pdTRUE;
}
}
xTaskResumeAll();
}
/* Second section: */
/* Suspend the continuous counter task so it stops accessing the shared variable. */
vTaskSuspend( xContinousIncrementHandle );
/* Reset the variable. */
ulCounter = ( unsigned long ) 0;
/* Resume the limited count task which has a higher priority than us.
We should therefore not return from this call until the limited count
task has suspended itself with a known value in the counter variable. */
vTaskResume( xLimitedIncrementHandle );
/* Does the counter variable have the expected value? */
if( ulCounter != priMAX_COUNT )
{
sError = pdTRUE;
}
if( sError == pdFALSE )
{
/* If no errors have occurred then increment the check variable. */
portENTER_CRITICAL();
usCheckVariable++;
portEXIT_CRITICAL();
}
/* Resume the continuous count task and do it all again. */
vTaskResume( xContinousIncrementHandle );
}
}
static void vPrimaryBlockTimeTestTask( void *pvParameters )
{
portBASE_TYPE xItem, xData;
portTickType xTimeWhenBlocking;
portTickType xTimeToBlock, xBlockedTime;
#ifdef USE_STDIO
void vPrintDisplayMessage( const portCHAR * const * ppcMessageToSend );
const portCHAR * const pcTaskStartMsg = "Alt primary block time test started.\r\n";
/* Queue a message for printing to say the task has started. */
vPrintDisplayMessage( &pcTaskStartMsg );
#endif
( void ) pvParameters;
for( ;; )
{
/*********************************************************************
Test 1
Simple block time wakeup test on queue receives. */
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
/* The queue is empty. Attempt to read from the queue using a block
time. When we wake, ensure the delta in time is as expected. */
xTimeToBlock = bktPRIMARY_BLOCK_TIME << xItem;
/* A critical section is used to minimise the jitter in the time
measurements. */
portENTER_CRITICAL();
{
xTimeWhenBlocking = xTaskGetTickCount();
/* We should unblock after xTimeToBlock having not received
anything on the queue. */
if( xQueueAltReceive( xTestQueue, &xData, xTimeToBlock ) != errQUEUE_EMPTY )
{
xErrorOccurred = pdTRUE;
}
/* How long were we blocked for? */
xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking;
}
portEXIT_CRITICAL();
if( xBlockedTime < xTimeToBlock )
{
/* Should not have blocked for less than we requested. */
xErrorOccurred = pdTRUE;
}
if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) )
{
/* Should not have blocked for longer than we requested,
although we would not necessarily run as soon as we were
unblocked so a margin is allowed. */
xErrorOccurred = pdTRUE;
}
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/*********************************************************************
Test 2
Simple block time wakeup test on queue sends.
First fill the queue. It should be empty so all sends should pass. */
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
if( xQueueAltSendToBack( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
}
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
/* The queue is full. Attempt to write to the queue using a block
time. When we wake, ensure the delta in time is as expected. */
xTimeToBlock = bktPRIMARY_BLOCK_TIME << xItem;
portENTER_CRITICAL();
{
xTimeWhenBlocking = xTaskGetTickCount();
/* We should unblock after xTimeToBlock having not received
anything on the queue. */
if( xQueueAltSendToBack( xTestQueue, &xItem, xTimeToBlock ) != errQUEUE_FULL )
{
xErrorOccurred = pdTRUE;
}
/* How long were we blocked for? */
xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking;
}
portEXIT_CRITICAL();
if( xBlockedTime < xTimeToBlock )
{
/* Should not have blocked for less than we requested. */
xErrorOccurred = pdTRUE;
}
if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) )
{
/* Should not have blocked for longer than we requested,
although we would not necessarily run as soon as we were
unblocked so a margin is allowed. */
xErrorOccurred = pdTRUE;
}
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/*********************************************************************
Test 3
Wake the other task, it will block attempting to post to the queue.
When we read from the queue the other task will wake, but before it
can run we will post to the queue again. When the other task runs it
will find the queue still full, even though it was woken. It should
recognise that its block time has not expired and return to block for
the remains of its block time.
Wake the other task so it blocks attempting to post to the already
full queue. */
xRunIndicator = 0;
vTaskResume( xSecondary );
/* We need to wait a little to ensure the other task executes. */
while( xRunIndicator != bktRUN_INDICATOR )
{
/* The other task has not yet executed. */
vTaskDelay( bktSHORT_WAIT );
}
/* Make sure the other task is blocked on the queue. */
vTaskDelay( bktSHORT_WAIT );
xRunIndicator = 0;
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
/* Now when we make space on the queue the other task should wake
but not execute as this task has higher priority. */
if( xQueueAltReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
/* Now fill the queue again before the other task gets a chance to
execute. If the other task had executed we would find the queue
full ourselves, and the other task have set xRunIndicator. */
if( xQueueAltSendToBack( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
if( xRunIndicator == bktRUN_INDICATOR )
{
/* The other task should not have executed. */
xErrorOccurred = pdTRUE;
}
/* Raise the priority of the other task so it executes and blocks
on the queue again. */
vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 );
/* The other task should now have re-blocked without exiting the
queue function. */
if( xRunIndicator == bktRUN_INDICATOR )
{
/* The other task should not have executed outside of the
queue function. */
xErrorOccurred = pdTRUE;
}
/* Set the priority back down. */
vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY );
}
/* Let the other task timeout. When it unblockes it will check that it
unblocked at the correct time, then suspend itself. */
while( xRunIndicator != bktRUN_INDICATOR )
{
vTaskDelay( bktSHORT_WAIT );
}
vTaskDelay( bktSHORT_WAIT );
xRunIndicator = 0;
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/*********************************************************************
Test 4
As per test 3 - but with the send and receive the other way around.
The other task blocks attempting to read from the queue.
Empty the queue. We should find that it is full. */
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
if( xQueueAltReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
}
/* Wake the other task so it blocks attempting to read from the
already empty queue. */
vTaskResume( xSecondary );
/* We need to wait a little to ensure the other task executes. */
while( xRunIndicator != bktRUN_INDICATOR )
{
vTaskDelay( bktSHORT_WAIT );
}
vTaskDelay( bktSHORT_WAIT );
xRunIndicator = 0;
for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ )
{
/* Now when we place an item on the queue the other task should
wake but not execute as this task has higher priority. */
if( xQueueAltSendToBack( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
/* Now empty the queue again before the other task gets a chance to
execute. If the other task had executed we would find the queue
empty ourselves, and the other task would be suspended. */
if( xQueueAltReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS )
{
xErrorOccurred = pdTRUE;
}
if( xRunIndicator == bktRUN_INDICATOR )
{
/* The other task should not have executed. */
xErrorOccurred = pdTRUE;
}
/* Raise the priority of the other task so it executes and blocks
on the queue again. */
vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 );
/* The other task should now have re-blocked without exiting the
queue function. */
if( xRunIndicator == bktRUN_INDICATOR )
{
/* The other task should not have executed outside of the
queue function. */
xErrorOccurred = pdTRUE;
}
vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY );
}
/* Let the other task timeout. When it unblockes it will check that it
unblocked at the correct time, then suspend itself. */
while( xRunIndicator != bktRUN_INDICATOR )
{
vTaskDelay( bktSHORT_WAIT );
}
vTaskDelay( bktSHORT_WAIT );
xPrimaryCycles++;
}
}
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
uip_ipaddr_t xIPAddr;
struct timer periodic_timer, arp_timer;
extern void ( vEMAC_ISR_Wrapper )( void );
( void ) pvParameters;
/* Initialise the uIP stack. */
timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
uip_init();
uip_ipaddr( xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
uip_sethostaddr( xIPAddr );
uip_ipaddr( xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );
uip_setnetmask( xIPAddr );
httpd_init();
/* Create the semaphore used to wake the uIP task. */
vSemaphoreCreateBinary( xEMACSemaphore );
/* Initialise the MAC. */
while( lEMACInit() != pdPASS )
{
vTaskDelay( uipINIT_WAIT );
}
portENTER_CRITICAL();
{
EMAC->IntEnable = ( INT_RX_DONE | INT_TX_DONE );
/* Set the interrupt priority to the max permissible to cause some
interrupt nesting. */
NVIC_SetPriority( ENET_IRQn, configEMAC_INTERRUPT_PRIORITY );
/* Enable the interrupt. */
NVIC_EnableIRQ( ENET_IRQn );
prvSetMACAddress();
}
portEXIT_CRITICAL();
for( ;; )
{
/* Is there received data ready to be processed? */
uip_len = ulGetEMACRxData();
if( ( uip_len > 0 ) && ( uip_buf != NULL ) )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vSendEMACTxData( uip_len );
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
vSendEMACTxData( uip_len );
}
}
}
else
{
if( timer_expired( &periodic_timer ) && ( uip_buf != NULL ) )
{
timer_reset( &periodic_timer );
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vSendEMACTxData( uip_len );
}
}
/* Call the ARP timer function every 10 seconds. */
if( timer_expired( &arp_timer ) )
{
timer_reset( &arp_timer );
uip_arp_timer();
}
}
else
{
/* We did not receive a packet, and there was no periodic
processing to perform. Block for a fixed period. If a packet
is received during this period we will be woken by the ISR
giving us the Semaphore. */
xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );
}
}
}
}
static void vSecondaryBlockTimeTestTask( void *pvParameters )
{
portTickType xTimeWhenBlocking, xBlockedTime;
portBASE_TYPE xData;
#ifdef USE_STDIO
void vPrintDisplayMessage( const portCHAR * const * ppcMessageToSend );
const portCHAR * const pcTaskStartMsg = "Alt secondary block time test started.\r\n";
/* Queue a message for printing to say the task has started. */
vPrintDisplayMessage( &pcTaskStartMsg );
#endif
( void ) pvParameters;
for( ;; )
{
/*********************************************************************
Test 1 and 2
This task does does not participate in these tests. */
vTaskSuspend( NULL );
/*********************************************************************
Test 3
The first thing we do is attempt to read from the queue. It should be
full so we block. Note the time before we block so we can check the
wake time is as per that expected. */
portENTER_CRITICAL();
{
xTimeWhenBlocking = xTaskGetTickCount();
/* We should unblock after bktTIME_TO_BLOCK having not received
anything on the queue. */
xData = 0;
xRunIndicator = bktRUN_INDICATOR;
if( xQueueAltSendToBack( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_FULL )
{
xErrorOccurred = pdTRUE;
}
/* How long were we inside the send function? */
xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking;
}
portEXIT_CRITICAL();
/* We should not have blocked for less time than bktTIME_TO_BLOCK. */
if( xBlockedTime < bktTIME_TO_BLOCK )
{
xErrorOccurred = pdTRUE;
}
/* We should of not blocked for much longer than bktALLOWABLE_MARGIN
either. A margin is permitted as we would not necessarily run as
soon as we unblocked. */
if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) )
{
xErrorOccurred = pdTRUE;
}
/* Suspend ready for test 3. */
xRunIndicator = bktRUN_INDICATOR;
vTaskSuspend( NULL );
/*********************************************************************
Test 4
As per test three, but with the send and receive reversed. */
portENTER_CRITICAL();
{
xTimeWhenBlocking = xTaskGetTickCount();
/* We should unblock after bktTIME_TO_BLOCK having not received
anything on the queue. */
xRunIndicator = bktRUN_INDICATOR;
if( xQueueAltReceive( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_EMPTY )
{
xErrorOccurred = pdTRUE;
}
xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking;
}
portEXIT_CRITICAL();
/* We should not have blocked for less time than bktTIME_TO_BLOCK. */
if( xBlockedTime < bktTIME_TO_BLOCK )
{
xErrorOccurred = pdTRUE;
}
/* We should of not blocked for much longer than bktALLOWABLE_MARGIN
either. A margin is permitted as we would not necessarily run as soon
as we unblocked. */
if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) )
{
xErrorOccurred = pdTRUE;
}
xRunIndicator = bktRUN_INDICATOR;
xSecondaryCycles++;
}
}
void TaskDelayLpmDisable(void)
{
portENTER_CRITICAL();
TaskDelayLpmLockCount++;
portEXIT_CRITICAL();
}
////////////////////////////////////////////////////////////////////////////
// Interfacing Function
////////////////////////////////////////////////////////////////////////////
void vTaskDS1820Convert( void *pvParameters ){
char buf[30];
static char print_buf[80];
int ii = 0;
static float fTemp[NUM_SENSORS] = {0.0, 0.0}, fLastTemp[NUM_SENSORS] = {0.0, 0.0};
// initialise the bus
ds1820_init();
if (ds1820_reset() ==PRESENCE_ERROR)
{
ds1820_error(PRESENCE_ERROR);
vConsolePrint("Presence Error, Deleting DS1820 Task\r\n\0");
vTaskDelete(NULL); // if this task fails... delete it
}
// Allocate memory for sensors
b[HLT] = (char *) pvPortMalloc (sizeof(rom)+1);
b[MASH] = (char *) pvPortMalloc (sizeof(rom)+1);
// b[CABINET] = (char *) malloc (sizeof(rom)+1);
// Copy default values
memcpy(b[HLT], HLT_TEMP_SENSOR, sizeof(HLT_TEMP_SENSOR)+1);
memcpy(b[MASH], MASH_TEMP_SENSOR, sizeof(MASH_TEMP_SENSOR)+1);
// memcpy(b[CABINET], CABINET_TEMP_SENSOR, sizeof(CABINET_TEMP_SENSOR)+1);
ds1820_search();
//if (rom[0] == 0x10)
if (rom[0] != 0)
{
sprintf(print_buf, "%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x\r\n\0",rom[0],
rom[1], rom[2], rom[3], rom[4], rom[5], rom[6], rom[7]);
vConsolePrint(print_buf);
}
else
{
vConsolePrint("NO SENSOR\r\n\0");
}
for (;;)
{
ds1820_convert();
vTaskDelay(850/portTICK_RATE_MS); // wait for conversion
// save values in array for use by application
for (ii = 0 ; ii < NUM_SENSORS; ii++)
{
fTemp[ii] = ds1820_read_device(b[ii]);
if (fTemp[ii] < 105.0 && fTemp[ii] > 0.0)
{
if ((fTemp[ii] < (temps[ii] + 5.0)) || (fTemp[ii] > (temps[ii] - 5.0)) || (fTemp[ii] <= 85.0 && fTemp[ii] >= 86.0))
{
portENTER_CRITICAL(); // so that other task cannot access temps[] while we are saving.
temps[ii] = fTemp [ii];
portEXIT_CRITICAL();
}
}
if (fTemp[ii] == 0.0)
{
vConsolePrint("zero values. Temp Bus Resetting\r\n\0");
ds1820_power_reset();
ds1820_reset();
}
}
taskYIELD();
}
}