int
pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc)
{
int error;
error = bus_space_map(sc->sc_iot, sc->sc_addr, sc->sc_size, 0,
&sc->sc_ioh);
if (error) {
aprint_error_dev(sc->sc_dev, "unable to map register\n");
sc->sc_size = 0;
return error;
}
bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
sc->sc_icr = ICR_GCD | ICR_SCLE | ICR_IUE;
#if 0
if (ISSET(sc->sc_flags, PI2CF_ENABLE_INTR))
sc->sc_icr |= ICR_BEIE | ICR_DRFIE | ICR_ITEIE;
#endif
if (ISSET(sc->sc_flags, PI2CF_FAST_MODE))
sc->sc_icr |= ICR_FM;
pxa2x0_i2c_init(sc);
return 0;
}
int
pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc)
{
if (bus_space_map(sc->sc_iot, PXA2X0_I2C_BASE,
PXA2X0_I2C_SIZE, 0, &sc->sc_ioh)) {
sc->sc_size = 0;
return EIO;
}
bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
/*
* Configure the alternate functions. The _IN is arbitrary, as the
* direction is managed by the I2C unit when comms are in progress.
*/
pxa2x0_gpio_set_function(117, GPIO_ALT_FN_1_IN); /* SCL */
pxa2x0_gpio_set_function(118, GPIO_ALT_FN_1_IN); /* SDA */
pxa2x0_i2c_init(sc);
return 0;
}
