static int i2c_pxa_remove(struct platform_device *dev)
{
struct pxa_i2c *i2c = platform_get_drvdata(dev);
platform_set_drvdata(dev, NULL);
i2c_del_adapter(&i2c->adap);
free_irq(i2c->irq, i2c);
switch (dev->id) {
case 0:
pxa_set_cken(CKEN14_I2C, 0);
break;
#ifdef CONFIG_PXA27x
case 1:
pxa_set_cken(CKEN15_PWRI2C, 0);
local_irq_disable();
PCFR &= ~PCFR_PI2CEN;
local_irq_enable();
#endif
}
release_mem_region(i2c->iobase, i2c->iosize);
kfree(i2c);
return 0;
}
/* Backlight ***/
static void palmtt3_bl_power(int on)
{
/* SET_PALMTT3_GPIO(BL_POWER, on); */ /* to be determined */
pxa_set_cken(CKEN0_PWM0, on);
pxa_set_cken(CKEN1_PWM1, on);
mdelay(50);
}
static void htcsable_set_bl_intensity(int intensity)
{
printk("htcsable_set_bl_intensity: %d\n", intensity);
/* LCD brightness is driven by PWM0.
* We'll set the pre-scaler to 8, and the period to 1024, this
* means the backlight refresh rate will be 3686400/(8*1024) =
* 450 Hz which is quite enough.
*/
PWM_CTRL0 = 7; /* pre-scaler */
PWM_PWDUTY0 = intensity; /* duty cycle */
PWM_PERVAL0 = HTCSABLE_MAX_INTENSITY; /* period */
if (intensity > 0) {
asic3_set_gpio_out_d(&htcsable_asic3.dev,
GPIOD_LCD_BACKLIGHT, GPIOD_LCD_BACKLIGHT);
mdelay(15);
asic3_set_gpio_out_d(&htcsable_asic3.dev,
1<<14, 1<<14);
mdelay(15);
pxa_set_cken(CKEN0_PWM0, 1);
} else {
asic3_set_gpio_out_d(&htcsable_asic3.dev,
GPIOD_LCD_BACKLIGHT, 0);
mdelay(15);
asic3_set_gpio_out_d(&htcsable_asic3.dev,
1<<14, 0);
mdelay(15);
pxa_set_cken(CKEN0_PWM0, 0);
}
}
static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97)
{
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* PXA27x Developers Manual section 13.5.2.2.1 */
pxa_set_cken(31, 1);
udelay(5);
pxa_set_cken(31, 0);
GCR = GCR_COLD_RST;
udelay(50);
#else
GCR = GCR_COLD_RST;
GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif
if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
__FUNCTION__, gsr_bits);
GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
}
static int pxa2xx_ac97_probe(struct platform_device *pdev)
{
int ret;
ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, IRQF_DISABLED, "AC97", NULL);
if (ret < 0)
goto err;
pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
#ifdef CONFIG_PXA27x
/* Use GPIO 113 as AC97 Reset on Bulverde */
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
#endif
pxa_set_cken(CKEN2_AC97, 1);
return 0;
err:
if (CKEN & CKEN2_AC97) {
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
}
return ret;
}
static void pxa_irda_shutdown(struct pxa_irda *si)
{
unsigned long flags;
local_irq_save(flags);
/* disable STUART and interrupt */
STIER = 0;
/* disable STUART SIR mode */
STISR = 0;
/* disable the STUART clock */
pxa_set_cken(CKEN5_STUART, 0);
/* disable DMA */
DCSR(si->txdma) &= ~DCSR_RUN;
DCSR(si->rxdma) &= ~DCSR_RUN;
/* disable FICP */
ICCR0 = 0;
/* disable the FICP clock */
pxa_set_cken(CKEN13_FICP, 0);
DRCMR17 = 0;
DRCMR18 = 0;
local_irq_restore(flags);
/* power off board transceiver */
si->pdata->transceiver_mode(si->dev, IR_OFF);
printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
}
static void magician_set_bl_intensity(int intensity)
{
if (intensity) {
PWM_CTRL0 = 1;
PWM_PERVAL0 = 0xc8;
PWM_PWDUTY0 = intensity;
pxa_set_cken(CKEN_PWM0, 1);
} else {
pxa_set_cken(CKEN_PWM0, 0);
}
}
static void mainstone_backlight_power(int on)
{
if (on) {
pxa_gpio_mode(GPIO16_PWM0_MD);
pxa_set_cken(CKEN0_PWM0, 1);
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x3ff;
PWM_PERVAL0 = 0x3ff;
} else {
PWM_CTRL0 = 0;
PWM_PWDUTY0 = 0x0;
PWM_PERVAL0 = 0x3FF;
pxa_set_cken(CKEN0_PWM0, 0);
}
}
static void csb226_backlight_power (int on)
{
if (on) {
pxa_gpio_mode(GPIO17_PWM1_MD | GPIO_OUT);
pxa_set_cken(CKEN1_PWM1, 1);
PWM_CTRL1 = 0;
PWM_PWDUTY1 = 0x3ff;
PWM_PERVAL1 = 0x3ff;
} else {
PWM_CTRL1 = 0;
PWM_PWDUTY1 = 0x0;
PWM_PERVAL1 = 0x3FF;
pxa_set_cken(CKEN1_PWM1, 0);
}
return;
}
static int pxa27x_start_hc(struct device *dev)
{
int retval = 0;
struct pxaohci_platform_data *inf;
inf = dev->platform_data;
pxa_set_cken(CKEN10_USBHOST, 1);
UHCHR |= UHCHR_FHR;
udelay(11);
UHCHR &= ~UHCHR_FHR;
UHCHR |= UHCHR_FSBIR;
while (UHCHR & UHCHR_FSBIR)
cpu_relax();
if (inf->init)
retval = inf->init(dev);
if (retval < 0)
return retval;
UHCHR &= ~UHCHR_SSE;
UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
/* Clear any OTG Pin Hold */
if (PSSR & PSSR_OTGPH)
PSSR |= PSSR_OTGPH;
return 0;
}
static int pxa2xx_ac97_suspend(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
GCR |= GCR_ACLINK_OFF;
pxa_set_cken(CKEN2_AC97, 0);
return 0;
}
static void pxa27x_start_hc(struct platform_device *dev)
{
pxa_set_cken(CKEN10_USBHOST, 1);
UHCHR |= UHCHR_FHR;
udelay(11);
UHCHR &= ~UHCHR_FHR;
UHCHR |= UHCHR_FSBIR;
while (UHCHR & UHCHR_FSBIR)
cpu_relax();
/* This could be properly abstracted away through the
device data the day more machines are supported and
their differences can be figured out correctly. */
if (machine_is_mainstone()) {
/* setup Port1 GPIO pin. */
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
/* Set the Power Control Polarity Low and Power Sense
Polarity Low to active low. Supply power to USB ports. */
UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
}
UHCHR &= ~UHCHR_SSE;
UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
}
static void pxa2xx_ac97_reset(ac97_t *ac97)
{
/* First, try cold reset */
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* PXA27x Developers Manual section 13.5.2.2.1 */
pxa_set_cken(1 << 31, 1);
udelay(5);
pxa_set_cken(1 << 31, 0);
GCR = GCR_COLD_RST;
udelay(50);
#else
GCR = GCR_COLD_RST;
GCR |= GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif
if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
__FUNCTION__, gsr_bits);
/* let's try warm reset */
gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* warm reset broken on Bulverde,
so manually keep AC97 reset high */
pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
udelay(10);
GCR |= GCR_WARM_RST;
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
udelay(50);
#else
GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;;
wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif
if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
__FUNCTION__, gsr_bits);
}
GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
}
static void
serial_pxa_pm(struct uart_port *port, unsigned int state,
unsigned int oldstate)
{
struct uart_pxa_port *up = (struct uart_pxa_port *)port;
pxa_set_cken(up->cken, !state);
if (!state)
udelay(1);
}
static int mainstone_backlight_update_status(struct backlight_device *bl)
{
int brightness = bl->props.brightness;
if (bl->props.power != FB_BLANK_UNBLANK ||
bl->props.fb_blank != FB_BLANK_UNBLANK)
brightness = 0;
if (brightness != 0) {
pxa_gpio_mode(GPIO16_PWM0_MD);
pxa_set_cken(CKEN_PWM0, 1);
}
PWM_CTRL0 = 0;
PWM_PWDUTY0 = brightness;
PWM_PERVAL0 = bl->props.max_brightness;
if (brightness == 0)
pxa_set_cken(CKEN_PWM0, 0);
return 0; /* pointless return value */
}
static void magician_set_bl_intensity(int intensity)
{
if (intensity) {
PWM_CTRL0 = 1;
PWM_PERVAL0 = 0xc8;
if (intensity > 0xc7) {
PWM_PWDUTY0 = intensity - 0x48;
gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1);
} else {
PWM_PWDUTY0 = intensity;
gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0);
}
gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 1);
pxa_set_cken(CKEN_PWM0, 1);
} else {
/* PWM_PWDUTY0 = intensity; */
gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 0);
pxa_set_cken(CKEN_PWM0, 0);
}
}
/*
* FIXME: This function is board specific
*/
int
pxa_pwm_init(int pwm)
{
/* Set the control register to divide by 2 */
PWMCR0 = 0x01;
PWMCR1 = 0x01;
/* Set the duty cycle */
PWMDCR0 = 0x06;
PWMDCR1 = 0x06;
/* Set the period */
PWMPCR0 = 0x0A;
PWMPCR1 = 0x0A;
pxa_set_cken(CKEN0_PWM0, 1);
pxa_set_cken(CKEN1_PWM1, 1);
return 0;
}
static void pxa27x_stop_hc(struct platform_device *dev)
{
UHCHR |= UHCHR_FHR;
udelay(11);
UHCHR &= ~UHCHR_FHR;
UHCCOMS |= 1;
udelay(10);
pxa_set_cken(CKEN10_USBHOST, 0);
}
static int pxa2xx_ac97_do_resume(struct snd_card *card)
{
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
pxa_set_cken(CKEN_AC97, 1);
if (platform_ops && platform_ops->resume)
platform_ops->resume(platform_ops->priv);
snd_ac97_resume(pxa2xx_ac97_ac97);
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
return 0;
}
static int pxa2xx_ac97_do_resume(snd_card_t *card, unsigned int state)
{
if (card->power_state != SNDRV_CTL_POWER_D0) {
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
pxa_set_cken(CKEN2_AC97, 1);
if (platform_ops && platform_ops->resume)
platform_ops->resume(platform_ops->priv);
snd_ac97_resume(pxa2xx_ac97_ac97);
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
}
return 0;
}
static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
{
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
snd_pcm_suspend_all(pxa2xx_ac97_pcm);
snd_ac97_suspend(pxa2xx_ac97_ac97);
if (platform_ops && platform_ops->suspend)
platform_ops->suspend(platform_ops->priv);
GCR |= GCR_ACLINK_OFF;
pxa_set_cken(CKEN_AC97, 0);
return 0;
}
static int pxa2xx_ac97_resume(struct platform_device *pdev,
struct snd_soc_cpu_dai *dai)
{
pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
#ifdef CONFIG_PXA27x
/* Use GPIO 113 as AC97 Reset on Bulverde */
pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
#endif
pxa_set_cken(CKEN2_AC97, 1);
return 0;
}
static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
{
struct snd_card *card = platform_get_drvdata(dev);
if (card) {
snd_card_free(card);
platform_set_drvdata(dev, NULL);
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN_AC97, 0);
}
return 0;
}
static int pxa2xx_ac97_remove(struct device *dev)
{
snd_card_t *card = dev_get_drvdata(dev);
if (card) {
snd_card_free(card);
dev_set_drvdata(dev, NULL);
GCR |= GCR_ACLINK_OFF;
free_irq(IRQ_AC97, NULL);
pxa_set_cken(CKEN2_AC97, 0);
}
return 0;
}
static int pxa2xx_ac97_do_suspend(snd_card_t *card, unsigned int state)
{
if (card->power_state != SNDRV_CTL_POWER_D3cold) {
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
snd_pcm_suspend_all(pxa2xx_ac97_pcm);
snd_ac97_suspend(pxa2xx_ac97_ac97);
snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
if (platform_ops && platform_ops->suspend)
platform_ops->suspend(platform_ops->priv);
GCR |= GCR_ACLINK_OFF;
pxa_set_cken(CKEN2_AC97, 0);
}
return 0;
}
/**
* ssp_exit - undo the effects of ssp_init
*
* release and free resources for the SSP port.
*/
void ssp_exit(struct ssp_dev *dev)
{
mutex_lock(&mutex);
SSCR0_P(dev->port) &= ~SSCR0_SSE;
if (dev->port > PXA_SSP_PORTS || dev->port == 0) {
printk(KERN_WARNING "SSP: tried to close invalid port\n");
return;
}
pxa_set_cken(ssp_info[dev->port-1].clock, 0);
if (dev->irq)
free_irq(dev->irq, dev);
release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c);
use_count[dev->port - 1]--;
mutex_unlock(&mutex);
}
static void pxa27x_stop_hc(struct device *dev)
{
struct pxaohci_platform_data *inf;
inf = dev->platform_data;
if (inf->exit)
inf->exit(dev);
UHCHR |= UHCHR_FHR;
udelay(11);
UHCHR &= ~UHCHR_FHR;
UHCCOMS |= 1;
udelay(10);
pxa_set_cken(CKEN10_USBHOST, 0);
}
static int pxakbd_open(struct input_dev *dev)
{
/* Set keypad control register */
KPC |= (KPC_ASACT |
KPC_MS_ALL |
(2 << 6) | KPC_REE0 | KPC_DK_DEB_SEL |
KPC_ME | KPC_MIE | KPC_DE | KPC_DIE);
KPC &= ~KPC_AS; /* disable automatic scan */
KPC &= ~KPC_IMKP; /* do not ignore multiple keypresses */
/* Set rotary count to mid-point value */
KPREC = 0x7F;
/* Enable unit clock */
pxa_set_cken(CKEN_KEYPAD, 1);
return 0;
}
/**
* ssp_init - setup the SSP port
*
* initialise and claim resources for the SSP port.
*
* Returns:
* %-ENODEV if the SSP port is unavailable
* %-EBUSY if the resources are already in use
* %0 on success
*/
int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
{
int ret;
if (port > PXA_SSP_PORTS || port == 0)
return -ENODEV;
mutex_lock(&mutex);
if (use_count[port - 1]) {
mutex_unlock(&mutex);
return -EBUSY;
}
use_count[port - 1]++;
if (!request_mem_region(__PREG(SSCR0_P(port)), 0x2c, "SSP")) {
use_count[port - 1]--;
mutex_unlock(&mutex);
return -EBUSY;
}
dev->port = port;
/* do we need to get irq */
if (!(init_flags & SSP_NO_IRQ)) {
ret = request_irq(ssp_info[port-1].irq, ssp_interrupt,
0, "SSP", dev);
if (ret)
goto out_region;
dev->irq = ssp_info[port-1].irq;
} else
dev->irq = 0;
/* turn on SSP port clock */
pxa_set_cken(ssp_info[port-1].clock, 1);
mutex_unlock(&mutex);
return 0;
out_region:
release_mem_region(__PREG(SSCR0_P(port)), 0x2c);
use_count[port - 1]--;
mutex_unlock(&mutex);
return ret;
}
static int pxakbd_resume(struct platform_device *pdev)
{
struct pxa27x_keyboard_platform_data *pdata = pdev->dev.platform_data;
struct input_dev *input_dev = platform_get_drvdata(pdev);
mutex_lock(&input_dev->mutex);
if (input_dev->users) {
/* Restore controller status */
KPC = pdata->reg_kpc;
KPREC = pdata->reg_kprec;
/* Enable unit clock */
pxa_set_cken(CKEN19_KEYPAD, 1);
}
mutex_unlock(&input_dev->mutex);
return 0;
}