Beispiel #1
0
static int vmmouse_load(QEMUFile *f, void *opaque, int version_id)
{
    VMMouseState *s = opaque;
    int i;

    if (version_id != 0)
        return -EINVAL;

    if (qemu_get_be32(f) != VMMOUSE_QUEUE_SIZE)
        return -EINVAL;
    for (i = 0; i < VMMOUSE_QUEUE_SIZE; i++)
        qemu_get_be32s(f, &s->queue[i]);
    qemu_get_be16s(f, &s->nb_queue);
    qemu_get_be16s(f, &s->status);
    qemu_get_8s(f, &s->absolute);

    vmmouse_update_handler(s);

    return 0;
}
Beispiel #2
0
int generic_usb_load(QEMUFile* f, void *opaque, int version_id)
{
    USBDevice *s = (USBDevice*)opaque;

    if (version_id != 1)
        return -EINVAL;

    qemu_get_be32s(f, &s->speed);
    qemu_get_8s(f, &s->addr);
    qemu_get_be32s(f, &s->state);

    qemu_get_buffer(f, s->setup_buf, 8);
    qemu_get_buffer(f, s->data_buf, 1024);

    qemu_get_be32s(f, &s->remote_wakeup);
    qemu_get_be32s(f, &s->setup_state);
    qemu_get_be32s(f, &s->setup_len);
    qemu_get_be32s(f, &s->setup_index);

    return 0;
}
static int ps2_mouse_load(QEMUFile* f, void* opaque, int version_id)
{
    PS2MouseState *s = (PS2MouseState*)opaque;

    if (version_id != 2)
        return -EINVAL;

    ps2_common_load (f, &s->common);
    qemu_get_8s(f, &s->mouse_status);
    qemu_get_8s(f, &s->mouse_resolution);
    qemu_get_8s(f, &s->mouse_sample_rate);
    qemu_get_8s(f, &s->mouse_wrap);
    qemu_get_8s(f, &s->mouse_type);
    qemu_get_8s(f, &s->mouse_detect_state);
    s->mouse_dx=qemu_get_be32(f);
    s->mouse_dy=qemu_get_be32(f);
    s->mouse_dz=qemu_get_be32(f);
    qemu_get_8s(f, &s->mouse_buttons);
    return 0;
}
Beispiel #4
0
static int pxa2xx_lcdc_load(QEMUFile *f, void *opaque, int version_id)
{
    PXA2xxLCDState *s = (PXA2xxLCDState *) opaque;
    int i;

    s->irqlevel = qemu_get_be32(f);
    s->transp = qemu_get_be32(f);

    for (i = 0; i < 6; i ++)
        qemu_get_be32s(f, &s->control[i]);
    for (i = 0; i < 2; i ++)
        qemu_get_be32s(f, &s->status[i]);
    for (i = 0; i < 2; i ++)
        qemu_get_be32s(f, &s->ovl1c[i]);
    for (i = 0; i < 2; i ++)
        qemu_get_be32s(f, &s->ovl2c[i]);
    qemu_get_be32s(f, &s->ccr);
    qemu_get_be32s(f, &s->cmdcr);
    qemu_get_be32s(f, &s->trgbr);
    qemu_get_be32s(f, &s->tcr);
    qemu_get_be32s(f, &s->liidr);
    qemu_get_8s(f, &s->bscntr);

    for (i = 0; i < 7; i ++) {
        s->dma_ch[i].branch = qemu_get_betl(f);
        s->dma_ch[i].up = qemu_get_byte(f);
        qemu_get_buffer(f, s->dma_ch[i].pbuffer, sizeof(s->dma_ch[i].pbuffer));

        s->dma_ch[i].descriptor = qemu_get_betl(f);
        s->dma_ch[i].source = qemu_get_betl(f);
        qemu_get_be32s(f, &s->dma_ch[i].id);
        qemu_get_be32s(f, &s->dma_ch[i].command);
    }

    s->bpp = LCCR3_BPP(s->control[3]);
    s->xres = s->yres = s->pal_for = -1;

    return 0;
}
int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
    CPUMIPSState *env = opaque;
    int i;

    if (version_id != 3)
        return -EINVAL;

    /* Load active TC */
    load_tc(f, &env->active_tc);

    /* Load active FPU */
    load_fpu(f, &env->active_fpu);

    /* Load MVP */
    qemu_get_sbe32s(f, &env->mvp->CP0_MVPControl);
    qemu_get_sbe32s(f, &env->mvp->CP0_MVPConf0);
    qemu_get_sbe32s(f, &env->mvp->CP0_MVPConf1);

    /* Load TLB */
    qemu_get_be32s(f, &env->tlb->nb_tlb);
    for(i = 0; i < MIPS_TLB_MAX; i++) {
        uint16_t flags;
        uint8_t asid;

        qemu_get_betls(f, &env->tlb->mmu.r4k.tlb[i].VPN);
        qemu_get_be32s(f, &env->tlb->mmu.r4k.tlb[i].PageMask);
        qemu_get_8s(f, &asid);
        env->tlb->mmu.r4k.tlb[i].ASID = asid;
        qemu_get_be16s(f, &flags);
        env->tlb->mmu.r4k.tlb[i].G = (flags >> 10) & 1;
        env->tlb->mmu.r4k.tlb[i].C0 = (flags >> 7) & 3;
        env->tlb->mmu.r4k.tlb[i].C1 = (flags >> 4) & 3;
        env->tlb->mmu.r4k.tlb[i].V0 = (flags >> 3) & 1;
        env->tlb->mmu.r4k.tlb[i].V1 = (flags >> 2) & 1;
        env->tlb->mmu.r4k.tlb[i].D0 = (flags >> 1) & 1;
        env->tlb->mmu.r4k.tlb[i].D1 = (flags >> 0) & 1;
        qemu_get_betls(f, &env->tlb->mmu.r4k.tlb[i].PFN[0]);
        qemu_get_betls(f, &env->tlb->mmu.r4k.tlb[i].PFN[1]);
    }

    /* Load CPU metastate */
    qemu_get_be32s(f, &env->current_tc);
    qemu_get_be32s(f, &env->current_fpu);
    qemu_get_sbe32s(f, &env->error_code);
    qemu_get_be32s(f, &env->hflags);
    qemu_get_betls(f, &env->btarget);
    qemu_get_sbe32s(f, &i);
    env->bcond = i;

    /* Load remaining CP1 registers */
    qemu_get_sbe32s(f, &env->CP0_Index);
    qemu_get_sbe32s(f, &env->CP0_Random);
    qemu_get_sbe32s(f, &env->CP0_VPEControl);
    qemu_get_sbe32s(f, &env->CP0_VPEConf0);
    qemu_get_sbe32s(f, &env->CP0_VPEConf1);
    qemu_get_betls(f, &env->CP0_YQMask);
    qemu_get_betls(f, &env->CP0_VPESchedule);
    qemu_get_betls(f, &env->CP0_VPEScheFBack);
    qemu_get_sbe32s(f, &env->CP0_VPEOpt);
    qemu_get_betls(f, &env->CP0_EntryLo0);
    qemu_get_betls(f, &env->CP0_EntryLo1);
    qemu_get_betls(f, &env->CP0_Context);
    qemu_get_sbe32s(f, &env->CP0_PageMask);
    qemu_get_sbe32s(f, &env->CP0_PageGrain);
    qemu_get_sbe32s(f, &env->CP0_Wired);
    qemu_get_sbe32s(f, &env->CP0_SRSConf0);
    qemu_get_sbe32s(f, &env->CP0_SRSConf1);
    qemu_get_sbe32s(f, &env->CP0_SRSConf2);
    qemu_get_sbe32s(f, &env->CP0_SRSConf3);
    qemu_get_sbe32s(f, &env->CP0_SRSConf4);
    qemu_get_sbe32s(f, &env->CP0_HWREna);
    qemu_get_betls(f, &env->CP0_BadVAddr);
    qemu_get_sbe32s(f, &env->CP0_Count);
    qemu_get_betls(f, &env->CP0_EntryHi);
    qemu_get_sbe32s(f, &env->CP0_Compare);
    qemu_get_sbe32s(f, &env->CP0_Status);
    qemu_get_sbe32s(f, &env->CP0_IntCtl);
    qemu_get_sbe32s(f, &env->CP0_SRSCtl);
    qemu_get_sbe32s(f, &env->CP0_SRSMap);
    qemu_get_sbe32s(f, &env->CP0_Cause);
    qemu_get_betls(f, &env->CP0_EPC);
    qemu_get_sbe32s(f, &env->CP0_PRid);
    qemu_get_sbe32s(f, &env->CP0_EBase);
    qemu_get_sbe32s(f, &env->CP0_Config0);
    qemu_get_sbe32s(f, &env->CP0_Config1);
    qemu_get_sbe32s(f, &env->CP0_Config2);
    qemu_get_sbe32s(f, &env->CP0_Config3);
    qemu_get_sbe32s(f, &env->CP0_Config6);
    qemu_get_sbe32s(f, &env->CP0_Config7);
    qemu_get_betls(f, &env->lladdr);
    for(i = 0; i < 8; i++)
        qemu_get_betls(f, &env->CP0_WatchLo[i]);
    for(i = 0; i < 8; i++)
        qemu_get_sbe32s(f, &env->CP0_WatchHi[i]);
    qemu_get_betls(f, &env->CP0_XContext);
    qemu_get_sbe32s(f, &env->CP0_Framemask);
    qemu_get_sbe32s(f, &env->CP0_Debug);
    qemu_get_betls(f, &env->CP0_DEPC);
    qemu_get_sbe32s(f, &env->CP0_Performance0);
    qemu_get_sbe32s(f, &env->CP0_TagLo);
    qemu_get_sbe32s(f, &env->CP0_DataLo);
    qemu_get_sbe32s(f, &env->CP0_TagHi);
    qemu_get_sbe32s(f, &env->CP0_DataHi);
    qemu_get_betls(f, &env->CP0_ErrorEPC);
    qemu_get_sbe32s(f, &env->CP0_DESAVE);

    /* Load inactive TC state */
    for (i = 0; i < MIPS_SHADOW_SET_MAX; i++)
        load_tc(f, &env->tcs[i]);
    for (i = 0; i < MIPS_FPU_MAX; i++)
        load_fpu(f, &env->fpus[i]);

    /* XXX: ensure compatiblity for halted bit ? */
    tlb_flush(env, 1);
    return 0;
}
Beispiel #6
0
static int get_uint8(QEMUFile *f, void *pv, size_t size)
{
    uint8_t *v = pv;
    qemu_get_8s(f, v);
    return 0;
}
Beispiel #7
0
static int get_uint8(QEMUFile *f, void *pv, size_t size, VMStateField *field)
{
    uint8_t *v = pv;
    qemu_get_8s(f, v);
    return 0;
}