static int get_sample_data(struct quadd_sample_data *sample,
struct pt_regs *regs,
struct task_struct *task)
{
unsigned int cpu, flags;
struct quadd_ctx *quadd_ctx = hrt.quadd_ctx;
cpu = quadd_get_processor_id(regs, &flags);
sample->cpu = cpu;
sample->lp_mode =
(flags & QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP) ? 1 : 0;
sample->thumb_mode = (flags & QUADD_CPUMODE_THUMB) ? 1 : 0;
sample->user_mode = user_mode(regs) ? 1 : 0;
/* For security reasons, hide IPs from the kernel space. */
if (!sample->user_mode && !quadd_ctx->collect_kernel_ips)
sample->ip = 0;
else
sample->ip = instruction_pointer(regs);
sample->time = quadd_get_time();
sample->reserved = 0;
sample->pid = task->pid;
sample->in_interrupt = in_interrupt() ? 1 : 0;
return 0;
}
static inline void
init_sample(struct quadd_record_data *record, struct pt_regs *regs)
{
struct quadd_debug_data *s = &record->debug;
record->magic = QUADD_RECORD_MAGIC;
record->record_type = QUADD_RECORD_TYPE_DEBUG;
if (!regs)
regs = get_irq_regs();
if (!regs)
record->cpu_mode = QUADD_CPU_MODE_NONE;
else
record->cpu_mode = user_mode(regs) ?
QUADD_CPU_MODE_USER : QUADD_CPU_MODE_KERNEL;
s->cpu = quadd_get_processor_id(regs);
s->pid = 0;
s->time = quadd_get_time();
s->timer_period = 0;
s->extra_value1 = 0;
s->extra_value2 = 0;
s->extra_value3 = 0;
}
static void make_sample(void)
{
int i;
u32 extra_cpus[NR_CPUS];
struct power_clk_source *s;
struct quadd_iovec vec;
struct quadd_record_data record;
struct quadd_power_rate_data *power_rate = &record.power_rate;
struct quadd_comm_data_interface *comm = power_ctx.quadd_ctx->comm;
record.record_type = QUADD_RECORD_TYPE_POWER_RATE;
power_rate->time = quadd_get_time();
s = &power_ctx.cpu;
mutex_lock(&s->lock);
if (atomic_read(&s->active)) {
power_rate->nr_cpus = s->nr;
for (i = 0; i < s->nr; i++)
extra_cpus[i] = s->data[i].value;
} else {
power_rate->nr_cpus = 0;
}
mutex_unlock(&s->lock);
s = &power_ctx.gpu;
mutex_lock(&s->lock);
if (atomic_read(&s->active))
power_rate->gpu = s->data[0].value;
else
power_rate->gpu = 0;
mutex_unlock(&s->lock);
s = &power_ctx.emc;
mutex_lock(&s->lock);
if (atomic_read(&s->active))
power_rate->emc = s->data[0].value;
else
power_rate->emc = 0;
mutex_unlock(&s->lock);
/*
pr_debug("make_sample: cpu: %u/%u/%u/%u, gpu: %u, emc: %u\n",
extra_cpus[0], extra_cpus[1], extra_cpus[2], extra_cpus[3],
power_rate->gpu, power_rate->emc);
*/
vec.base = extra_cpus;
vec.len = power_rate->nr_cpus * sizeof(extra_cpus[0]);
comm->put_sample(&record, &vec, 1);
}
static void make_sample(struct quadd_hrt_ctx *hrt_ctx,
pid_t pid, unsigned long vm_size,
unsigned long rss_size)
{
struct quadd_record_data record;
struct quadd_ma_data *ma = &record.ma;
record.record_type = QUADD_RECORD_TYPE_MA;
ma->pid = pid;
ma->time = quadd_get_time();
ma->vm_size = vm_size << (PAGE_SHIFT-10);
ma->rss_size = rss_size << (PAGE_SHIFT-10);
quadd_put_sample(&record, NULL, 0);
}
static void
put_sched_sample(struct task_struct *task, int is_sched_in)
{
unsigned int cpu, flags;
struct quadd_record_data record;
struct quadd_sched_data *s = &record.sched;
record.record_type = QUADD_RECORD_TYPE_SCHED;
cpu = quadd_get_processor_id(NULL, &flags);
s->cpu = cpu;
s->lp_mode = (flags & QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP) ? 1 : 0;
s->sched_in = is_sched_in ? 1 : 0;
s->time = quadd_get_time();
s->pid = task->pid;
s->reserved = 0;
s->data[0] = 0;
s->data[1] = 0;
quadd_put_sample(&record, NULL, 0);
}
static void make_sample(struct quadd_hrt_ctx *hrt_ctx,
pid_t pid, unsigned long vm_size,
unsigned long rss_size)
{
struct quadd_record_data record;
struct quadd_ma_data *ma = &record.ma;
struct quadd_comm_data_interface *comm = hrt_ctx->quadd_ctx->comm;
record.magic = QUADD_RECORD_MAGIC;
record.record_type = QUADD_RECORD_TYPE_MA;
record.cpu_mode = QUADD_CPU_MODE_NONE;
ma->pid = pid;
ma->time = quadd_get_time();
ma->vm_size = vm_size << PAGE_SHIFT;
ma->rss_size = rss_size << PAGE_SHIFT;
/*
pr_debug("vm: %llu bytes (%llu mb), rss: %llu bytes (%llu mb)\n",
ma->vm_size, ma->vm_size / 0x100000,
ma->rss_size, ma->rss_size / 0x100000);
*/
comm->put_sample(&record, NULL, 0);
}