OSStatus platform_flash_erase( platform_flash_driver_t *driver, uint32_t StartAddress, uint32_t EndAddress )
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL, exit, err = kParamErr);
require_action_quiet( driver->initialized != false, exit, err = kNotInitializedErr);
require_action( StartAddress >= driver->peripheral->flash_start_addr
&& EndAddress <= driver->peripheral->flash_start_addr + driver->peripheral->flash_length - 1, exit, err = kParamErr);
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL ){
err = internalFlashErase(StartAddress, EndAddress);
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
err = spiFlashErase(StartAddress, EndAddress);
require_noerr(err, exit);
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus MicoFlashDisableSecurity( mico_partition_t partition, uint32_t off_set, uint32_t size )
{
OSStatus err = kNoErr;
uint32_t start_addr = mico_partitions[ partition ].partition_start_addr + off_set;
uint32_t end_addr = mico_partitions[ partition ].partition_start_addr + off_set + size - 1;
require_action_quiet( partition > MICO_PARTITION_ERROR, exit, err = kParamErr );
require_action_quiet( partition < MICO_PARTITION_MAX, exit, err = kParamErr );
require_action_quiet( mico_partitions[ partition ].partition_owner != MICO_FLASH_NONE, exit, err = kNotFoundErr );
require_action_quiet( start_addr >= mico_partitions[ partition ].partition_start_addr, exit, err = kParamErr );
require_action_quiet( end_addr < mico_partitions[ partition ].partition_start_addr + mico_partitions[ partition ].partition_length, exit, err = kParamErr );
if( platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].initialized == false )
{
err = MicoFlashInitialize( partition );
require_noerr_quiet( err, exit );
}
mico_rtos_lock_mutex( &platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].flash_mutex );
err = platform_flash_disable_protect( &platform_flash_peripherals[ mico_partitions[ partition ].partition_owner ], start_addr, end_addr);
mico_rtos_unlock_mutex( &platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].flash_mutex );
exit:
return err;
}
// Start OTR negotiation if we haven't already done so.
SOSCoderStatus
SOSCoderStart(SOSCoderRef coder, CFErrorRef *error) {
CFMutableStringRef action = CFStringCreateMutable(kCFAllocatorDefault, 0);
CFStringRef beginState = NULL;
SOSCoderStatus result = kSOSCoderFailure;
CFMutableDataRef startPacket = NULL;
require_action_quiet(coder->sessRef, coderFailure, CFStringAppend(action, CFSTR("*** no otr session ***")));
beginState = CFCopyDescription(coder->sessRef);
require_action_quiet(!coder->waitingForDataPacket, negotiatingOut, CFStringAppend(action, CFSTR("waiting for peer to send first data packet")));
require_action_quiet(!SecOTRSGetIsReadyForMessages(coder->sessRef), coderFailure, CFStringAppend(action, CFSTR("otr session ready"));
result = kSOSCoderDataReturned);
require_action_quiet(SecOTRSGetIsIdle(coder->sessRef), negotiatingOut, CFStringAppend(action, CFSTR("otr negotiating already")));
require_action_quiet(startPacket = CFDataCreateMutable(kCFAllocatorDefault, 0), coderFailure, SOSCreateError(kSOSErrorAllocationFailure, CFSTR("alloc failed"), NULL, error));
require_quiet(SOSOTRSAppendStartPacket(coder->sessRef, startPacket, error), coderFailure);
CFRetainAssign(coder->pendingResponse, startPacket);
negotiatingOut:
result = kSOSCoderNegotiating;
coderFailure:
// Uber state log
if (result == kSOSCoderFailure && error && *error)
CFStringAppendFormat(action, NULL, CFSTR(" %@"), *error);
secnotice("coder", "%@ %s %@ %@ returned %s", beginState,
SecOTRPacketTypeString(startPacket), action, coder->sessRef, SOSCoderString(result));
CFReleaseNull(startPacket);
CFReleaseSafe(beginState);
CFRelease(action);
return result;
}
OSStatus platform_flash_init( platform_flash_driver_t *driver, const platform_flash_t *peripheral )
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL && peripheral != NULL, exit, err = kParamErr);
require_action_quiet( driver->initialized == false, exit, err = kNoErr);
driver->peripheral = (platform_flash_t *)peripheral;
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL ){
err = internalFlashInitialize();
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
err = init_sflash( &sflash_handle, 0, SFLASH_WRITE_ALLOWED );
require_noerr(err, exit);
}
#endif
else{
err = kTypeErr;
goto exit;
}
#ifndef NO_MICO_RTOS
err = mico_rtos_init_mutex( &driver->flash_mutex );
#endif
require_noerr(err, exit);
driver->initialized = true;
exit:
return err;
}
OSStatus platform_flash_read( platform_flash_driver_t *driver, volatile uint32_t* FlashAddress, uint8_t* Data ,uint32_t DataLength )
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL, exit, err = kParamErr);
require_action_quiet( driver->initialized != false, exit, err = kNotInitializedErr);
require_action( (*FlashAddress >= driver->peripheral->flash_start_addr)
&& (*FlashAddress + DataLength) <= (driver->peripheral->flash_start_addr + driver->peripheral->flash_length), exit, err = kParamErr);
#ifndef NO_MICO_RTOS
mico_rtos_lock_mutex( &driver->flash_mutex );
#endif
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL ){
memcpy(Data, (void *)(*FlashAddress), DataLength);
*FlashAddress += DataLength;
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
err = sflash_read( &sflash_handle, *FlashAddress, Data, DataLength );
require_noerr(err, exit_with_mutex);
*FlashAddress += DataLength;
}
#endif
else{
err = kTypeErr;
goto exit_with_mutex;
}
exit_with_mutex:
#ifndef NO_MICO_RTOS
mico_rtos_unlock_mutex( &driver->flash_mutex );
#endif
exit:
return err;
}
OSStatus platform_flash_write( platform_flash_driver_t *driver, volatile uint32_t* FlashAddress, uint8_t* Data ,uint32_t DataLength )
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL, exit, err = kParamErr);
require_action_quiet( driver->initialized != false, exit, err = kNotInitializedErr);
require_action( *FlashAddress >= driver->peripheral->flash_start_addr
&& *FlashAddress + DataLength <= driver->peripheral->flash_start_addr + driver->peripheral->flash_length, exit, err = kParamErr);
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL ){
err = internalFlashWrite(FlashAddress, (uint32_t *)Data, DataLength);
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
err = sflash_write( &sflash_handle, *FlashAddress, Data, DataLength );
require_noerr(err, exit);
*FlashAddress += DataLength;
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus platform_uart_receive_bytes( platform_uart_driver_t* driver, uint8_t* data_in, uint32_t expected_data_size, uint32_t timeout_ms )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ) && ( data_in != NULL ) && ( expected_data_size != 0 ), exit, err = kParamErr);
require_action_quiet( driver->rx_ring_buffer != NULL , exit, err = kUnsupportedErr);
while ( expected_data_size != 0 )
{
uint32_t transfer_size = MIN(driver->rx_ring_buffer->size / 2, expected_data_size);
/* Check if ring buffer already contains the required amount of data. */
if ( transfer_size > ring_buffer_used_space( driver->rx_ring_buffer ) )
{
/* Set rx_size and wait in rx_complete semaphore until data reaches rx_size or timeout occurs */
driver->rx_size = transfer_size;
if ( mico_rtos_get_semaphore( &driver->rx_complete, timeout_ms ) != kNoErr )
{
driver->rx_size = 0;
err = kTimeoutErr;
goto exit;
}
/* Reset rx_size to prevent semaphore being set while nothing waits for the data */
driver->rx_size = 0;
}
expected_data_size -= transfer_size;
// Grab data from the buffer
do
{
uint8_t* available_data;
uint32_t bytes_available;
ring_buffer_get_data( driver->rx_ring_buffer, &available_data, &bytes_available );
bytes_available = MIN( bytes_available, transfer_size );
memcpy( data_in, available_data, bytes_available );
transfer_size -= bytes_available;
data_in = ( (uint8_t*)data_in + bytes_available );
ring_buffer_consume( driver->rx_ring_buffer, bytes_available );
}
while ( transfer_size != 0 );
}
require_action( expected_data_size == 0, exit, err = kReadErr);
exit:
platform_mcu_powersave_enable();
return err;
}
CFDataRef SOSRecoveryKeyCopyKeyForAccount(CFAllocatorRef allocator, SOSAccountRef account, SOSRecoveryKeyBagRef recoveryKeyBag, CFErrorRef *error) {
CFDataRef retval = NULL;
require_action_quiet(recoveryKeyBag && recoveryKeyBag->recoveryKeyBag && recoveryKeyBag->accountDSID,
errOut, SOSCreateError(kSOSErrorDecodeFailure, CFSTR("Null recoveryKeyBag Object"), NULL, error));
CFStringRef dsid = asString(SOSAccountGetValue(account, kSOSDSIDKey, NULL), error);
require_action_quiet(dsid, errOut, SOSCreateError(kSOSErrorDecodeFailure, CFSTR("No DSID in Account"), NULL, error));
require_action_quiet(CFEqual(dsid, recoveryKeyBag->accountDSID), errOut, SOSCreateError(kSOSErrorDecodeFailure, CFSTR("Account/RecoveryKeybag DSID miss-match"), NULL, error));
retval = CFDataCreateCopy(allocator, recoveryKeyBag->recoveryKeyBag);
errOut:
return retval;
}
OSStatus platform_gpio_irq_disable( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
ioport_port_mask_t mask = ioport_pin_to_mask ( gpio->pin );
ioport_port_t port = ioport_pin_to_port_id( gpio->pin );
volatile Pio* port_register = arch_ioport_port_to_base( port );
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
/* Disable interrupt on pin */
port_register->PIO_IDR = mask;
/* Disable Cortex-M interrupt vector as well if no pin interrupt is enabled */
if ( port_register->PIO_IMR == 0 )
{
NVIC_DisableIRQ( irq_vectors[port] );
}
gpio_irq_data[port][mask].wakeup_pin = false;
gpio_irq_data[port][mask].arg = 0;
gpio_irq_data[port][mask].callback = NULL;
exit:
platform_mcu_powersave_enable();
return err;
}
// Magicoe OSStatus platform_spi_deinit( const platform_spi_t* spi )
OSStatus platform_spi_deinit( platform_spi_driver_t* driver )
{
uint32_t bv;
OSStatus err = kNoErr;
platform_spi_t const *peripheral;;
LPC_SPI_T *pSPI;
require_action_quiet( ( driver != NULL ) && ( driver->peripheral != NULL ), exit, err = kParamErr);
peripheral = driver->peripheral , pSPI = peripheral->port;
bv = pSPI == LPC_SPI0 ? 1UL << 9 : 1UL<<10;
g_pASys->ASYNCAPBCLKCTRLCLR = bv; // disable clock to SPI
g_pASys->ASYNCPRESETCTRLSET = bv; // put SPI into reset state
// disable DMA channels for SPI
g_pDMA->DMACOMMON[0].ENABLECLR = (1UL<<peripheral->dmaRxChnNdx) | (1UL<<peripheral->dmaTxChnNdx);
g_pDMA->DMACOMMON[0].INTENCLR = (1UL<<peripheral->dmaRxChnNdx) | (1UL<<peripheral->dmaTxChnNdx);
#ifndef NO_MICO_RTOS
if (driver->sem_xfer_done != 0)
mico_rtos_deinit_semaphore(&driver->sem_xfer_done);
driver->sem_xfer_done = 0;
#endif
exit:
return err;
}
bool SOSAccountSendIKSPSyncList(SOSAccountRef account, CFErrorRef *error){
bool result = true;
__block CFErrorRef localError = NULL;
__block CFMutableArrayRef ids = NULL;
SOSCircleRef circle = NULL;
require_action_quiet(SOSAccountIsInCircle(account, NULL), xit,
SOSCreateError(kSOSErrorNoCircle, CFSTR("This device is not in circle"),
NULL, &localError));
circle = SOSAccountGetCircle(account, error);
ids = CFArrayCreateMutableForCFTypes(kCFAllocatorDefault);
SOSCircleForEachValidPeer(circle, account->user_public, ^(SOSPeerInfoRef peer) {
if (!SOSAccountIsThisPeerIDMe(account, SOSPeerInfoGetPeerID(peer))) {
if(SOSPeerInfoShouldUseIDSTransport(SOSFullPeerInfoGetPeerInfo(account->my_identity), peer) &&
SOSPeerInfoShouldUseIDSMessageFragmentation(SOSFullPeerInfoGetPeerInfo(account->my_identity), peer) &&
!SOSPeerInfoShouldUseACKModel(SOSFullPeerInfoGetPeerInfo(account->my_identity), peer)){
SOSTransportMessageIDSSetFragmentationPreference(account->ids_message_transport, kCFBooleanTrue);
CFStringRef deviceID = SOSPeerInfoCopyDeviceID(peer);
if(deviceID != NULL){
CFArrayAppendValue(ids, deviceID);
}
CFReleaseNull(deviceID);
}
}
});
OSStatus platform_adc_init( const platform_adc_t* adc, uint32_t sample_cycle )
{
OSStatus err = kNoErr;
struct adc_config adc_cfg;
UNUSED_PARAMETER(sample_cycle);
platform_mcu_powersave_disable();
require_action_quiet( adc != NULL, exit, err = kParamErr);
if( initialized != true )
{
adc_enable();
adc_select_clock_source_mck(ADC);
adc_get_config_defaults(&adc_cfg);
adc_init(ADC, &adc_cfg);
adc_set_trigger(ADC, ADC_TRIG_SW);
adc_set_resolution(ADC, adc->resolution);
initialized = true;
}
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_adc_take_sample( const platform_adc_t* adc, uint16_t* output )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( adc != NULL, exit, err = kParamErr);
channel_num = adc->channel;
adc_channel_enable(ADC, adc->channel);
adc_set_callback(ADC, adc->interrupt, adc_end_conversion, 1);
/* Start conversion */
adc_start_software_conversion(ADC);
adc_start_calibration(ADC);
while (adc_get_interrupt_status(ADC) & (1 << adc->channel));
*output = adc_channel_get_value(ADC, adc->channel);
mico_thread_msleep(1);
adc_channel_disable(ADC, adc->channel);
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_flash_disable_protect( const platform_flash_t *peripheral, uint32_t start_address, uint32_t end_address )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr);
require_action( start_address >= peripheral->flash_start_addr
&& end_address <= peripheral->flash_start_addr + peripheral->flash_length - 1, exit, err = kParamErr);
if( peripheral->flash_type == FLASH_TYPE_EMBEDDED ){
#ifdef MCU_EBANLE_FLASH_PROTECT
err = internalFlashProtect( start_address, end_address, false );
#endif
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( peripheral->flash_type == FLASH_TYPE_SPI ){
err = kNoErr;
goto exit;
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus platform_gpio_irq_disable( const platform_gpio_t* gpio )
{
uint16_t interrupt_line;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
interrupt_line = (uint16_t) ( 1 << gpio->pin_number );
if ( ( EXTI->IMR & interrupt_line ) && gpio_irq_data[gpio->pin_number].owner_port == gpio->port )
{
bool interrupt_line_used = 0;
IRQn_Type interrupt_vector = (IRQn_Type)0;
EXTI_InitTypeDef exti_init_structure;
/* Disable EXTI interrupt line */
exti_init_structure.EXTI_Line = (uint32_t)interrupt_line;
exti_init_structure.EXTI_LineCmd = DISABLE;
exti_init_structure.EXTI_Mode = EXTI_Mode_Interrupt;
exti_init_structure.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_Init( &exti_init_structure );
exti_init_structure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_Init( &exti_init_structure );
/* Disable NVIC interrupt */
if ( ( interrupt_line & 0x001F ) != 0 )
{
/* Line 0 to 4 */
interrupt_vector = (IRQn_Type) ( EXTI0_IRQn + gpio->pin_number );
interrupt_line_used = false;
}
else if ( ( interrupt_line & 0x03E0 ) != 0 )
{
/* Line 5 to 9 */
interrupt_vector = EXTI9_5_IRQn;
interrupt_line_used = ( ( EXTI->IMR & 0x3e0U ) != 0 ) ? true : false;
}
else if ( ( interrupt_line & 0xFC00 ) != 0 )
{
/* Line 10 to 15 */
interrupt_vector = EXTI15_10_IRQn;
interrupt_line_used = ( ( EXTI->IMR & 0xfc00U ) != 0 ) ? true : false;
}
/* Some IRQ lines share a vector. Disable vector only if not used */
if ( interrupt_line_used == false )
{
NVIC_DisableIRQ( interrupt_vector );
}
gpio_irq_data[gpio->pin_number].owner_port = 0;
gpio_irq_data[gpio->pin_number].handler = 0;
gpio_irq_data[gpio->pin_number].arg = 0;
}
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_flash_read( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data ,uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr);
require_action( (*start_address >= peripheral->flash_start_addr)
&& (*start_address + length) <= ( peripheral->flash_start_addr + peripheral->flash_length), exit, err = kParamErr);
if( peripheral->flash_type == FLASH_TYPE_EMBEDDED ){
memcpy(data, (void *)(*start_address), length);
*start_address += length;
}
#ifdef USE_MICO_SPI_FLASH
else if( peripheral->flash_type == FLASH_TYPE_SPI ){
err = sflash_read( &sflash_handle, *start_address, data, length );
require_noerr(err, exit);
*start_address += length;
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus platform_flash_deinit( platform_flash_driver_t *driver)
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL, exit, err = kParamErr);
driver->initialized = false;
#ifndef NO_MICO_RTOS
mico_rtos_deinit_mutex( &driver->flash_mutex );
#endif
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL){
err = internalFlashFinalize();
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
sflash_handle.device_id = 0x0;
}
#endif
else
return kUnsupportedErr;
exit:
return err;
}
OSStatus platform_flash_write( const platform_flash_t *peripheral, volatile uint32_t* start_address, uint8_t* data ,uint32_t length )
{
OSStatus err = kNoErr;
require_action_quiet( peripheral != NULL, exit, err = kParamErr);
require_action( *start_address >= peripheral->flash_start_addr
&& *start_address + length <= peripheral->flash_start_addr + peripheral->flash_length, exit, err = kParamErr);
if( peripheral->flash_type == FLASH_TYPE_EMBEDDED ){
err = internalFlashWrite( start_address, (uint32_t *)data, length);
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( peripheral->flash_type == FLASH_TYPE_SPI ){
err = sflash_write( &sflash_handle, *start_address, data, length );
require_noerr(err, exit);
*start_address += length;
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus platform_flash_deinit( platform_flash_driver_t *driver)
{
OSStatus err = kNoErr;
require_action_quiet( driver != NULL, exit, err = kParamErr);
driver->initialized = false;
if( driver->peripheral->flash_type == FLASH_TYPE_INTERNAL){
err = internalFlashFinalize();
require_noerr(err, exit);
}
#ifdef USE_MICO_SPI_FLASH
else if( driver->peripheral->flash_type == FLASH_TYPE_SPI ){
sflash_handle.device_id = 0x0;
}
#endif
else{
err = kTypeErr;
goto exit;
}
exit:
return err;
}
OSStatus platform_gpio_irq_enable( const platform_gpio_t* gpio, platform_gpio_irq_trigger_t trigger, platform_gpio_irq_callback_t handler, void* arg )
{
uint8_t intPort;
int i;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL && trigger != IRQ_TRIGGER_BOTH_EDGES, exit, err = kParamErr);
switch( gpio->port ){
case GPIOA:
intPort = GPIO_A_INT;
break;
case GPIOB:
intPort = GPIO_B_INT;
break;
case GPIOC:
intPort = GPIO_C_INT;
break;
default:
err = kParamErr;
goto exit;
}
for( i = 0; i < NUMBER_OF_GPIO_IRQ_LINES; i++ ){
if ( gpio_irq_data[i].port == gpio->port && gpio_irq_data[i].pin == gpio->pin){
/* GPIO IRQ already exist */
gpio_irq_data[ i ].handler = handler;
gpio_irq_data[ i ].arg = arg;
break;
}
}
if(i == NUMBER_OF_GPIO_IRQ_LINES){
/* GPIO IRQ not exist */
for( i = 0; i < NUMBER_OF_GPIO_IRQ_LINES; i++ ){
if ( gpio_irq_data[i].handler == NULL ){
gpio_irq_data[ i ].port = gpio->port;
gpio_irq_data[ i ].pin = gpio->pin;
gpio_irq_data[ i ].handler = handler;
gpio_irq_data[ i ].arg = arg;
break;
}
}
/* No space to add one */
if( i == NUMBER_OF_GPIO_IRQ_LINES)
return kNoSpaceErr;
}
GpioIntClr(intPort, ((uint32_t)1 << gpio->pin));
if( trigger == IRQ_TRIGGER_RISING_EDGE )
GpioIntEn(intPort, ((uint32_t)1 << gpio->pin), GPIO_POS_EDGE_TRIGGER);
else
GpioIntEn(intPort, ((uint32_t)1 << gpio->pin), GPIO_NEG_EDGE_TRIGGER);
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_gpio_enable_clock( const platform_gpio_t* gpio )
{
uint8_t port_number;
OSStatus err = kNoErr;
require_action_quiet( gpio != NULL, exit, err = kParamErr);
/* Enable peripheral clock for this port */
port_number = platform_gpio_get_port_number( gpio->port );
require_action_quiet( port_number != 0xFF, exit, err = kParamErr);
RCC->AHB1ENR |= gpio_peripheral_clocks[port_number];
exit:
return err;
}
OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
{
uint8_t uart_number;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ), exit, err = kParamErr);
uart_number = platform_uart_get_port_number( driver->peripheral->port );
/* Disable USART */
USART_Cmd( driver->peripheral->port, DISABLE );
/* Deinitialise USART */
USART_DeInit( driver->peripheral->port );
/**************************************************************************
* De-initialise STM32 DMA and interrupt
**************************************************************************/
/* Deinitialise DMA streams */
DMA_DeInit( driver->peripheral->tx_dma_config.stream );
DMA_DeInit( driver->peripheral->rx_dma_config.stream );
/* Disable TC (transfer complete) interrupt at the source */
DMA_ITConfig( driver->peripheral->tx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );
DMA_ITConfig( driver->peripheral->rx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );
/* Disable transmit DMA interrupt at Cortex-M3 */
NVIC_DisableIRQ( driver->peripheral->tx_dma_config.irq_vector );
/**************************************************************************
* De-initialise STM32 USART interrupt
**************************************************************************/
USART_ITConfig( driver->peripheral->port, USART_IT_RXNE, DISABLE );
/* Disable UART interrupt vector on Cortex-M3 */
NVIC_DisableIRQ( driver->peripheral->rx_dma_config.irq_vector );
/* Disable registers clocks */
uart_peripheral_clock_functions[uart_number]( uart_peripheral_clocks[uart_number], DISABLE );
mico_rtos_deinit_semaphore( &driver->rx_complete );
mico_rtos_deinit_semaphore( &driver->tx_complete );
mico_rtos_deinit_mutex( &driver->tx_mutex );
driver->rx_size = 0;
driver->tx_size = 0;
driver->last_transmit_result = kNoErr;
driver->last_receive_result = kNoErr;
driver->initialized = false;
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_adc_init( const platform_adc_t* adc, uint32_t sample_cycle )
{
GPIO_InitTypeDef gpio_init_structure;
ADC_InitTypeDef adc_init_structure;
ADC_CommonInitTypeDef adc_common_init_structure;
uint8_t a;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( adc != NULL, exit, err = kParamErr);
/* Enable peripheral clock for this port */
err = platform_gpio_enable_clock( adc->pin );
require_noerr(err, exit);
/* Initialize the associated GPIO */
gpio_init_structure.GPIO_Pin = (uint32_t)( 1 << adc->pin->pin_number );;
gpio_init_structure.GPIO_Speed = (GPIOSpeed_TypeDef) 0;
gpio_init_structure.GPIO_Mode = GPIO_Mode_AN;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
GPIO_Init( adc->pin->port, &gpio_init_structure );
RCC_APB2PeriphClockCmd( adc->adc_peripheral_clock, ENABLE );
/* Initialize the ADC */
ADC_StructInit( &adc_init_structure );
adc_init_structure.ADC_Resolution = ADC_Resolution_12b;
adc_init_structure.ADC_ScanConvMode = DISABLE;
adc_init_structure.ADC_ContinuousConvMode = DISABLE;
adc_init_structure.ADC_ExternalTrigConv = ADC_ExternalTrigConvEdge_None;
adc_init_structure.ADC_DataAlign = ADC_DataAlign_Right;
adc_init_structure.ADC_NbrOfConversion = 1;
ADC_Init( adc->port, &adc_init_structure );
ADC_CommonStructInit( &adc_common_init_structure );
adc_common_init_structure.ADC_Mode = ADC_Mode_Independent;
adc_common_init_structure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
adc_common_init_structure.ADC_Prescaler = ADC_Prescaler_Div2;
adc_common_init_structure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit( &adc_common_init_structure );
ADC_Cmd( adc->port, ENABLE );
/* Find the closest supported sampling time by the MCU */
for ( a = 0; ( a < sizeof( adc_sampling_cycle ) / sizeof(uint16_t) ) && adc_sampling_cycle[a] < sample_cycle; a++ )
{
}
/* Initialize the ADC channel */
ADC_RegularChannelConfig( adc->port, adc->channel, adc->rank, a );
exit:
platform_mcu_powersave_enable();
return err;
}
SOSRecoveryKeyBagRef SOSRecoveryKeyBagCreateForAccount(CFAllocatorRef allocator, SOSAccountRef account, CFDataRef pubData, CFErrorRef *error) {
SOSRecoveryKeyBagRef retval = NULL;
SOSGenCountRef gencount = NULL;
require_action_quiet(account, errOut, SOSCreateError(kSOSErrorEncodeFailure, CFSTR("Null Account Object"), NULL, error));
CFStringRef dsid = asString(SOSAccountGetValue(account, kSOSDSIDKey, NULL), error);
gencount = SOSGenerationCreate();
require_action_quiet(pubData && dsid && gencount, errOut, SOSCreateError(kSOSErrorEncodeFailure, CFSTR("Couldn't get recovery keybag components"), NULL, error));
retval = CFTypeAllocate(SOSRecoveryKeyBag, struct __OpaqueSOSRecoveryKeyBag, allocator);
require_action_quiet(retval, errOut, SOSCreateError(kSOSErrorEncodeFailure, CFSTR("Couldn't get memory for recoveryKeyBag"), NULL, error));
retval->rkbVersion = CURRENT_RKB_VERSION;
retval->accountDSID = CFStringCreateCopy(allocator, dsid);
CFRetainAssign(retval->generation, gencount);
retval->recoveryKeyBag = CFDataCreateCopy(allocator, pubData);
errOut:
CFReleaseNull(gencount);
return retval;
}
static bool sosAccountSetPreApprovedInfo(SOSAccountRef account, CFStringRef peerID, CFErrorRef *error) {
bool retval = false;
CFMutableSetRef preApprovedPeers = SOSAccountCopyPreApprovedHSA2Info(account);
require_action_quiet(preApprovedPeers, errOut, SOSCreateError(kSOSErrorAllocationFailure, CFSTR("Can't Alloc Pre-Approved Peers Set"), NULL, error));
CFSetSetValue(preApprovedPeers, peerID);
require(SOSAccountSetValue(account, kSOSHsaPreApprovedPeerKeyInfo, preApprovedPeers, error), errOut);
retval = true;
errOut:
CFReleaseNull(preApprovedPeers);
return retval;
}
SOSCoderRef SOSCoderCreateFromData(CFDataRef exportedData, CFErrorRef *error) {
SOSCoderRef p = calloc(1, sizeof(struct __OpaqueSOSCoder));
const uint8_t *der = CFDataGetBytePtr(exportedData);
const uint8_t *der_end = der + CFDataGetLength(exportedData);
CFDataRef otr_data = NULL;
ccder_tag tag;
require(ccder_decode_tag(&tag, der, der_end),fail);
switch (tag) {
case CCDER_OCTET_STRING: // TODO: this code is safe to delete?
{
der = der_decode_data(kCFAllocatorDefault, 0, &otr_data, error, der, der_end);
p->waitingForDataPacket = false;
}
break;
case CCDER_CONSTRUCTED_SEQUENCE:
{
const uint8_t *sequence_end = NULL;
der = ccder_decode_sequence_tl(&sequence_end, der, der_end);
require_action_quiet(sequence_end == der_end, fail, SecCFDERCreateError(kSOSErrorDecodeFailure, CFSTR("Extra data in SOS coder"), NULL, error));
der = der_decode_data(kCFAllocatorDefault, 0, &otr_data, error, der, sequence_end);
der = der_decode_bool(&p->waitingForDataPacket, der, sequence_end);
if (der != sequence_end) { // optionally a pending response
der = der_decode_data(kCFAllocatorDefault, 0, &p->pendingResponse, error, der, sequence_end);
}
}
break;
default:
SecCFDERCreateError(kSOSErrorDecodeFailure, CFSTR("Unsupported SOS Coder DER"), NULL, error);
goto fail;
}
require(der, fail);
p->sessRef = SecOTRSessionCreateFromData(NULL, otr_data);
require(p->sessRef, fail);
CFReleaseSafe(otr_data);
return p;
fail:
SOSCoderDispose(p);
CFReleaseSafe(otr_data);
return NULL;
}
// Return true (1) if the signature verifies.
static bool SOSPeerInfoVerify(SOSPeerInfoRef peer, CFErrorRef *error) {
bool result = false;
const struct ccdigest_info *di = ccsha256_di();
uint8_t hbuf[di->output_size];
SecKeyRef pubKey = SOSPeerInfoCopyPubKey(peer);
require_action_quiet(pubKey, error_out,
SOSErrorCreate(kSOSErrorNoKey, error, NULL,
CFSTR("Couldn't find pub key for %@"), peer));
require_quiet(SOSDescriptionHash(peer, di, hbuf, error), error_out);
require_action_quiet(sosVerifyHash(pubKey, di, hbuf, peer->signature), error_out,
SOSErrorCreate(kSOSErrorBadSignature, error, NULL,
CFSTR("Signature didn't verify for %@"), peer));
result = true;
error_out:
CFReleaseNull(pubKey);
return result;
}
static bool SOSPeerInfoSign(SecKeyRef privKey, SOSPeerInfoRef peer, CFErrorRef *error) {
bool status = false;
const struct ccdigest_info *di = ccsha256_di();
uint8_t hbuf[di->output_size];
CFDataRef newSignature = NULL;
require_action_quiet(SOSDescriptionHash(peer, di, hbuf, error), fail,
SOSCreateError(kSOSErrorUnexpectedType, CFSTR("Failed to hash description for peer"), NULL, error));
newSignature = sosSignHash(privKey, di, hbuf);
require_action_quiet(newSignature, fail, SOSCreateError(kSOSErrorUnexpectedType, CFSTR("Failed to sign peerinfo for peer"), NULL, error));
CFReleaseNull(peer->signature);
peer->signature = newSignature;
newSignature = NULL;
status = true;
fail:
CFReleaseNull(newSignature);
return status;
}
OSStatus AES_GCM_VerifyMessage( AES_GCM_Context *inContext, const uint8_t inAuthTag[ kAES_CGM_Size ] )
{
OSStatus err;
uint8_t authTag[ kAES_CGM_Size ];
err = gcm_compute_tag( authTag, kAES_CGM_Size, &inContext->ctx );
require_noerr( err, exit );
require_action_quiet( memcmp_constant_time( authTag, inAuthTag, kAES_CGM_Size ) == 0, exit, err = kAuthenticationErr );
exit:
return( err );
}
OSStatus MicoFlashRead( mico_partition_t partition, volatile uint32_t* off_set, uint8_t* outBuffer ,uint32_t inBufferLength)
{
OSStatus err = kNoErr;
uint32_t start_addr = mico_partitions[ partition ].partition_start_addr + *off_set;
uint32_t end_addr = mico_partitions[ partition ].partition_start_addr + *off_set + inBufferLength - 1;
if (inBufferLength == 0)
goto exit;
require_action_quiet( partition > MICO_PARTITION_ERROR, exit, err = kParamErr );
require_action_quiet( partition < MICO_PARTITION_MAX, exit, err = kParamErr );
require_action_quiet( mico_partitions[ partition ].partition_owner != MICO_FLASH_NONE, exit, err = kNotFoundErr );
#ifndef BOOTLOADER
require_action_quiet( ( mico_partitions[ partition ].partition_options & PAR_OPT_READ_MASK ) == PAR_OPT_READ_EN, exit, err = kPermissionErr );
#endif
require_action_quiet( start_addr >= mico_partitions[ partition ].partition_start_addr, exit, err = kParamErr );
require_action_quiet( end_addr < mico_partitions[ partition ].partition_start_addr + mico_partitions[ partition ].partition_length , exit, err = kParamErr );
if( platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].initialized == false )
{
err = MicoFlashInitialize( partition );
require_noerr_quiet( err, exit );
}
mico_rtos_lock_mutex( &platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].flash_mutex );
err = platform_flash_read( &platform_flash_peripherals[ mico_partitions[ partition ].partition_owner ], &start_addr, outBuffer, inBufferLength );
*off_set = start_addr - mico_partitions[ partition ].partition_start_addr;
mico_rtos_unlock_mutex( &platform_flash_drivers[ mico_partitions[ partition ].partition_owner ].flash_mutex );
exit:
return err;
}
