bool rtl92cu_phy_config_rf_with_headerfile( struct ieee80211_hw *hw,
enum radio_path rfpath )
{
int i;
u32 *radioa_array_table;
u32 *radiob_array_table;
u16 radioa_arraylen, radiob_arraylen;
struct rtl_priv *rtlpriv = rtl_priv( hw );
struct rtl_hal *rtlhal = rtl_hal( rtl_priv( hw ) );
struct rtl_phy *rtlphy = &( rtlpriv->phy );
if ( IS_92C_SERIAL( rtlhal->version ) ) {
radioa_arraylen = rtlphy->hwparam_tables[RADIOA_2T].length;
radioa_array_table = rtlphy->hwparam_tables[RADIOA_2T].pdata;
radiob_arraylen = rtlphy->hwparam_tables[RADIOB_2T].length;
radiob_array_table = rtlphy->hwparam_tables[RADIOB_2T].pdata;
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE,
"Radio_A:RTL8192CERADIOA_2TARRAY\n" );
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE,
"Radio_B:RTL8192CE_RADIOB_2TARRAY\n" );
} else {
radioa_arraylen = rtlphy->hwparam_tables[RADIOA_1T].length;
radioa_array_table = rtlphy->hwparam_tables[RADIOA_1T].pdata;
radiob_arraylen = rtlphy->hwparam_tables[RADIOB_1T].length;
radiob_array_table = rtlphy->hwparam_tables[RADIOB_1T].pdata;
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE,
"Radio_A:RTL8192CE_RADIOA_1TARRAY\n" );
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE,
"Radio_B:RTL8192CE_RADIOB_1TARRAY\n" );
}
RT_TRACE( rtlpriv, COMP_INIT, DBG_TRACE, "Radio No %x\n", rfpath );
switch ( rfpath ) {
case RF90_PATH_A:
for ( i = 0; i < radioa_arraylen; i = i + 2 ) {
rtl_rfreg_delay( hw, rfpath, radioa_array_table[i],
RFREG_OFFSET_MASK,
radioa_array_table[i + 1] );
}
break;
case RF90_PATH_B:
for ( i = 0; i < radiob_arraylen; i = i + 2 ) {
rtl_rfreg_delay( hw, rfpath, radiob_array_table[i],
RFREG_OFFSET_MASK,
radiob_array_table[i + 1] );
}
break;
case RF90_PATH_C:
RT_TRACE( rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n" );
break;
case RF90_PATH_D:
RT_TRACE( rtlpriv, COMP_ERR, DBG_EMERG,
"switch case not processed\n" );
break;
default:
break;
}
return true;
}
static void rtl8188e_config_rf_reg(struct adapter *adapt,
u32 addr, u32 data)
{
u32 content = 0x1000; /*RF Content: radio_a_txt*/
u32 maskforphyset = content & 0xE000;
rtl_rfreg_delay(adapt, RF90_PATH_A, addr | maskforphyset,
RFREG_OFFSET_MASK,
data);
}
