static void _restore_network_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
unsigned short caps;
u8 join_type;
#if 1
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
// disable update TSF
SetBcnCtrlReg(padapter, BIT(4), 0);
//=======================================================
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//pmlmeinfo->assoc_AP_vendor = maxAP;
if (padapter->registrypriv.wifi_spec) {
// for WiFi test, follow WMM test plan spec
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
// for WiFi test, mixed mode with intel STA under bg mode throughput issue
if (padapter->mlmepriv.htpriv.ht_option == 0)
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
#endif
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
static void _FirmwareSelfReset(PADAPTER Adapter)
{
u8 u1bTmp;
u8 Delay = 100;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if((pHalData->FirmwareVersion > 0x21) ||
(pHalData->FirmwareVersion == 0x21 &&
pHalData->FirmwareSubVersion >= 0x01))
{
/*
printk("==> %s REG 02(0x%04x),80(0x%08x),130(0x%08x),134(0x%08x),138(0x%08x),13c(0x%08x),\
1c0(0x%08x),1c4(0x%08x),1c8(0x%08x),1cc(0x%08x),\n",
__FUNCTION__,rtw_read16(Adapter,0x02),rtw_read32(Adapter,0x80),
rtw_read32(Adapter,0x130),
rtw_read32(Adapter,0x134),
rtw_read32(Adapter,0x138),
rtw_read32(Adapter,0x13c),
rtw_read32(Adapter,0x1c0),
rtw_read32(Adapter,0x1c4),
rtw_read32(Adapter,0x1c8),
rtw_read32(Adapter,0x1cc));
*/
//0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test
rtw_write8(Adapter, REG_HMETFR+3, 0x20);
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
while(u1bTmp&BIT2)
{
Delay--;
//RT_TRACE(COMP_INIT, DBG_LOUD, ("PowerOffAdapter8192CE(): polling 0x03[2] Delay = %d \n", Delay));
if(Delay == 0)
break;
//delay_us(50);
rtw_udelay_os(50);
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
}
if((u1bTmp&BIT2) && (Delay == 0))
{
DBG_8192C("FirmwareDownload92C():fw reset by itself Fail!!!!!! 0x03 = %x\n", u1bTmp);
//RT_ASSERT(FALSE, ("PowerOffAdapter8192CE(): 0x03 = %x\n", u1bTmp));
rtw_write8(Adapter,REG_SYS_FUNC_EN+1,(rtw_read8(Adapter, REG_SYS_FUNC_EN+1)&~BIT2));
}
/*
printk("==> %s REG 02(0x%04x),80(0x%08x),130(0x%08x),134(0x%08x),138(0x%08x),13c(0x%08x),\
1c0(0x%08x),1c4(0x%08x),1c8(0x%08x),1cc(0x%08x),\n",
__FUNCTION__,rtw_read16(Adapter,0x02),rtw_read32(Adapter,0x80),
rtw_read32(Adapter,0x130),
rtw_read32(Adapter,0x134),
rtw_read32(Adapter,0x138),
rtw_read32(Adapter,0x13c),
rtw_read32(Adapter,0x1c0),
rtw_read32(Adapter,0x1c4),
rtw_read32(Adapter,0x1c8),
rtw_read32(Adapter,0x1cc));
*/
}
}
static VOID
_FWDownloadEnable(
IN PADAPTER Adapter,
IN BOOLEAN enable
)
{
u8 tmp;
if(enable)
{
// 8051 with wrapper enable
tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04);
// MCU firmware download enable.
tmp = rtw_read8(Adapter, REG_MCUFWDL);
rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01);
// 8051 enable
tmp = rtw_read8(Adapter, REG_MCUFWDL+2);
rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7);
}
else
{
// MCU firmware download enable.
tmp = rtw_read8(Adapter, REG_MCUFWDL);
rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe);
// Reserved for fw extension.
rtw_write8(Adapter, REG_MCUFWDL+1, 0x00);
}
}
//
// Description:
// Turn on LED according to LedPin specified.
//
static void
SwLedOn_8188EU(
_adapter *padapter,
PLED_USB pLed
)
{
u8 LedCfg;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (RTW_CANNOT_RUN(padapter))
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch(pLed->LedPin)
{
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on.
break;
default:
break;
}
pLed->bLedOn = _TRUE;
}
static VOID
_InitTxBufferBoundary(
IN PADAPTER Adapter
)
{
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u8 txpktbuf_bndy;
if(!pregistrypriv->wifi_spec){
txpktbuf_bndy = TX_PAGE_BOUNDARY;
}
else{//for WMM
txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY;
}
rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
#if 1
rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
#else
txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL);
txdmactrl &= ~BCN_HEAD_MASK;
txdmactrl |= BCN_HEAD(txpktbuf_bndy);
PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl);
#endif
}
//
// Description:
// Turn on LED according to LedPin specified.
//
static void
SwLedOn_8188EU(
_adapter *padapter,
PLED_USB pLed
)
{
u8 LedCfg;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
return;
}
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch(pLed->LedPin)
{
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on.
break;
default:
break;
}
pLed->bLedOn = _TRUE;
}
/* Turn off LED according to LedPin specified. */
void SwLedOff(struct adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (pHalData->bLedOpenDrain) {
/* Open-drain arrangement for controlling the LED) */
LedCfg &= 0x90; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else {
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
break;
case LED_PIN_LED1:
LedCfg &= 0x0f; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
break;
default:
break;
}
exit:
pLed->bLedOn = false;
}
static u8 _InitPowerOn(PADAPTER padapter)
{
u8 status = _SUCCESS;
u16 value16=0;
u8 value8 = 0;
// RSV_CTRL 0x1C[7:0] = 0x00 // unlock ISO/CLK/Power control register
rtw_write8(padapter, REG_RSV_CTRL, 0x0);
// HW Power on sequence
if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, rtl8723A_card_enable_flow ))
return _FAIL;
// 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051
value8 = rtw_read8(padapter, REG_APS_FSMCO+2);
rtw_write8(padapter,REG_APS_FSMCO+2,(value8|BIT3));
// Enable MAC DMA/WMAC/SCHEDULE/SEC block
// Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31.
value16 = rtw_read16(padapter, REG_CR);
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
| PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC | CALTMR_EN);
rtw_write16(padapter, REG_CR, value16);
//for Efuse PG, suggest by Jackie 2011.11.23
PHY_SetBBReg(padapter, REG_EFUSE_CTRL, BIT28|BIT29|BIT30, 0x06);
return status;
}
void rtw_hal_notch_filter(_adapter * adapter, bool enable)
{
if (enable) {
DBG_871X("Enable notch filter\n");
rtw_write8(adapter, 0xc41, rtw_read8(adapter, 0xc41) | 0x02);
} else {
DBG_871X("Disable notch filter\n");
rtw_write8(adapter, 0xc41, rtw_read8(adapter, 0xc41) & ~0x02);
}
}
static void _restore_network_status(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex*)(&(pmlmeinfo->network));
unsigned short caps;
u8 join_type;
/* */
/* reset related register of Beacon control */
/* set MSR to nolink */
Set_MSR(padapter, _HW_STATE_NOLINK_);
/* reject all data frame */
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
/* reset TSF */
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
/* disable update TSF */
SetBcnCtrlReg(padapter, BIT(4), 0);
/* */
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
if (padapter->registrypriv.wifi_spec) {
/* for WiFi test, follow WMM test plan spec */
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
/* for WiFi test, mixed mode with intel STA under bg mode throughput issue */
if (padapter->mlmepriv.htpriv.ht_option == 0)
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
/* restore Sequence No. */
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
static void dm_CheckPbcGPIO(_adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = _FALSE;
if(!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL_8811A);
tmp1byte |= (BIT4);
rtw_write8(padapter, GPIO_IO_SEL_8811A, tmp1byte); //enable GPIO[2] as output mode
tmp1byte &= ~(BIT4);
rtw_write8(padapter, GPIO_IN_8811A, tmp1byte); //reset the floating voltage level
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL_8811A);
tmp1byte &= ~(BIT4);
rtw_write8(padapter, GPIO_IO_SEL_8811A, tmp1byte); //enable GPIO[2] as input mode
tmp1byte =rtw_read8(padapter, GPIO_IN_8811A);
if (tmp1byte == 0xff)
return ;
if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
{
bPbcPressed = _TRUE;
}
#else
tmp1byte = rtw_read8(padapter, GPIO_IN_8811A);
//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
return ;
if((tmp1byte&BIT4)==0)
{
bPbcPressed = _TRUE;
}
#endif
if( _TRUE == bPbcPressed)
{
// Here we only set bPbcPressed to true
// After trigger PBC, the variable will be set to false
DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
rtw_request_wps_pbc_event(padapter);
}
}
/*
* Description:
* Turn off LED according to LedPin specified.
* */
static void
SwLedOff_8812AE(
_adapter *padapter,
PLED_PCIE pLed
)
{
u16 LedReg = REG_LEDCFG0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct led_priv *ledpriv = &(padapter->ledpriv);
if (RTW_CANNOT_RUN(padapter))
return;
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (ledpriv->LedStrategy == SW_LED_MODE10)
LedReg = REG_LEDCFG0;
else
LedReg = REG_LEDCFG1;
break;
case LED_PIN_LED1:
LedReg = REG_LEDCFG2;
break;
case LED_PIN_GPIO0:
default:
break;
}
/* RTW_INFO("In SwLedOff,LedAddr:%X LEDPIN=%d\n", LedReg, pLed->LedPin); */
if (pHalData->bLedOpenDrain == _TRUE) { /* Open-drain arrangement for controlling the LED */
u8 LedCfg = rtw_read8(padapter, LedReg);
LedCfg &= 0xd0; /* Set to software control. */
rtw_write8(padapter, LedReg, (LedCfg | BIT3));
/* Open-drain arrangement */
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;/* Set GPIO[8] to input mode */
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else
rtw_write8(padapter, LedReg, 0x28);
pLed->bLedOn = _FALSE;
}
static void disable_dm(PADAPTER padapter)
{
#ifndef CONFIG_RTL8723A
u8 v8;
#endif
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
//3 1. disable firmware dynamic mechanism
// disable Power Training, Rate Adaptive
#ifdef CONFIG_RTL8723A
SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION);
#else
v8 = rtw_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
rtw_write8(padapter, REG_BCN_CTRL, v8);
#endif
//3 2. disable driver dynamic mechanism
// disable Dynamic Initial Gain
// disable High Power
// disable Power Tracking
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
// enable APK, LCK and IQK but disable power tracking
pdmpriv->TxPowerTrackControl = _FALSE;
Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE);
}
//
// Description:
// Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain.
//
// Assumption:
// 1. Using SDIO Local register ONLY for configuration.
// 2. PASSIVE LEVEL
//
// Created by Roger, 2011.02.11.
//
void EnableInterrupt8723BSdio(PADAPTER padapter)
{
PHAL_DATA_TYPE pHalData;
u32 himr;
#ifdef CONFIG_CONCURRENT_MODE
if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){
padapter = padapter->pbuddy_adapter;
}
#endif
pHalData = GET_HAL_DATA(padapter);
himr = cpu_to_le32(pHalData->sdio_himr);
sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr);
RT_TRACE(_module_hci_ops_c_, _drv_notice_,
("%s: enable SDIO HIMR=0x%08X\n", __FUNCTION__, pHalData->sdio_himr));
// Update current system IMR settings
himr = rtw_read32(padapter, REG_HSIMR);
rtw_write32(padapter, REG_HSIMR, himr|pHalData->SysIntrMask);
RT_TRACE(_module_hci_ops_c_, _drv_notice_,
("%s: enable HSIMR=0x%08X\n", __FUNCTION__, pHalData->SysIntrMask));
//
// <Roger_Notes> There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM.
// So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore.
// 2011.10.19.
//
rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
//bitmap[0:27] = tx_rate_bitmap
//bitmap[28:31]= Rate Adaptive id
//arg[0:4] = macid
//arg[5] = Short GI
void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
if(pHalData->fw_ractrl == _TRUE)
{
rtl8192d_set_raid_cmd(pAdapter, bitmap, arg);
}
else
{
u8 macid, init_rate, shortGIrate=_FALSE;
init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
macid = arg&0x1f;
shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE;
if (shortGIrate==_TRUE)
init_rate |= BIT(6);
rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate);
}
}
/*
* Description:
* Turn off LED according to LedPin specified.
* */
VOID
SwLedOff_8821AE(
IN PADAPTER Adapter,
IN PLED_PCIE pLed
)
{
u16 LedReg = REG_LEDCFG0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct led_priv *ledpriv = &(Adapter->ledpriv);
if (RTW_CANNOT_RUN(Adapter))
return;
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (ledpriv->LedStrategy == SW_LED_MODE10)
LedReg = REG_LEDCFG0;
else
LedReg = REG_LEDCFG2;
break;
case LED_PIN_LED1:
LedReg = REG_LEDCFG1;
break;
case LED_PIN_GPIO0:
default:
break;
}
/* RTW_INFO("In SwLedOff,LedAddr:%X LEDPIN=%d\n", LedReg, pLed->LedPin); */
if (pHalData->bLedOpenDrain == _TRUE) { /* Open-drain arrangement for controlling the LED */
u8 LedCfg = rtw_read8(Adapter, LedReg);
LedCfg &= 0xd0; /* Set to software control and disable LED2 */
rtw_write8(Adapter, LedReg, (LedCfg | BIT3));
/* Open-drain arrangement */
LedCfg = rtw_read8(Adapter, REG_GPIO_EXT_CTRL + 2);
LedCfg &= 0xFE;
rtw_write8(Adapter, REG_GPIO_EXT_CTRL + 2, LedCfg);
} else
rtw_write8(Adapter, LedReg, 0x28);
pLed->bLedOn = _FALSE;
}
static void dm_CheckPbcGPIO(_adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = _FALSE;
if(!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192EU_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[7] as output mode
tmp1byte &= ~(HAL_8192EU_HW_GPIO_WPS_BIT);
rtw_write8(padapter,GPIO_IN, tmp1byte); //reset the floating voltage level
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192EU_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[7] as input mode
tmp1byte = rtw_read8(padapter, GPIO_IN);
//DBG_871X("CheckPbcGPIO - %x\n", tmp1byte);
if (tmp1byte == 0xff)
{
return ;
}
if (tmp1byte&HAL_8192EU_HW_GPIO_WPS_BIT)
{
// Here we only set bPbcPressed to TRUE
// After trigger PBC, the variable will be set to FALSE
bPbcPressed = _TRUE;
//DBG_871X("CheckPbcGPIO - PBC is pressed\n");
}
#endif
if( _TRUE == bPbcPressed)
{
// Here we only set bPbcPressed to true
// After trigger PBC, the variable will be set to false
DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
rtw_request_wps_pbc_event(padapter);
}
}
static VOID
_InitDriverInfoSize(
IN PADAPTER Adapter,
IN u8 drvInfoSize
)
{
rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize);
}
//
// Description:
// Turn off LED according to LedPin specified.
//
static void
SwLedOff_8188EU(
_adapter *padapter,
PLED_USB pLed
)
{
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if(padapter->bSurpriseRemoved == _TRUE)
{
goto exit;
}
LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E
switch(pLed->LedPin)
{
case LED_PIN_LED0:
if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED)
{
LedCfg &= 0x90; // Set to software control.
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
}
else
{
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
break;
case LED_PIN_LED1:
LedCfg &= 0x0f; // Set to software control.
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
break;
default:
break;
}
exit:
pLed->bLedOn = _FALSE;
}
static void writeOFDMPowerReg88E(
IN PADAPTER Adapter,
IN u8 index,
IN u32* pValue
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
u8 i, rf, pwr_val[4];
u32 writeVal;
u16 RegOffset;
for(rf=0; rf<2; rf++)
{
writeVal = pValue[rf];
for(i=0; i<4; i++)
{
pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
if(rf == 0)
RegOffset = RegOffset_A[index];
else
RegOffset = RegOffset_B[index];
PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
if(((pHalData->rf_type == RF_2T2R) &&
(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
((pHalData->rf_type != RF_2T2R) &&
(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) )
{
writeVal = pwr_val[3];
if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
RegOffset = 0xc90;
if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
RegOffset = 0xc98;
for(i=0; i<3; i++)
{
if(i!=2)
writeVal = (writeVal>8)?(writeVal-8):0;
else
writeVal = (writeVal>6)?(writeVal-6):0;
rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal);
}
}
}
}
/* Initialize GPIO setting registers */
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
void rtw_dm_check_rxfifo_full(_adapter *adapter)
{
struct dvobj_priv *psdpriv = adapter->dvobj;
struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
//check RX fifo counter
rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0);
pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
}
static void _restore_security_setting(_adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv * pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv* psecuritypriv=&(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
? rtw_write8(padapter, REG_SECCFG, 0xcc)
: rtw_write8(padapter, REG_SECCFG, 0xcf);
if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for(EntryId=0; EntryId<4; EntryId++)
{
if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta == NULL) {
//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
}
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
/* Turn on LED according to LedPin specified. */
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch (pLed->LedPin) {
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); /* SW control led1 on. */
break;
default:
break;
}
pLed->bLedOn = true;
}
/* Turn on LED according to LedPin specified. */
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
pLed->bLedOn = true;
}
static void dm_CheckPbcGPIO(struct rtw_adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = false;
if (!padapter->registrypriv.hw_wps_pbc)
return;
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
tmp1byte = rtw_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff)
return;
if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
bPbcPressed = true;
if (bPbcPressed) {
/* Here we only set bPbcPressed to true */
/* After trigger PBC, the variable will be set to false */
DBG_8723A("CheckPbcGPIO - PBC is pressed\n");
if (padapter->pid[0] == 0) {
/* 0 is the default value and it means the application
* monitors the HW PBC doesn't privde its pid to driver.
*/
return;
}
rtw_signal_process(padapter->pid[0], SIGUSR1);
}
}
static VOID
_InitTransferPageSize(
IN PADAPTER Adapter
)
{
// Tx page size is always 128.
u8 value8;
value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
rtw_write8(Adapter, REG_PBP, value8);
}
//
// Description:
// Turn off LED according to LedPin specified.
//
void
SwLedOff(
_adapter *padapter,
PLED_871x pLed
)
{
u8 LedCfg;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
goto exit;
}
switch(pLed->LedPin)
{
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG0, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT5|BIT6); // SW control led1 on.
break;
case LED_PIN_LED2:
LedCfg=rtw_read8(padapter, REG_LEDCFG2);
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT3|BIT5); // SW control led1 on.
break;
default:
break;
}
exit:
pLed->bLedOn = _FALSE;
}
static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u16 regoffset_a[6] = {
rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
u16 regoffset_b[6] = {
rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
u8 i, rf, pwr_val[4];
u32 writeVal;
u16 regoffset;
for (rf = 0; rf < 2; rf++) {
writeVal = pValue[rf];
for (i = 0; i < 4; i++) {
pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | (pwr_val[1]<<8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal);
/* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */
if (((pHalData->rf_type == RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) ||
((pHalData->rf_type != RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) {
writeVal = pwr_val[3];
if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04)
regoffset = 0xc90;
if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs07_Mcs04)
regoffset = 0xc98;
for (i = 0; i < 3; i++) {
if (i != 2)
writeVal = (writeVal > 8) ? (writeVal-8) : 0;
else
writeVal = (writeVal > 6) ? (writeVal-6) : 0;
rtw_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
}
}
}
}
//
// Initialize GPIO setting registers
//
static void
dm_InitGPIOSetting(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}