static inline void
s3c2440_update_subsrcint ()
{
	u32 requests;
	s3c2440_set_subsrcint (UART_INT_TXD << (0 * 3));
	s3c2440_set_subsrcint (UART_INT_TXD << (1 * 3));
	s3c2440_set_subsrcint (UART_INT_TXD << (2 * 3));
	requests = ((io.subsrcpnd & (~io.intsubmsk)) & 0x7fff);
	if (requests & 0x7)
		io.srcpnd |= INT_UART0;
	if (requests & 0x38)
		io.srcpnd |= INT_UART1;
	if (requests & 0x1c0)
		io.srcpnd |= INT_UART2;
	if (requests & 0x600)
		io.srcpnd |= INT_ADC;
}
static void
s3c2440_uart_write (ARMul_State * mstate, u32 offset, u32 data)
{

	SKYEYE_DBG ("s3c2440_uart_write(0x%x, 0x%x)\n", offset, data);
	switch (offset) {
	case ULCON:
		io.uart0.ulcon = data;
		break;
	case UCON:
		io.uart0.ucon = data;
		break;
	case UFCON:
		io.uart0.ufcon = data;
		break;
	case UMCON:
		io.uart0.umcon = data;
		break;
	case UTRSTAT:
		io.uart0.utrstat = data;
		break;
	case UERSTAT:
		io.uart0.uerstat = data;
		break;
	case UFSTAT:
		io.uart0.ufstat = data;
		break;
	case UMSTAT:
		
		io.uart0.umstat = data;
		break;
	case UTXH:
		{
			char c = data;

			/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
			skyeye_uart_write(-1, &c, 1, NULL);

			io.uart0.utrstat |= 0x6;	//set strstat register bit[0]
			if ((io.uart0.ucon & 0xc) == 0x4) {
				s3c2440_set_subsrcint (UART_INT_TXD <<
						       (0 * 3));
				extern ARMul_State *state;	
				s3c2440_update_int (state);
			}
		}
		break;
	case UBRDIV:
		io.uart0.ubrdiv = data;
		break;
	default:
		break;
	}
	SKYEYE_DBG ("%s(0x%x, 0x%x)\n", __func__, offset, data);
}
/* s3c2440 io_do_cycle */
static void
s3c2440_io_do_cycle (ARMul_State * mstate)
{
    extern ARMul_State *state;
    io.tc_prescale--;
    if (io.tc_prescale < 0) {
        io.tc_prescale = TC_DIVISOR;
        if ((io.timer.tcon & 0x100000) != 0) {
            io.timer.tcnt[4]--;
            if (io.timer.tcnt[4] < 0) {
                io.timer.tcnt[4] = io.timer.tcntb[4];
                /*timer 4 hasn't tcmp */
                //io.timer.tcmp[4] = io.timer.tcmpb[4];
                io.timer.tcnto[4] = io.timer.tcntb[4];
                io.srcpnd |= INT_TIMER4;
                s3c2440_update_int (state);
                return;
            }
        }
        if (((io.uart0.utrstat & 0x1) == 0x0)
                && ((io.uart0.ucon & 0x3) == 0x1)) {
            /* 2007-01-18 modified by Anthony Lee : for new uart device frame */
            struct timeval tv;
            unsigned char buf;

            tv.tv_sec = 0;
            tv.tv_usec = 0;

            if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
            {
                io.uart0.urxh = (int) buf;
                /* Receiver Ready
                 * */
                io.uart0.utrstat |= (0x1);
                io.uart0.ufstat |= (0x1);
                /* pending usart0 interrupt
                 * */
                s3c2440_set_subsrcint (UART_INT_RXD <<
                                       (0 * 3));
                //io.srcpnd |= INT_UART0;
                s3c2440_update_int (state);
                return;
            }
        }
        //s3c2440_update_int (state);
    }			/* if (io.tc_prescale < 0) */
}