C++ (Cpp) s5p_dsim1_set_platdata Beispiele

Beispiel #1

Datei: board-universal5410-display.c Projekt: 619619/T805-Basicrom-Kernel

void __init exynos5_universal5410_display_init(void)
{
#ifdef CONFIG_FB_MIPI_DSIM
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&universal5410_dp_data);
#endif

	s5p_fimd1_set_platdata(&universal5410_lcd1_pdata);
#if !defined(CONFIG_MACH_UNIVERSAL5410)
	samsung_bl_set(&universal5410_bl_gpio_info, &universal5410_bl_data);
#endif

#ifdef CONFIG_FB_S5P_EXTDSP
	s3cfb_extdsp_set_platdata(&default_extdsp_data);
#endif

	platform_add_devices(universal5410_display_devices,
			ARRAY_SIZE(universal5410_display_devices));

#ifdef CONFIG_S5P_DP
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
#ifdef CONFIG_LCD_MIPI_AMS480GYXX
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 58 * MHZ);
#elif defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_ER63311)
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 134 * MHZ);
#endif
#endif
}

Beispiel #2

Datei: board-universal5260-display.c Projekt: Biktorgj/Android_b2_Kernel

void __init exynos5_universal5260_display_init(void)
{
	u32 reg;

	exynos5_setup_fb_info(&exynos_fb_info, &lcd_info);
#ifdef CONFIG_FB_MIPI_DSIM
	exynos5_setup_dsi_info(&dsim_lcd_info, &lcd_info);
	exynos5_setup_dsi_panel_info();
	s5p_dsim1_set_platdata(&dsim_platform_data);
	reg = readl(EXYNOS5260_DPTX_PHY_CONTROL);
	reg &= ~EXYNOS5260_DPTX_PHY_ENABLE;
	writel(reg, EXYNOS5260_DPTX_PHY_CONTROL);
#endif

	clk_add_alias("sclk_fimd", "exynos5-fb.1", "sclk_fimd1_128_extclkpl", &s5p_device_fimd1.dev);
	s5p_fimd1_set_platdata(&universal5260_lcd1_pdata);
	platform_add_devices(universal5260_display_devices, ARRAY_SIZE(universal5260_display_devices));

#if defined(CONFIG_LCD_MIPI_D6EA8061)
	exynos_fimd_set_rate(&s5p_device_fimd1.dev, "sclk_fimd", "sclk_disp_pixel", &lcd_info);
#endif
#if !defined(CONFIG_S5P_LCD_INIT)
	exynos5_keep_disp_clock(&s5p_device_fimd1.dev);
#endif
}

Beispiel #3

Datei: board-odroidxu-display.c Projekt: liuxue1990/linux

void __init exynos5_odroidxu_display_init(void)
{
    int     i;

    if(!strncmp(VoutBootArgs, "dp", sizeof("dp")))   {
        printk("\n---------------------------------------------------------\n\n");
        printk("%s : Display Port(DP) Monitor!\n\n", __func__);         
        s5p_dp_set_parameter();
        printk("\n---------------------------------------------------------\n\n");
        odroidxu_lcd1_pdata.vidcon1	= 0,
    	s5p_dp_set_platdata(&odroidxu_dp_data);
    }
    else    {
        printk("\n---------------------------------------------------------\n\n");
        printk("%s : LCD or HDMI or DVI Monitor!\n", __func__);
        printk("\n---------------------------------------------------------\n\n");
    	s5p_dsim1_set_platdata(&dsim_platform_data);
    }
    
    if(SetVirtualFB)    {
        FrameBufferSizeX = simple_strtol(FbBootArgsX, NULL, 10);
        FrameBufferSizeY = simple_strtol(FbBootArgsY, NULL, 10);
        
        if(!FrameBufferSizeX || !FrameBufferSizeY)  {
            FrameBufferSizeX = DEFAULT_FB_X;
            FrameBufferSizeY = DEFAULT_FB_Y;
        }
        printk("\n---------------------------------------------------------\n\n");
        printk("Virtual FB Size from Boot Parameter : X(%d), y(%d)\n", FrameBufferSizeX, FrameBufferSizeY);         
        printk("\n---------------------------------------------------------\n\n");
    }
    else    {
        printk("\n---------------------------------------------------------\n\n");
        printk("FB Size : X(%d), y(%d)\n", FrameBufferSizeX, FrameBufferSizeY);         
        printk("\n---------------------------------------------------------\n\n");
    }
    odroidxu_fb_default.win_mode.xres = FrameBufferSizeX;
    odroidxu_fb_default.win_mode.yres = FrameBufferSizeY;
    odroidxu_fb_default.virtual_x = FrameBufferSizeX;
    odroidxu_fb_default.virtual_y = FrameBufferSizeY * 2;
    
	s5p_fimd1_set_platdata(&odroidxu_lcd1_pdata);

    for(i=0; i<ODROIDXU_FB_MAX; i++)
        memcpy(&odroidxu_fb[i], &odroidxu_fb_default, sizeof(odroidxu_fb_default));

	samsung_bl_set(&odroidxu_bl_gpio_info, &odroidxu_bl_data);
	platform_add_devices(odroidxu_display_devices, ARRAY_SIZE(odroidxu_display_devices));

    if(!strncmp(VoutBootArgs, "dp", sizeof("dp")))  {
    	platform_add_devices(odroidxu_dp_display_devices, ARRAY_SIZE(odroidxu_dp_display_devices));
    	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
    }
    else    {
    	platform_add_devices(odroidxu_mipi_display_devices, ARRAY_SIZE(odroidxu_mipi_display_devices));
    	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev, "sclk_fimd", "mout_cpll", 64 * MHZ);
    }
}

Beispiel #4

Datei: board-chagall-display.c Projekt: AMohseni76/LP_SM_P600_KERNEL

void __init exynos5_universal5420_display_init(void)
{
	struct resource *res;
	struct clk *mout_mdnie1;
	struct clk *mout_mpll;

	/* GPIO CONFIG */
	gpio_request(GPIO_LCD_EN, "LCD_EN");
	gpio_request_one(GPIO_TCON_RDY, GPIOF_IN, "TCON_RDY");

	gpio_request(GPIO_TCON_INTR, "TCON_INTR");
	s3c_gpio_setpull(GPIO_TCON_INTR, S3C_GPIO_PULL_DOWN);
	s5p_register_gpio_interrupt(GPIO_TCON_INTR);
	tcon_irq = gpio_to_irq(GPIO_TCON_INTR);

#if defined(CONFIG_FB_HW_TRIGGER)
	gpio_request(GPIO_PSR_TE, "PSR_TE");
	s3c_gpio_cfgpin(GPIO_PSR_TE, S3C_GPIO_SFN(2));
#endif

	s5p_dsim1_set_platdata(&dsim_platform_data);
	s5p_fimd1_set_platdata(&chagall_lcd1_pdata);
	s5p_mic_set_platdata(&chagall_fb_win0);

	platform_add_devices(chagall_display_devices,
			ARRAY_SIZE(chagall_display_devices));

	mout_mdnie1 = clk_get(NULL, "mout_mdnie1");
	if ((IS_ERR(mout_mdnie1)))
		pr_err("Can't get clock[%s]\n", "mout_mdnie1");

	mout_mpll = clk_get(NULL, "mout_mpll");
	if ((IS_ERR(mout_mpll)))
		pr_err("Can't get clock[%s]\n", "mout_mpll");

	if (mout_mdnie1 && mout_mpll)
		clk_set_parent(mout_mdnie1, mout_mpll);

	if (mout_mdnie1)
		clk_put(mout_mdnie1);
	if (mout_mpll)
		clk_put(mout_mpll);

	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mdnie1", 266 * MHZ);

	keep_lcd_clk(&s5p_device_fimd1.dev, 1);

	res = platform_get_resource(&s5p_device_fimd1, IORESOURCE_MEM, 1);
	if (res) {
		res->start = bootloaderfb_start;
		res->end = res->start + bootloaderfb_size - 1;
		pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end);
	} else {
		pr_err("failed to find bootloader fb resource\n");
	}
}

Beispiel #5

Datei: board-m6x-display.c Projekt: aijiekj/m35x

void __init exynos5_m6x_display_init(void)
{
#if defined(CONFIG_FB_VIDEO_PSR)
	// For TE_VSYNC, GPIO initialization will be processed 
	// in m6x_init_gpio_cfg of gpio-m6x.c after this step
	// This interrupt will be chained to 77 (gpio_RT group)
	int irq;
	irq = s5p_register_gpio_interrupt(MEIZU_LCD_TE);
	if (IS_ERR_VALUE(irq)){
		pr_err("%s: Failed to configure GPJ1(7) \n", __func__);
		return;
	}
#endif

#ifdef CONFIG_FB_MIPI_DSIM
#ifdef CONFIG_S5P_DEV_MIPI_DSIM0
	s5p_dsim0_set_platdata(&dsim_platform_data);
#else
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&smdk5410_dp_data);
#endif

#ifdef CONFIG_S5P_DEV_FIMD0
	s5p_fimd0_set_platdata(&m6x_lcd0_pdata);
#else
	s5p_fimd1_set_platdata(&m6x_lcd1_pdata);
#endif
#if defined(CONFIG_BACKLIGHT_LM3695) || defined(CONFIG_BACKLIGHT_LM3630)
	lm3695_rt_init_res();
	i2c_register_board_info(9, i2c_bl, ARRAY_SIZE(i2c_bl)); 
#endif
#ifdef CONFIG_TPS65132
	i2c_register_board_info(14, i2c_tps, ARRAY_SIZE(i2c_tps)); 
#endif

	platform_add_devices(m6x_display_devices,
			ARRAY_SIZE(m6x_display_devices));

#ifdef CONFIG_S5P_DP
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
#endif

#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_S5P_DEV_FIMD0)
	exynos5_fimd0_setup_clock(&s5p_device_fimd0.dev,
			"sclk_fimd", "mout_mpll_bpll", 140 * MHZ);
#else
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 140 * MHZ);
#endif
#endif
}

Beispiel #6

Datei: board-smdk5410-display.c Projekt: 253627764/GT-I9500

void __init exynos5_smdk5410_display_init(void)
{
#ifdef CONFIG_FB_MIPI_DSIM
#ifdef CONFIG_S5P_DEV_MIPI_DSIM0
	s5p_dsim0_set_platdata(&dsim_platform_data);
#else
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&smdk5410_dp_data);
#endif
#ifdef CONFIG_S5P_DEV_FIMD0
	s5p_fimd0_set_platdata(&smdk5410_lcd0_pdata);
#else
	s5p_fimd1_set_platdata(&smdk5410_lcd1_pdata);
#endif
	samsung_bl_set(&smdk5410_bl_gpio_info, &smdk5410_bl_data);
	platform_add_devices(smdk5410_display_devices,
			ARRAY_SIZE(smdk5410_display_devices));
#ifdef CONFIG_S5P_DP
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_S5P_DEV_FIMD0)
	exynos5_fimd0_setup_clock(&s5p_device_fimd0.dev,
			"sclk_fimd", "mout_mpll_bpll", 800 * MHZ);

#else
	/* 64MHz = 320MHz@CPLL / 6 */
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_cpll", 64 * MHZ);

#endif
#endif
}

Beispiel #7

Datei: board-smdk5420-display.c Projekt: wenhuizhang/arndale_octa_board

void __init exynos5_smdk5420_display_init(void)
{
#ifdef CONFIG_FB_MIPI_DSIM
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&smdk5420_dp_data);
#endif
	s5p_fimd1_set_platdata(&smdk5420_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
	samsung_bl_set(&smdk5420_bl_gpio_info, &smdk5420_bl_data);
#endif
	platform_add_devices(smdk5420_display_devices,
			ARRAY_SIZE(smdk5420_display_devices));
#ifdef CONFIG_S5P_DP
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_rpll", 266 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
	/* RPLL rate is 300Mhz, 300/5=60Hz */
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_fimd1", 67 * MHZ);
#endif
}

Beispiel #8

Datei: board-xyref5260-display.c Projekt: Biktorgj/Android_b2_Kernel

void __init exynos5_xyref5260_display_init(void)
{
#ifdef CONFIG_S5P_DP
	int irq;
#endif
	clk_add_alias("sclk_fimd", "exynos5-fb.1", "sclk_fimd1_128_extclkpl",
			&s5p_device_fimd1.dev);
#ifdef CONFIG_FB_MIPI_DSIM
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&xyref5260_dp_data);
#endif
	s5p_fimd1_set_platdata(&smdk5260_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
	samsung_bl_set(&smdk5260_bl_gpio_info, &smdk5260_bl_data);
#endif
	platform_add_devices(smdk5260_display_devices,
			ARRAY_SIZE(smdk5260_display_devices));

#ifdef CONFIG_S5P_DP
	irq = s5p_register_gpio_interrupt(EXYNOS5260_GPK0(0));
	if (IS_ERR_VALUE(irq)) {
		pr_err("%s: Failed to configure GPK0(0) GPIO\n", __func__);
		return;
	}

	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "sclk_disp_pixel", 267 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
	/* RPLL rate is 300Mhz, 300/5=60Hz */
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "sclk_disp_pixel", 266 * MHZ);
#endif
}

Beispiel #9

Datei: board-universal5410-display.c Projekt: Juanhulk/Adam-Kernel-GS4

void __init exynos5_universal5410_display_init(void)
{
	struct resource *res;

#if defined(CONFIG_LCD_MIPI_S6E8FA0)
	unsigned int lcd_id = lcdtype & 0xF;

	if (!gpio_get_value(GPIO_OLED_ID)) {
		dsim_info.dsim_ddi_pd = &ea8062_mipi_lcd_driver;
		pr_err("panel M\n");
	} else {
		if (lcd_id == 1 || lcd_id == 2) {
			dsim_info.dsim_ddi_pd = &s6e8fa0_mipi_lcd_driver;
			pr_err("panel A,B,C\n");
		} else if (lcd_id == 3 || lcd_id == 4) {
			dsim_info.dsim_ddi_pd = &s6e8fa0_6P_mipi_lcd_driver;
			pr_err("panel D,E,F\n");
		} else if (lcd_id == 5 || lcd_id == 6) {
			dsim_info.dsim_ddi_pd = &s6e8fa0_G_mipi_lcd_driver;
			pr_err("panel G\n");
		} else if (lcd_id == 7) {
			dsim_info.dsim_ddi_pd = &s6e8fa0_I_mipi_lcd_driver;
			pr_err("panel I\n");
		} else {
			dsim_info.dsim_ddi_pd = &s6e8fa0_I_mipi_lcd_driver;
			pr_err("panel select fail\n");
		}
	}
#elif defined(CONFIG_LCD_MIPI_S6E3FA0)
	dsim_info.dsim_ddi_pd = &s6e3fa0_mipi_lcd_driver;
#endif

#ifdef CONFIG_FB_MIPI_DSIM
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
	s5p_fimd1_set_platdata(&universal5410_lcd1_pdata);

#ifdef CONFIG_FB_S5P_EXTDSP
	s3cfb_extdsp_set_platdata(&default_extdsp_data);
#endif

	platform_add_devices(universal5410_display_devices,
		ARRAY_SIZE(universal5410_display_devices));

#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
		"sclk_fimd", "mout_mpll_bpll", 134 * MHZ);
#endif
#endif
#ifdef CONFIG_FB_S5P_MDNIE
	keep_lcd_clk(&s5p_device_fimd1.dev);
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
		"sclk_mdnie", "mout_mpll_bpll", 134 * MHZ);
	mdnie_device_register();
#endif
#if defined(CONFIG_FB_LCD_FREQ_SWITCH)
	lcdfreq_device_register();
#endif

	res = platform_get_resource(&s5p_device_fimd1, IORESOURCE_MEM, 1);
	if (res) {
		res->start = bootloaderfb_start;
		res->end = res->start + bootloaderfb_size - 1;
		pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end);
	} else {
		pr_err("failed to find bootloader fb resource\n");
	}
}

Beispiel #10

Datei: board-universal5420-display.c Projekt: Exynos-CyanogenMod/android_kernel_samsung_ha3g

void __init exynos5_universal5420_display_init(void)
{
	struct resource *res;
	struct clk *mout_mdnie1;
	struct clk *mout_mpll;

#ifdef CONFIG_FB_MIPI_DSIM
	s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
	s5p_dp_set_platdata(&universal5420_dp_data);
#endif
	s5p_fimd1_set_platdata(&universal5420_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
	samsung_bl_set(&universal5420_bl_gpio_info, &smdk5420_bl_data);
#endif
	platform_add_devices(universal5420_display_devices,
			ARRAY_SIZE(universal5420_display_devices));
#ifdef CONFIG_S5P_DP
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
#endif
	mout_mdnie1 = clk_get(NULL, "mout_mdnie1");
	if ((IS_ERR(mout_mdnie1)))
		pr_err("Can't get clock[%s]\n", "mout_mdnie1");

	mout_mpll = clk_get(NULL, "mout_mpll");
	if ((IS_ERR(mout_mpll)))
		pr_err("Can't get clock[%s]\n", "mout_mpll");

	if (mout_mdnie1 && mout_mpll)
		clk_set_parent(mout_mdnie1, mout_mpll);

	if (mout_mdnie1)
		clk_put(mout_mdnie1);
	if (mout_mpll)
		clk_put(mout_mpll);

#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
#if defined(CONFIG_FB_I80IF) && !defined(CONFIG_FB_S5P_MDNIE)
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mdnie1", 266 * MHZ);
#else
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_mdnie1", 133 * MHZ);
#endif
#else
	/* RPLL rate is 300Mhz, 300/5=60Hz */
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
			"sclk_fimd", "mout_rpll", 67 * MHZ);
#endif
#endif
#ifdef CONFIG_FB_S5P_MDNIE
	keep_lcd_clk(&s5p_device_fimd1.dev);
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
#ifdef CONFIG_FB_I80IF
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
		"sclk_mdnie", "mout_mdnie1", 266 * MHZ);
#else
	exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
		"sclk_mdnie", "mout_mdnie1", 133 * MHZ);
#endif
#endif
	mdnie_device_register();
#endif

	res = platform_get_resource(&s5p_device_fimd1, IORESOURCE_MEM, 1);
	if (res) {
		res->start = bootloaderfb_start;
		res->end = res->start + bootloaderfb_size - 1;
		pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end);
	} else {
		pr_err("failed to find bootloader fb resource\n");
	}
}