/* Multiplexed I/O. */ static __inline void scc_setmreg(struct scc_bas *bas, int ch, int reg, int val) { scc_setreg(bas, ch + REG_CTRL, reg); scc_barrier(bas); scc_setreg(bas, ch + REG_CTRL, val); }
/* Multiplexed I/O. */ static __inline uint8_t scc_getmreg(struct scc_bas *bas, int ch, int reg) { scc_setreg(bas, ch + REG_CTRL, reg); scc_barrier(bas); return (scc_getreg(bas, ch + REG_CTRL)); }
static int z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch) { struct scc_bas *bas; int c; bas = &sc->sc_bas; c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B; mtx_lock_spin(&sc->sc_hwmtx); if (ch->ch_ipend & SER_INT_TXIDLE) { scc_setreg(bas, c + REG_CTRL, CR_RSTTXI); scc_barrier(bas); } if (ch->ch_ipend & SER_INT_RXREADY) { scc_getreg(bas, c + REG_DATA); scc_barrier(bas); } if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK)) scc_setreg(bas, c + REG_CTRL, CR_RSTERR); mtx_unlock_spin(&sc->sc_hwmtx); return (0); }
static int sab82532_bfe_ipend(struct scc_softc *sc) { struct scc_bas *bas; struct scc_chan *ch; int ipend; int c, ofs; uint8_t isr0, isr1; bas = &sc->sc_bas; ipend = 0; for (c = 0; c < SAB_NCHAN; c++) { ch = &sc->sc_chan[c]; ofs = c * SAB_CHANLEN; mtx_lock_spin(&sc->sc_hwmtx); isr0 = scc_getreg(bas, ofs + SAB_ISR0); isr1 = scc_getreg(bas, ofs + SAB_ISR1); scc_barrier(bas); if (isr0 & SAB_ISR0_TIME) { while (scc_getreg(bas, ofs + SAB_STAR) & SAB_STAR_CEC) ; scc_setreg(bas, ofs + SAB_CMDR, SAB_CMDR_RFRD); scc_barrier(bas); } mtx_unlock_spin(&sc->sc_hwmtx); ch->ch_ipend = 0; if (isr1 & SAB_ISR1_BRKT) ch->ch_ipend |= SER_INT_BREAK; if (isr0 & SAB_ISR0_RFO) ch->ch_ipend |= SER_INT_OVERRUN; if (isr0 & (SAB_ISR0_TCD|SAB_ISR0_RPF)) ch->ch_ipend |= SER_INT_RXREADY; if ((isr0 & SAB_ISR0_CDSC) || (isr1 & SAB_ISR1_CSC)) ch->ch_ipend |= SER_INT_SIGCHG; if (isr1 & SAB_ISR1_ALLS) ch->ch_ipend |= SER_INT_TXIDLE; ipend |= ch->ch_ipend; } return (ipend); }
static int z8530_bfe_ipend(struct scc_softc *sc) { struct scc_bas *bas; struct scc_chan *ch[2]; uint32_t sig; uint8_t bes, ip, src; bas = &sc->sc_bas; ch[0] = &sc->sc_chan[0]; ch[1] = &sc->sc_chan[1]; ch[0]->ch_ipend = 0; ch[1]->ch_ipend = 0; mtx_lock_spin(&sc->sc_hwmtx); ip = scc_getmreg(bas, CHAN_A, RR_IP); if (ip & IP_RIA) ch[0]->ch_ipend |= SER_INT_RXREADY; if (ip & IP_RIB) ch[1]->ch_ipend |= SER_INT_RXREADY; if (ip & IP_TIA) ch[0]->ch_ipend |= SER_INT_TXIDLE; if (ip & IP_TIB) ch[1]->ch_ipend |= SER_INT_TXIDLE; if (ip & IP_SIA) { scc_setreg(bas, CHAN_A + REG_CTRL, CR_RSTXSI); scc_barrier(bas); bes = scc_getreg(bas, CHAN_A + REG_CTRL); if (bes & BES_BRK) ch[0]->ch_ipend |= SER_INT_BREAK; sig = ch[0]->ch_hwsig; SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); if (sig & SER_MASK_DELTA) { ch[0]->ch_hwsig = sig; ch[0]->ch_ipend |= SER_INT_SIGCHG; } src = scc_getmreg(bas, CHAN_A, RR_SRC); if (src & SRC_OVR) ch[0]->ch_ipend |= SER_INT_OVERRUN; } if (ip & IP_SIB) { scc_setreg(bas, CHAN_B + REG_CTRL, CR_RSTXSI); scc_barrier(bas); bes = scc_getreg(bas, CHAN_B + REG_CTRL); if (bes & BES_BRK) ch[1]->ch_ipend |= SER_INT_BREAK; sig = ch[1]->ch_hwsig; SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); if (sig & SER_MASK_DELTA) { ch[1]->ch_hwsig = sig; ch[1]->ch_ipend |= SER_INT_SIGCHG; } src = scc_getmreg(bas, CHAN_B, RR_SRC); if (src & SRC_OVR) ch[1]->ch_ipend |= SER_INT_OVERRUN; } mtx_unlock_spin(&sc->sc_hwmtx); return (ch[0]->ch_ipend | ch[1]->ch_ipend); }