void
pxauart_power(int why, void *arg)
{
struct com_softc *sc = arg;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp = sc->sc_tty;
switch (why) {
case PWR_SUSPEND:
case PWR_STANDBY:
if (sc->enabled && ISSET(sc->sc_hwflags, COM_HW_SIR))
scoop_set_irled(0);
break;
case PWR_RESUME:
if (sc->enabled) {
sc->sc_initialize = 1;
comparam(tp, &tp->t_termios);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
if (ISSET(sc->sc_hwflags, COM_HW_SIR)) {
scoop_set_irled(1);
bus_space_write_1(iot, ioh, com_isr,
ISR_RECV);
}
}
break;
}
}
void
compwroff(struct com_softc *sc)
{
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp = sc->sc_tty;
CLR(sc->sc_lcr, LCR_SBREAK);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_ier, 0);
if (ISSET(tp->t_cflag, HUPCL) &&
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
/* XXX perhaps only clear DTR */
sc->sc_mcr = 0;
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
/*
* Turn FIFO off; enter sleep mode if possible.
*/
bus_space_write_1(iot, ioh, com_fifo, 0);
delay(100);
if (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
(void) bus_space_read_1(iot, ioh, com_data);
delay(100);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_RCV_RST | FIFO_XMT_RST);
if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
switch (sc->sc_uarttype) {
case COM_UART_ST16650:
case COM_UART_ST16650V2:
bus_space_write_1(iot, ioh, com_lcr, LCR_EFR);
bus_space_write_1(iot, ioh, com_efr, EFR_ECB);
bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
bus_space_write_1(iot, ioh, com_lcr, 0);
break;
case COM_UART_TI16750:
bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
break;
#ifdef COM_PXA2X0
case COM_UART_PXA2X0:
bus_space_write_1(iot, ioh, com_ier, 0);
#ifdef __zaurus__
if (ISSET(sc->sc_hwflags, COM_HW_SIR))
scoop_set_irled(0);
#endif
break;
#endif
}
}
}
int
com_activate(struct device *self, int act)
{
struct com_softc *sc = (struct com_softc *)self;
int s, rv = 0;
switch (act) {
case DVACT_SUSPEND:
if (timeout_del(&sc->sc_dtr_tmo)) {
/* Make sure DTR gets raised upon resume. */
SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
}
timeout_del(&sc->sc_diag_tmo);
break;
case DVACT_RESUME:
com_resume(sc);
break;
case DVACT_DEACTIVATE:
#ifdef KGDB
if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
#else
if (sc->sc_hwflags & COM_HW_CONSOLE) {
#endif /* KGDB */
rv = EBUSY;
break;
}
s = spltty();
if (sc->disable != NULL && sc->enabled != 0) {
(*sc->disable)(sc);
sc->enabled = 0;
}
splx(s);
break;
}
return (rv);
}
int
comopen(dev_t dev, int flag, int mode, struct proc *p)
{
int unit = DEVUNIT(dev);
struct com_softc *sc;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct tty *tp;
int s;
int error = 0;
if (unit >= com_cd.cd_ndevs)
return ENXIO;
sc = com_cd.cd_devs[unit];
if (!sc)
return ENXIO;
#ifdef KGDB
/*
* If this is the kgdb port, no other use is permitted.
*/
if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
return (EBUSY);
#endif /* KGDB */
s = spltty();
if (!sc->sc_tty) {
tp = sc->sc_tty = ttymalloc(1000000);
} else
tp = sc->sc_tty;
splx(s);
tp->t_oproc = comstart;
tp->t_param = comparam;
tp->t_dev = dev;
if (!ISSET(tp->t_state, TS_ISOPEN)) {
SET(tp->t_state, TS_WOPEN);
ttychars(tp);
tp->t_iflag = TTYDEF_IFLAG;
tp->t_oflag = TTYDEF_OFLAG;
#ifdef COM_CONSOLE
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
tp->t_cflag = comconscflag;
tp->t_ispeed = tp->t_ospeed = comconsrate;
} else
#endif
{
tp->t_cflag = TTYDEF_CFLAG;
tp->t_ispeed = tp->t_ospeed = comdefaultrate;
}
if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
SET(tp->t_cflag, CLOCAL);
if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
SET(tp->t_cflag, CRTSCTS);
if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
SET(tp->t_cflag, MDMBUF);
tp->t_lflag = TTYDEF_LFLAG;
s = spltty();
sc->sc_initialize = 1;
comparam(tp, &tp->t_termios);
ttsetwater(tp);
sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
/*
* Wake up the sleepy heads.
*/
if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
switch (sc->sc_uarttype) {
case COM_UART_ST16650:
case COM_UART_ST16650V2:
bus_space_write_1(iot, ioh, com_lcr, LCR_EFR);
bus_space_write_1(iot, ioh, com_efr, EFR_ECB);
bus_space_write_1(iot, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_efr, 0);
bus_space_write_1(iot, ioh, com_lcr, 0);
break;
case COM_UART_TI16750:
bus_space_write_1(iot, ioh, com_ier, 0);
break;
case COM_UART_PXA2X0:
bus_space_write_1(iot, ioh, com_ier, IER_EUART);
break;
}
}
if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
u_int8_t fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST;
u_int8_t lcr;
if (tp->t_ispeed <= 1200)
fifo |= FIFO_TRIGGER_1;
else if (tp->t_ispeed <= 38400)
fifo |= FIFO_TRIGGER_4;
else
fifo |= FIFO_TRIGGER_8;
if (sc->sc_uarttype == COM_UART_TI16750) {
fifo |= FIFO_ENABLE_64BYTE;
lcr = bus_space_read_1(iot, ioh, com_lcr);
bus_space_write_1(iot, ioh, com_lcr,
lcr | LCR_DLAB);
}
/*
* (Re)enable and drain FIFOs.
*
* Certain SMC chips cause problems if the FIFOs are
* enabled while input is ready. Turn off the FIFO
* if necessary to clear the input. Test the input
* ready bit after enabling the FIFOs to handle races
* between enabling and fresh input.
*
* Set the FIFO threshold based on the receive speed.
*/
for (;;) {
bus_space_write_1(iot, ioh, com_fifo, 0);
delay(100);
(void) bus_space_read_1(iot, ioh, com_data);
bus_space_write_1(iot, ioh, com_fifo, fifo |
FIFO_RCV_RST | FIFO_XMT_RST);
delay(100);
if(!ISSET(bus_space_read_1(iot, ioh,
com_lsr), LSR_RXRDY))
break;
}
if (sc->sc_uarttype == COM_UART_TI16750)
bus_space_write_1(iot, ioh, com_lcr, lcr);
}
/* Flush any pending I/O. */
while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
(void) bus_space_read_1(iot, ioh, com_data);
/* You turn me on, baby! */
sc->sc_mcr = MCR_DTR | MCR_RTS;
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
SET(sc->sc_mcr, MCR_IENABLE);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
#ifdef COM_PXA2X0
if (sc->sc_uarttype == COM_UART_PXA2X0)
sc->sc_ier |= IER_EUART | IER_ERXTOUT;
#endif
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) ||
ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
SET(tp->t_state, TS_CARR_ON);
else
CLR(tp->t_state, TS_CARR_ON);
#ifdef COM_PXA2X0
if (sc->sc_uarttype == COM_UART_PXA2X0 &&
ISSET(sc->sc_hwflags, COM_HW_SIR)) {
bus_space_write_1(iot, ioh, com_isr, ISR_RECV);
#ifdef __zaurus__
scoop_set_irled(1);
#endif
}
#endif
} else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p, 0) != 0)
return EBUSY;
else
s = spltty();
if (DEVCUA(dev)) {
if (ISSET(tp->t_state, TS_ISOPEN)) {
/* Ah, but someone already is dialed in... */
splx(s);
return EBUSY;
}
sc->sc_cua = 1; /* We go into CUA mode. */
} else {
/* tty (not cua) device; wait for carrier if necessary. */
if (ISSET(flag, O_NONBLOCK)) {
if (sc->sc_cua) {
/* Opening TTY non-blocking... but the CUA is busy. */
splx(s);
return EBUSY;
}
} else {
while (sc->sc_cua ||
(!ISSET(tp->t_cflag, CLOCAL) &&
!ISSET(tp->t_state, TS_CARR_ON))) {
SET(tp->t_state, TS_WOPEN);
error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, ttopen, 0);
/*
* If TS_WOPEN has been reset, that means the cua device
* has been closed. We don't want to fail in that case,
* so just go around again.
*/
if (error && ISSET(tp->t_state, TS_WOPEN)) {
CLR(tp->t_state, TS_WOPEN);
if (!sc->sc_cua && !ISSET(tp->t_state, TS_ISOPEN))
compwroff(sc);
splx(s);
return error;
}
}
}
}
splx(s);
return (*linesw[tp->t_line].l_open)(dev, tp, p);
}