static uint32 et6000SetGraphicsMode(VIDEO_MODE_INFORMATION *mi,
uint16 pciConfigSpace)
{
uint8 m;
for(m = 0; m < CLOCK0MN; m++) {
if ((clock0MN[m].width == mi->VisScreenWidth) &&
(clock0MN[m].height == mi->VisScreenHeight) &&
(clock0MN[m].bpp == mi->BitsPerPlane) &&
((clock0MN[m].refreshRate-1 <= mi->Frequency) &&
(clock0MN[m].refreshRate+1 >= mi->Frequency)))
{
break;
}
}
if (m == CLOCK0MN)
return B_BAD_VALUE; /* Found no entry for requested mode */
et6000EnableLinearMemoryMapping(pciConfigSpace);
setMiscOutputRegister(mi);
ioSet8(0x3d8, 0x00, 0xa0); /* Set the KEY for color modes */
setPCIConfigSpaceRegisters41to5E(pciConfigSpace, mi, m);
ioSet8(0x3c6, 0x00, 0xff); /* Set pixel mask */
setATC(mi->BitsPerPlane);
setTS();
setGDC();
setCRTC(m);
setPLL(pciConfigSpace, m);
return B_OK;
}
void setFrequency(unsigned long f)
{
long int reg, N, F;
N = f/2600;
F = f-2600*N;
reg = (N<<14)+(F<<2);
setPLL(reg);
}
void setFrequency(unsigned long f)
{
long int reg, N, A, B;
N = f/25; // counter N in pll
B = N/8; // split in A and B
A = N%8;
reg = ((B & 0x1fff)<<8) + ((A & 0x3f)<<2) + 1;
setPLL(reg); // set pll
}
void setFreq(long int f)
{
long int reg, frast, A, B;
frast = f/F_RASTER;
B = frast/16;
A = frast%16;
reg = ((B & 0x1fff)<<8) + ((A & 0x3f)<<2) + 1;
setPLL(reg);
}
void initPLL(long int f)
{
long int reg;
cbi(PORTC, DATA);
cbi(PORTC, CLK);
cbi(PORTC, LE);
// set function latch
reg = 0x438086;
setPLL(reg);
// init R-counter
reg = (2UL<<16) + ((fref/F_RASTER)<<2);
setPLL(reg);
setFreq(f);
reg = 0x438082;
setPLL(reg);
}
void initPLL()
{
long int reg;
cbi(PORTC, DATA);
cbi(PORTC, CLK);
cbi(PORTC, LE);
// set function latch
reg = 0x438086;
setPLL(reg);
// init R-counter
reg = (2UL<<16) + ((F_REF/25)<<2);
setPLL(reg);
unsigned long f = 1170000;
setFrequency(f);
reg = 0x438082;
setPLL(reg);
}
void initPLL()
{
unsigned long reg, cntr, R, N, M, F, P1, MUX;
cbi(PORTC, DATA);
cbi(PORTC, CLK);
cbi(PORTC, LE);
// zero noise&spur registers
reg = 0x000+3;
setPLL(reg);
// set lowest noise
reg = 0x3c4+3;
setPLL(reg);
// reset control reg
cntr = 0x001046; //(0x10)+(1<<6)+(1<<2)+2;
setPLL(cntr);
// load MUX, R,M
P1 = 0;
R = 5; // Fpfd = 2.6MHz
M = 2600;
MUX = 1; // lock detect
reg = (MUX<<20)+(P1<<18)+(R<<14)+(M<<2)+1; //0x4168a1
setPLL(reg);
// load N,F for F=1170MHz
N = 450;
F = 0;
reg = (N<<14)+(F<<2); //0x708000
setPLL(reg);
// enable counter
cntr = 0x001042;
setPLL(cntr);
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
*/
void SystemInit (void) {
#if (CLOCK_SETUP)
volatile uint32_t i;
#endif
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<16);
LPC_SYSCON->SYSPLLCTRL = SYSPLLCTRL_Val;
#warning "should not return here, need to fix an issue with PLL lock"
return;
#if (CLOCK_SETUP) /* Clock Setup */
#if ((SYSPLLCLKSEL_Val & 0x03) == 1)
LPC_SYSCON->SYSOSCCTRL = SYSOSCCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 5); /* Power-up sysosc */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
#if ((SYSPLLCLKSEL_Val & 0x03) == 3)
LPC_SYSCON->RTCOSCCTRL = (1 << 0); /* Enable 32 kHz output */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
LPC_SYSCON->SYSPLLCLKSEL = SYSPLLCLKSEL_Val; /* Select PLL Input */
//LPC_SYSCON->SYSPLLCLKUEN = 0x01; /* Update Clock Source */
LPC_SYSCON->SYSPLLCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->SYSPLLCLKUEN = 0x01;
while (!(LPC_SYSCON->SYSPLLCLKUEN & 0x01)); /* Wait Until Updated */
#if (CLOCK_SETUP_REG == 1) /* Clock Setup via Register */
#if (((MAINCLKSEL_Val & 0x03) == 2) )
LPC_SYSCON->WDTOSCCTRL = WDTOSCCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 6); /* Power-up WDT Clock */
for (i = 0; i < 2000; i++) __NOP(); /* Wait for osc to stabilize */
#endif
#if ((MAINCLKSEL_Val & 0x03) == 3) /* Main Clock is PLL Out */
LPC_SYSCON->PDRUNCFG |= (1 << 7); /* Power-down SYSPLL */
LPC_SYSCON->SYSPLLCTRL = SYSPLLCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 7); /* Power-up SYSPLL */
while (!(LPC_SYSCON->SYSPLLSTAT & 0x01)); /* Wait Until PLL Locked */
#endif
LPC_SYSCON->MAINCLKSEL = MAINCLKSEL_Val; /* Select Clock Source */
LPC_SYSCON->MAINCLKUEN = 0x01; /* Update MCLK Clock Source */
LPC_SYSCON->MAINCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->MAINCLKUEN = 0x01;
while (!(LPC_SYSCON->MAINCLKUEN & 0x01)); /* Wait Until Updated */
LPC_SYSCON->SYSAHBCLKDIV = SYSAHBCLKDIV_Val;
#endif /* Clock Setup via Register */
#if (CLOCK_SETUP_API == 1) /* Clock Setup via PLL API */
// LPC_SYSCON->SYSPLLCLKSEL = 0x00; /* Use IRC */
// LPC_SYSCON->SYSPLLCLKUEN = 0x01; /* Update Clock Source */
// LPC_SYSCON->SYSPLLCLKUEN = 0x00; /* Toggle Update Register */
// LPC_SYSCON->SYSPLLCLKUEN = 0x01;
// while (!(LPC_SYSCON->SYSPLLCLKUEN & 0x01)); /* Wait Until Updated */
LPC_SYSCON->MAINCLKSEL = SYSPLLCLKSEL_Val; /* Select same as SYSPLL */
LPC_SYSCON->MAINCLKUEN = 0x01; /* Update MCLK Clock Source */
LPC_SYSCON->MAINCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->MAINCLKUEN = 0x01;
while (!(LPC_SYSCON->MAINCLKUEN & 0x01)); /* Wait Until Updated */
LPC_SYSCON->SYSAHBCLKDIV = 1;
setPLL(PLL_API_MODE_Val, __SYS_PLLCLKIN / 1000, PLL_API_FREQ_Val / 1000);
#endif /* Clock Setup via PLL API */
#if (USB_CLOCK_SETUP == 1) /* USB clock is used */
LPC_SYSCON->PDRUNCFG &= ~(1 << 10); /* Power-up USB PHY */
#if ((USBCLKSEL_Val & 0x003) == 0) /* USB clock is USB PLL out */
LPC_SYSCON->PDRUNCFG &= ~(1 << 8); /* Power-up USB PLL */
LPC_SYSCON->USBPLLCLKSEL = USBPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->USBPLLCLKUEN = 0x01; /* Update Clock Source */
LPC_SYSCON->USBPLLCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->USBPLLCLKUEN = 0x01;
while (!(LPC_SYSCON->USBPLLCLKUEN & 0x01)); /* Wait Until Updated */
LPC_SYSCON->USBPLLCTRL = USBPLLCTRL_Val;
while (!(LPC_SYSCON->USBPLLSTAT & 0x01)); /* Wait Until PLL Locked */
LPC_SYSCON->USBCLKSEL = 0x00; /* Select USB PLL */
#endif
LPC_SYSCON->USBCLKSEL = USBCLKSEL_Val; /* Select USB Clock */
LPC_SYSCON->USBCLKDIV = USBCLKDIV_Val; /* Set USB clock divider */
#else /* USB clock is not used */
LPC_SYSCON->PDRUNCFG |= (1 << 10); /* Power-down USB PHY */
LPC_SYSCON->PDRUNCFG |= (1 << 8); /* Power-down USB PLL */
#endif
#endif /* Clock Setup */
/* System clock to the IOCON needs to be enabled or
most of the I/O related peripherals won't work. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<16);
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
*/
void SystemInit (void) {
#if (CLOCK_SETUP)
volatile uint32_t i;
#endif
#if (CLOCK_SETUP) /* Clock Setup */
#if ((SYSPLLCLKSEL_Val & 0x03) == 1)
LPC_SYSCON->SYSOSCCTRL = SYSOSCCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 21); /* Power-up sysosc */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
LPC_SYSCON->SYSPLLCLKSEL = SYSPLLCLKSEL_Val; /* Select PLL Input */
#if (CLOCK_SETUP_REG == 1) /* Clock Setup via Register */
#if (((MAINCLKSELA_Val & 0x03) == 1) )
LPC_SYSCON->SYSOSCCTRL = SYSOSCCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 21); /* Power-up sysosc */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
#if (((MAINCLKSELA_Val & 0x03) == 2) )
LPC_SYSCON->PDRUNCFG &= ~(1 << 20); /* Power-up WDT Clock */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
#if ((MAINCLKSELB_Val & 0x03) == 3)
LPC_SYSCON->RTCOSCCTRL = (1 << 0); /* Enable 32 kHz output */
for (i = 0; i < 200; i++) __NOP(); /* Wait for osc to stabilize */
#endif
LPC_SYSCON->MAINCLKSELA = MAINCLKSELA_Val; /* select MAINCLKA clock */
#if ((MAINCLKSELB_Val & 0x03) == 2) /* Main Clock is PLL Out */
LPC_SYSCON->SYSPLLCTRL = SYSPLLCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 22); /* Power-up SYSPLL */
while (!(LPC_SYSCON->SYSPLLSTAT & 0x01)); /* Wait Until PLL Locked */
#endif
LPC_SYSCON->MAINCLKSELB = MAINCLKSELB_Val; /* select Main clock */
LPC_SYSCON->SYSAHBCLKDIV = SYSAHBCLKDIV_Val;
#endif /* Clock Setup via Register */
#if (CLOCK_SETUP_API == 1) /* Clock Setup via PLL API */
// LPC_SYSCON->SYSPLLCLKSEL = 0x00; /* Use IRC */
LPC_SYSCON->MAINCLKSELB = (1 << 2); /* Select System PLL output */
LPC_SYSCON->SYSAHBCLKDIV = 1;
setPLL(PLL_API_MODE_Val, __SYS_PLLCLKIN / 1000, PLL_API_FREQ_Val / 1000);
#endif /* Clock Setup via PLL API */
#if (USB_CLOCK_SETUP == 1) /* USB clock is used */
LPC_SYSCON->PDRUNCFG &= ~(1 << 9); /* Power-up USB PHY */
#if ((USBCLKSEL_Val & 0x003) == 2) /* USB clock is USB PLL out */
LPC_SYSCON->PDRUNCFG &= ~(1 << 23); /* Power-up USB PLL */
LPC_SYSCON->USBPLLCLKSEL = USBPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->USBPLLCTRL = USBPLLCTRL_Val;
while (!(LPC_SYSCON->USBPLLSTAT & 0x01)); /* Wait Until PLL Locked */
LPC_SYSCON->USBCLKSEL = 0x02; /* Select USB PLL */
#endif
LPC_SYSCON->USBCLKSEL = USBCLKSEL_Val; /* Select USB Clock */
LPC_SYSCON->USBCLKDIV = USBCLKDIV_Val; /* Set USB clock divider */
#else /* USB clock is not used */
LPC_SYSCON->PDRUNCFG |= (1 << 9); /* Power-down USB PHY */
LPC_SYSCON->PDRUNCFG |= (1 << 23); /* Power-down USB PLL */
#endif
#if (SCT_CLOCK_SETUP == 1) /* SCT clock is used */
LPC_SYSCON->PDRUNCFG &= ~(1 << 24); /* Power-up SCT PLL */
LPC_SYSCON->SCTPLLCLKSEL = SCTPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->USBPLLCTRL = SCTPLLCTRL_Val;
while (!(LPC_SYSCON->SCTPLLSTAT & 0x01)); /* Wait Until PLL Locked */
#else /* SCT clock is not used */
LPC_SYSCON->PDRUNCFG |= (1 << 24); /* Power-down SCT PLL */
#endif
#endif /* Clock Setup */
}