t_stat xtbus_svc(UNIT *uptr)
{
switch (mbirq) {
case INT_1:
set_cpuint(INT_R);
sim_printf("xtbus_svc: mbirq=%04X int_req=%04X\n", mbirq, int_req);
break;
default:
//sim_printf("xtbus_svc: default mbirq=%04X\n", mbirq);
break;
}
sim_activate (&xtbus_unit, xtbus_unit.wait); /* continue poll */
return SCPE_OK;
}
t_stat multibus_svc(UNIT *uptr)
{
switch (mbirq) {
case INT_1:
set_cpuint(INT_R);
clr_irq(SBC208_INT); /***** bad, bad, bad! */
// sim_printf("multibus_svc: mbirq=%04X int_req=%04X\n", mbirq, int_req);
break;
default:
// sim_printf("multibus_svc: default mbirq=%04X\n", mbirq);
break;
}
sim_activate (&multibus_unit, multibus_unit.wait); /* continue poll */
return SCPE_OK;
}