void init_clock()
{
	HW_CLKCTRL_FRAC_SET(BM_CLKCTRL_FRAC_CLKGATEEMI);
#ifdef EMI_96M
	set_emi_frac(30);
#else //EMI_133M
	set_emi_frac(33);
#endif
	HW_CLKCTRL_FRAC_CLR(BM_CLKCTRL_FRAC_CLKGATEEMI);
	delay(11000);

#ifdef EMI_96M
	HW_CLKCTRL_EMI_WR(BF_CLKCTRL_EMI_DIV_XTAL(1)|
			  BF_CLKCTRL_EMI_DIV_EMI(3)
			 );
#else
	HW_CLKCTRL_EMI_WR(BF_CLKCTRL_EMI_DIV_XTAL(1)|
			  BF_CLKCTRL_EMI_DIV_EMI(2)
			 );
#endif

	/*choose ref_emi*/
	HW_CLKCTRL_CLKSEQ_CLR(BM_CLKCTRL_CLKSEQ_BYPASS_EMI);

	/*Reset EMI*/
	HW_EMI_CTRL_CLR(BM_EMI_CTRL_SFTRST);
	HW_EMI_CTRL_CLR(BM_EMI_CTRL_CLKGATE);
	printf("EMI_CTRL 0x%x\r\n" , HW_EMI_CTRL_RD());
	printf("FRAC 0x%x\r\n" , HW_CLKCTRL_FRAC_RD());

}
/*
 * Initialize i.MX233
 */
int
_start(void)
{

	volatile uint32_t *digctl_ctrl_rs;
	volatile uint32_t *digctl_ctrl_rc;
	volatile uint32_t *digctl_id_r;
	volatile uint32_t *pwr_status_r;
	uint8_t boot_reason;
	int on_batt;

	digctl_ctrl_rs = (uint32_t *)(HW_DIGCTL_BASE + HW_DIGCTL_CTRL_SET);
	digctl_ctrl_rc = (uint32_t *)(HW_DIGCTL_BASE + HW_DIGCTL_CTRL_CLR);
	pwr_status_r = (uint32_t *)(HW_POWER_BASE + HW_POWER_STS);
	digctl_id_r = (uint32_t *)(HW_DIGCTL_BASE + HW_DIGCTL_CHIPID);

	/* Enable SJTAG. */
	*digctl_ctrl_rs = HW_DIGCTL_CTRL_USE_SERIAL_JTAG;

	/* Enable microseconds timer. */
	*digctl_ctrl_rc = HW_DIGCTL_CTRL_XTAL24M_GATE;

	if (*pwr_status_r & HW_POWER_STS_VDD5V_GT_VDDIO)
		on_batt = 0;
	else
		on_batt = 1;

	printf("\r\nbootimx23: ");
	printf("HW revision TA%d, ",
	   (uint8_t)__SHIFTOUT(*digctl_id_r, HW_DIGCTL_CHIPID_REVISION) + 1);
	printf("boot reason ");
	boot_reason =
		(uint8_t) __SHIFTOUT(*pwr_status_r, HW_POWER_STS_PWRUP_SOURCE);

	switch (boot_reason)
	{
		case 0x20:
			printf("5V, ");
			break;
		case 0x10:
			printf("RTC, ");
			break;
		case 0x02:
			printf("high pswitch, ");
			break;
		case 0x01:
			printf("mid pswitch, ");
			break;
		default:
			printf("UNKNOWN, ");
	}

	printf("power source ");
	if (on_batt)
		printf("battery");
	else
		printf("5V");
	printf("\r\n");

	/* Power. */
	en_vbusvalid();
	if (!vbusvalid())
		printf("WARNING: !VBUSVALID\r\n");

	printf("Enabling 4P2 regulator...");
	en_4p2_reg();
	printf("done\r\n");

	power_tune();

	printf("Enabling 4P2 regulator output to DCDC...");
	en_4p2_to_dcdc();
	printf("done\r\n");

	printf("Enabling VDDMEM...");
	power_vddmem(2500);
	printf("done\r\n");

	printf("Powering VDDD from DCDC...");
	/* Boot fails if I set here TRG to +1500mV, do it later. */
	power_vddd_from_dcdc(1400, 1075);
	printf("done\r\n");

	printf("Powering VDDA from DCDC...");
	power_vdda_from_dcdc(1800, 1625);
	printf("done\r\n");

	/*
	 * VDDIO and thus SSP_CLK setup is postponed to
	 * imx23_olinuxino_machdep.c because SB is not able to load kernel if
	 * clocks are changed now.
	 */
	printf("Powering VDDIO from DCDC...");
	power_vddio_from_dcdc(3100, 2925);
	printf("done\r\n");

	/* Clocks */
	printf("Enabling clocks...");
	en_pll();
	bypass_saif(); /* Always set to zero bit. */
	set_cpu_frac(CPU_FRAC);
	set_hbus_div(HBUS_DIV);
	bypass_cpu();
	power_vddd_from_dcdc(1475, 1375);
	set_emi_div(EMI_DIV);
	set_emi_frac(EMI_FRAC);
	bypass_emi();
	printf("done\r\n");
	
	printf("Configuring pins...");
	pinctrl_prep();
	printf("done\r\n");
	printf("Configuring EMI...");
	emi_prep();
	printf("done\r\n");
	args_prep();

	return 0;
}