t_stat tti_svc (UNIT *uptr)
{
int32 out, c;
UNIT *ruptr = &tty_unit[TTR];
sim_activate (uptr, uptr->wait); /* continue poll */
if ((c = sim_poll_kbd ()) >= SCPE_KFLAG) { /* character? */
out = c & 0177; /* mask echo to 7b */
if (c & SCPE_BREAK) /* break? */
c = 0;
else c = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
uptr->pos = uptr->pos + 1;
}
else if (c != SCPE_OK) /* error? */
return c;
else if ((ruptr->flags & UNIT_ATT) && /* TTR attached */
(ruptr->STA & RUNNING)) { /* and running? */
if (ruptr->STA & LF_PEND) { /* lf pending? */
c = 0212; /* char is lf */
ruptr->STA &= ~LF_PEND; /* clear flag */
}
else { /* normal read */
if ((c = getc (ruptr->fileref)) == EOF) { /* read byte */
if (feof (ruptr->fileref)) { /* EOF? */
ruptr->STA &= ~RUNNING; /* stop reader */
if (ttr_stopioe)
printf ("TTR end of file\n");
else return SCPE_OK;
}
else perror ("TTR I/O error");
clearerr (ruptr->fileref);
return SCPE_IOERR;
}
if ((ruptr->flags & UNIT_UASC) && (c == '\n')) {
c = 0215; /* Unix ASCII NL? */
ruptr->STA |= LF_PEND; /* LF pending */
}
else if ((ruptr->flags & UNIT_ASC) && (c != 0))
c = c | 0200; /* ASCII nz? cvt */
ruptr->pos = ftell (ruptr->fileref);
}
if (ttr_xoff_read != 0) { /* reader stopping? */
if (c == RUBOUT) /* rubout? stop */
ttr_xoff_read = 0;
else ttr_xoff_read--; /* else decr state */
if (ttr_xoff_read == 0) /* delay done? */
ruptr->STA &= ~RUNNING; /* stop reader */
}
else if ((c & 0177) == XOFF) /* XOFF read? */
ttr_xoff_read = 2;
out = c; /* echo char */
}
else return SCPE_OK; /* no char */
if (tty_mode == 0) { /* input mode? */
tty_buf = c & 0377; /* put char in buf */
SET_INT (INT_TTY); /* set flag */
}
tto_write (out); /* echo to printer */
return ttp_write (out); /* and punch */
}
t_stat ttpi_svc (UNIT *uptr)
{
int32 c, out;
sim_activate (uptr, KBD_WAIT (uptr->wait, lfc_poll)); /* continue poll */
ttp_sta = ttp_sta & ~STA_FR; /* clear break */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
ttp_sta = ttp_sta & ~STA_PF; /* clear parity err */
if (ttp_kchp) /* overrun? */
ttp_sta = ttp_sta | STA_OVR;
if (ttp_karm)
SET_INT (v_TTP);
if (c & SCPE_BREAK) { /* break? */
ttp_sta = ttp_sta | STA_FR; /* framing error */
uptr->buf = 0; /* no character */
}
else {
out = c & 0x7F; /* echo is 7b */
c = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
if (TT_GET_MODE (uptr->flags) != TT_MODE_8B) /* not 8b mode? */
c = pas_par (ttp_cmd, c); /* apply parity */
uptr->buf = c; /* save char */
uptr->pos = uptr->pos + 1; /* incr count */
ttp_kchp = 1; /* char pending */
if (ttp_cmd & CMD_ECHO) {
out = sim_tt_outcvt (out, TT_GET_MODE (uptr->flags));
if (c >= 0)
sim_putchar (out);
ttp_unit[TTO].pos = ttp_unit[TTO].pos + 1;
}
}
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
uptr->wait = sim_rtcn_calb (POLL_RATE, TMR_POLL); /* calibrate poll timer */
sim_activate (uptr, uptr->wait); /* continue poll */
tty_shin = 0377; /* assume inactive */
if (tty_lf) { /* auto lf pending? */
c = 012; /* force lf */
tty_lf = 0;
}
else {
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c; /* no char or error? */
if (c & SCPE_BREAK) c = 0; /* break? */
else c = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
tty_lf = ((c & 0177) == 015) && (uptr->flags & UNIT_AUTOLF);
}
if (tty_mode & TM_KBD) { /* keyboard enabled? */
tty_buf = c; /* put char in buf */
uptr->pos = uptr->pos + 1;
ttyio (&tty_dib, ioENF, 0); /* set flag */
if (c) {
tto_out (c); /* echo? */
return ttp_out (c); /* punch? */
}
}
else tty_shin = c; /* no, char shifts in */
return SCPE_OK;
}
t_stat cdr_read_cons (char *buf, int32 sz)
{
int32 i, t;
inq_puts ("[Enter card]\r\n");
for (i = 0; i < sz; ) {
while (((t = sim_poll_kbd ()) == SCPE_OK) || /* wait for char */
(t & SCPE_BREAK)) {
if (stop_cpu) /* stop? */
return t;
}
if (t < SCPE_KFLAG) /* error? */
return t;
t = t & 0177;
if ((t == '\r') || (t == '\n')) /* eol? */
break;
if (t == 0177) { /* rubout? */
if (i != 0) { /* anything? */
buf[--i] = 0;
sim_putchar ('\\');
}
}
else {
sim_putchar (t);
buf[i++] = t;
}
}
inq_puts ("\r\n");
return SCPE_OK;
}
t_stat pkb_svc (UNIT *uptr)
{
int32 temp, ac, ec;
sim_activate (&pkb_unit, pkb_unit.wait); /* continue poll */
if (pkb_unit.u3 & PRT_INTREQ) { /* Printer Interrupt */
int_req |= 2;
return SCPE_OK;
}
/* Keyboard : handle input */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
ac = temp & 0x7f; /* placed type ASCII char in ac */
if (pkb_unit.u3 & KBD_REQINT) {
if (ac == key_req) { /* Request Key */
pkb_unit.u3 |= KBD_INTREQ;
int_req |= 2;
return SCPE_OK;
}
}
if (islower(ac))
ac = toupper(ac);
ec = ascii_to_ebcdic[ac]; /* Translate */
pkb_unit.buf = ec; /* put in buf */
pkb_unit.pos = pkb_unit.pos + 1;
if (ac == key_end) { /* End key */
if (pkb_unit.u3 & KBD_KEYINT) {
pkb_unit.u3 |= KBD_INTEND;
pkb_unit.buf = 0x0d;
int_req |= 2;
}
return SCPE_OK;
}
if (ac == key_can) { /* Cancel key */
if (pkb_unit.u3 & KBD_KEYINT) {
pkb_unit.u3 |= KBD_INTEND;
pkb_unit.buf = 0x03;
int_req |= 2;
}
return SCPE_OK;
}
if (ac == key_rtn) { /* Return key */
if (pkb_unit.u3 & KBD_KEYINT) {
pkb_unit.u3 |= KBD_INTKEY;
pkb_unit.buf = 0x12;
int_req |= 2;
}
return SCPE_OK;
}
if (pkb_unit.u3 & KBD_KEYINT) { /* Key interupts enabled ? */
int_req |= 2; /* Device 1 Interrupt! */
pkb_unit.u3 |= KBD_INTKEY; /* Set pending flag */
}
return SCPE_OK;
}
t_stat inq_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&inq_unit, inq_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
if ((temp & 0177) == inq_char) ind[IN_INR] = 1; /* set indicator */
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&tti_unit, tti_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
tti_unit.buf = temp & 0377;
tti_unit.pos = tti_unit.pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE) int_req = int_req | INT_TTI;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c; /* no char or error? */
if (c & SCPE_BREAK) uptr->buf = 0; /* break? */
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE) SET_INT (TTI);
return SCPE_OK;
}
t_stat i8272_svc(UNIT *uptr)
{
int32 temp;
sim_activate(&i8272_unit[uptr->u6], i8272_unit[uptr->u6].wait); /* continue poll */
if (uptr->u6 >= i8272_devnum) return SCPE_OK;
if ((temp = sim_poll_kbd()) < SCPE_KFLAG)
return temp; /* no char or error? */
//sim_printf("i8272_svc: received character temp=%04X devnum=%d\n", temp, uptr->u6);
i8272_unit[uptr->u6].buf = temp & 0xFF; /* Save char */
i8272_unit[uptr->u6].u3 |= RXR; /* Set status */
return SCPE_OK;
}
t_stat inq_io (int32 flag, int32 mod)
{
int32 i, t, wm_seen = 0;
ind[IN_INC] = 0; /* clear inq clear */
switch (mod) { /* case on mod */
case BCD_R: /* input */
/* if (ind[IN_INR] == 0) return SCPE_OK; /* return if no req */
ind[IN_INR] = 0; /* clear req */
puts_tty ("[Enter]\r\n"); /* prompt */
for (i = 0; M[BS] != (BCD_GRPMRK + WM); i++) { /* until GM + WM */
while (((t = sim_poll_kbd ()) == SCPE_OK) ||
(t & SCPE_BREAK)) {
if (stop_cpu) return SCPE_STOP; } /* interrupt? */
if (t < SCPE_KFLAG) return t; /* if not char, err */
t = t & 0177;
if ((t == '\r') || (t == '\n')) break;
if (t == inq_char) { /* cancel? */
ind[IN_INC] = 1; /* set indicator */
puts_tty ("\r\n[Canceled]\r\n");
return SCPE_OK; }
if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n");
sim_putchar (t); /* echo */
if (flag == MD_WM) { /* word mark mode? */
if ((t == '~') && (wm_seen == 0)) wm_seen = WM;
else {
M[BS] = wm_seen | ascii_to_bcd[t];
wm_seen = 0; } }
else M[BS] = (M[BS] & WM) | ascii_to_bcd[t];
if (!wm_seen) BS++;
if (ADDR_ERR (BS)) {
BS = BA | (BS % MAXMEMSIZE);
return STOP_NXM; } }
puts_tty ("\r\n");
M[BS++] = BCD_GRPMRK + WM;
return SCPE_OK;
case BCD_W: /* output */
for (i = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); i++) {
if ((flag == MD_WM) && (t & WM)) {
if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n");
sim_putchar ('~'); }
if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n");
sim_putchar (bcd_to_ascii[t & CHAR]);
if (ADDR_ERR (BS)) {
BS = BA | (BS % MAXMEMSIZE);
return STOP_NXM; } }
puts_tty ("\r\n");
return SCPE_OK;
default:
return STOP_INVM; } /* invalid mod */
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, uptr->wait); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
uptr->buf = 0;
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
dev_done = dev_done | INT_TTI; /* set ready */
uptr->pos = uptr->pos + 1;
return SCPE_OK;
}
t_stat fei_svc (UNIT *uptr)
{
int32 temp;
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return temp;
if (temp & SCPE_BREAK) /* ignore break */
return SCPE_OK;
uptr->buf = temp & 0177;
uptr->pos = uptr->pos + 1;
M[FE_CTYIN] = uptr->buf | FE_CVALID; /* put char in mem */
apr_flg = apr_flg | APRF_CON; /* interrupt KS10 */
return SCPE_OK;
}
t_stat i8274_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&i8274_unit, i8274_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
return temp; /* no char or error? */
i8274_unit.buf = temp & 0xFF; /* Save char */
rr0a |= 0x01; /* Set rx char ready */
/* Do any special character handling here */
i8274_unit.pos++;
return SCPE_OK;
}
t_stat sio_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&sio_unit, sio_unit.wait); // continue poll
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
return temp; // no char or error?
sio_unit.buf = temp & 0xFF; // Save char
sio_unit.u3 |= 0x01; // Set RXF flag
/* Do any special character handling here */
sio_unit.pos++; // step character count
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmxr_poll)); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
uptr->buf = 0;
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
uptr->pos = uptr->pos + 1;
dev_done = dev_done | INT_TTI; /* set done */
int_req = INT_UPDATE; /* update interrupts */
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
uptr->buf = 0;
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
SET_INT (TTI);
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
tti_buf = RXDB_ERR | RXDB_FRM;
else tti_buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
tti_int = 1;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if (dev_done & INT_TTI) /* prior character still pending? */
return SCPE_OK;
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
uptr->buf = 0;
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
uptr->pos = uptr->pos + 1;
dev_done = dev_done | INT_TTI; /* set done */
int_req = INT_UPDATE; /* update interrupts */
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&tti_unit, tti_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp; /* no char or error? */
tti_unit.buf = temp & 0177;
/* --- BEGIN MODIFIED CODE --- */
if (tti_unit.flags & UNIT_DASHER) /* translate input */
translate_in();
/* --- END MODIFIED CODE --- */
dev_busy = dev_busy & ~INT_TTI; /* clear busy */
dev_done = dev_done | INT_TTI; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
tti_unit.pos = tti_unit.pos + 1;
return SCPE_OK;
}
t_stat sim_instr (void)
{
t_stat reason = 0;
sim_cancel_step (); /* defang SCP step */
/* Main instruction fetch/decode loop */
do {
if (sim_interval <= 0) { /* check clock queue */
#if !UNIX_PLATFORM
if ((reason = sim_poll_kbd()) == SCPE_STOP) { /* poll on platforms without reliable signalling */
break;
}
#endif
if ((reason = sim_process_event ()))
break;
}
if (sim_brk_summ && /* breakpoint? */
sim_brk_test (*C, SWMASK ('E'))) {
reason = STOP_IBKPT; /* stop simulation */
break;
}
/* Increment current instruction */
*C = (*C + 1) & AMASK;
/* Get present instruction */
C[1] = Read (*C);
Staticisor = C[1] & IMASK; /* get instruction */
sim_interval = sim_interval - 1;
if ((reason = cpu_one_inst (*C, Staticisor))) { /* one instr; error? */
break;
}
if (sim_step && (--sim_step <= 0)) /* do step count */
reason = SCPE_STOP;
} while (reason == 0); /* loop until halted */
return reason;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if (tti_csr & CSR_DONE) /* is last input processed yet? */
return SCPE_OK; /* wait */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
tti_buf = RXDB_ERR | RXDB_FRM;
else tti_buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
tti_int = 1;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_activate (uptr, KBD_WAIT (uptr->wait, tmr_poll)); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) { /* break? */
if (sysd_hlt_enb ()) /* if enabled, halt */
hlt_pin = 1;
tti_unit.buf = TTIBUF_ERR | TTIBUF_FRM | TTIBUF_RBR;
}
else tti_unit.buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
SET_INT (TTI);
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500))
return SCPE_OK;
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
tti_buf = RXDB_ERR | RXDB_FRM;
else tti_buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
tti_buftime = sim_os_msec ();
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
tti_int = 1;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&tti_unit, tti_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
return temp; /* no char or error? */
tti_unit.buf = temp & 0177;
if (tti_unit.flags & UNIT_DASHER) {
if (tti_unit.buf == '\r')
tti_unit.buf = '\n'; /* Dasher: cr -> nl */
else if (tti_unit.buf == '\n')
tti_unit.buf = '\r' ; /* Dasher: nl -> cr */
}
DEV_CLR_BUSY( INT_TTI ) ;
DEV_SET_DONE( INT_TTI ) ;
DEV_UPDATE_INTR ;
++(uptr->pos) ;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 temp;
sim_activate (&tti_unit, tti_unit.wait); /* continue poll */
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return temp;
if (temp & SCPE_BREAK) /* ignore break */
return SCPE_OK;
temp = temp & 0177;
tti_unit.pos = tti_unit.pos + 1;
if (ascii_to_sds[temp] >= 0) {
tti_unit.buf = ascii_to_sds[temp]; /* internal rep */
sim_putchar (temp); /* echo */
if (temp == '\r') /* lf after cr */
sim_putchar ('\n');
xfr_req = xfr_req | XFR_TTI; /* set xfr flag */
}
else sim_putchar (007); /* ding! */
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c, ebcdic;
uint32 st;
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or err? */
return c;
if (c & SCPE_BREAK) { /* break? */
if (tt_cmd == TTS_WRITE) { /* during write? */
tt_cmd = TTS_IDLE;
sim_cancel (&tt_unit[TTO]); /* cancel write */
chan_uen (tt_dib.dva); /* uend */
}
return SCPE_OK;
}
c = c & 0x7F;
if (c == tti_panel) /* panel interrupt? */
return io_set_pint ();
uptr->pos = uptr->pos + 1; /* incr count */
if (c == '\r') /* map CR to NL */
c = '\n';
if (c == 0x7F) /* map ^H back */
c = 0x08;
c = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags)); /* input conversion */
ebcdic = ascii_to_ebcdic[c]; /* then to EBCDIC */
tto_echo (c); /* echo character */
if ((tt_cmd & 0x7F) == TTS_READ) { /* waiting for input? */
st = chan_WrMemB (tt_dib.dva, ebcdic); /* write to memory */
if (CHS_IFERR (st)) /* channel error? */
return tt_chan_err (st);
if ((st == CHS_ZBC) || (ebcdic == E_EOM) || /* channel end? */
((tt_cmd == TTS_READS) && ((ebcdic == E_HT) || (ebcdic == E_NL)))) {
tt_cmd = TTS_END; /* new state */
sim_activate (&tt_unit[TTO], chan_ctl_time); /* start dev thread */
}
}
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 in, temp;
sim_activate (uptr, uptr->wait); /* continue poll */
if (tti_hold & CW) { /* char waiting? */
tty_buf = tti_hold & TT_WIDTH; /* return char */
tti_hold = 0; /* not waiting */
}
else {
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
return temp;
if (temp & SCPE_BREAK) /* ignore break */
return SCPE_OK;
temp = temp & 0177;
if (temp == 0177) /* rubout? bs */
temp = '\b';
sim_putchar (temp); /* echo */
if (temp == '\r') /* cr? add nl */
sim_putchar ('\n');
in = ascii_to_fiodec[temp]; /* translate char */
if (in == 0) /* no xlation? */
return SCPE_OK;
if ((in & BOTH) || ((in & UC) == (tty_uc & UC)))
tty_buf = in & TT_WIDTH;
else { /* must shift */
tty_uc = in & UC; /* new case */
tty_buf = tty_uc? FIODEC_UC: FIODEC_LC;
tti_hold = in | CW; /* set 2nd waiting */
}
}
iosta = iosta | IOS_TTI; /* set flag */
dev_req_int (tti_sbs); /* req interrupt */
PF = PF | PF_SS_1; /* set prog flag 1 */
uptr->pos = uptr->pos + 1;
return SCPE_OK;
}
t_stat tti_svc (UNIT *uptr)
{
int32 c;
sim_clock_coschedule_tmr (uptr, TMR_CLK, TMXR_MULT); /* continue poll */
if ((tti_csr & CSR_DONE) && /* input still pending and < 500ms? */
((sim_os_msec () - tti_buftime) < 500))
return SCPE_OK;
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) { /* break? */
if (sysd_hlt_enb ()) /* if enabled, halt */
hlt_pin = 1;
tti_unit.buf = TTIBUF_ERR | TTIBUF_FRM | TTIBUF_RBR;
}
else tti_unit.buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags));
tti_buftime = sim_os_msec ();
uptr->pos = uptr->pos + 1;
tti_csr = tti_csr | CSR_DONE;
if (tti_csr & CSR_IE)
SET_INT (TTI);
return SCPE_OK;
}