static void spapr_vlan_register_types(void) { spapr_register_hypercall(H_REGISTER_LOGICAL_LAN, h_register_logical_lan); spapr_register_hypercall(H_FREE_LOGICAL_LAN, h_free_logical_lan); spapr_register_hypercall(H_SEND_LOGICAL_LAN, h_send_logical_lan); spapr_register_hypercall(H_ADD_LOGICAL_LAN_BUFFER, h_add_logical_lan_buffer); spapr_register_hypercall(H_MULTICAST_CTRL, h_multicast_ctrl); type_register_static(&spapr_vlan_info); }
struct icp_state *xics_system_init(unsigned int nr_irqs, unsigned int nr_cpus) { int max_server_num; unsigned int i; struct icp_state *icp; struct ics_state *ics; max_server_num = nr_cpus; icp = malloc(sizeof(*icp)); icp->nr_servers = max_server_num + 1; icp->ss = malloc(icp->nr_servers*sizeof(struct icp_server_state)); for (i = 0; i < icp->nr_servers; i++) { icp->ss[i].xirr = 0; icp->ss[i].pending_priority = 0; icp->ss[i].cpu = 0; icp->ss[i].mfrr = 0xff; } /* * icp->ss[env->cpu_index].cpu is set by CPUs calling in to * xics_cpu_register(). */ ics = malloc(sizeof(*ics)); ics->nr_irqs = nr_irqs; ics->offset = XICS_IRQ_OFFSET; ics->irqs = malloc(nr_irqs * sizeof(struct ics_irq_state)); icp->ics = ics; ics->icp = icp; for (i = 0; i < nr_irqs; i++) { ics->irqs[i].server = 0; ics->irqs[i].priority = 0xff; ics->irqs[i].saved_priority = 0xff; ics->irqs[i].rejected = 0; ics->irqs[i].masked_pending = 0; } spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_EOI, h_eoi); spapr_rtas_register("ibm,set-xive", rtas_set_xive); spapr_rtas_register("ibm,get-xive", rtas_get_xive); spapr_rtas_register("ibm,int-off", rtas_int_off); spapr_rtas_register("ibm,int-on", rtas_int_on); return icp; }
void hypercall_init(void) { /* hcall-dabr */ spapr_register_hypercall(H_SET_DABR, h_set_dabr); spapr_register_hypercall(H_LOGICAL_CI_LOAD, h_logical_load); spapr_register_hypercall(H_LOGICAL_CI_STORE, h_logical_store); spapr_register_hypercall(H_LOGICAL_CACHE_LOAD, h_logical_load); spapr_register_hypercall(H_LOGICAL_CACHE_STORE, h_logical_store); spapr_register_hypercall(H_LOGICAL_ICBI, h_logical_icbi); spapr_register_hypercall(H_LOGICAL_DCBF, h_logical_dcbf); /* KVM-PPC specific hcalls */ spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas); }
void xics_spapr_init(sPAPRMachineState *spapr) { /* Registration of global state belongs into realize */ spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_set_xive); spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_get_xive); spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_int_off); spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_int_on); spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_XIRR_X, h_xirr_x); spapr_register_hypercall(H_EOI, h_eoi); spapr_register_hypercall(H_IPOLL, h_ipoll); }
static void xics_realize(DeviceState *dev, Error **errp) { XICSState *icp = XICS(dev); Error *error = NULL; int i; if (!icp->nr_servers) { error_setg(errp, "Number of servers needs to be greater 0"); return; } /* Registration of global state belongs into realize */ spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_set_xive); spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_get_xive); spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_int_off); spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_int_on); spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_XIRR_X, h_xirr_x); spapr_register_hypercall(H_EOI, h_eoi); spapr_register_hypercall(H_IPOLL, h_ipoll); object_property_set_bool(OBJECT(icp->ics), true, "realized", &error); if (error) { error_propagate(errp, error); return; } for (i = 0; i < icp->nr_servers; i++) { object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error); if (error) { error_propagate(errp, error); return; } } }
struct icp_state *xics_system_init(int nr_irqs) { CPUPPCState *env; CPUState *cpu; int max_server_num; struct icp_state *icp; struct ics_state *ics; max_server_num = -1; for (env = first_cpu; env != NULL; env = env->next_cpu) { cpu = CPU(ppc_env_get_cpu(env)); if (cpu->cpu_index > max_server_num) { max_server_num = cpu->cpu_index; } } icp = g_malloc0(sizeof(*icp)); icp->nr_servers = max_server_num + 1; icp->ss = g_malloc0(icp->nr_servers*sizeof(struct icp_server_state)); for (env = first_cpu; env != NULL; env = env->next_cpu) { cpu = CPU(ppc_env_get_cpu(env)); struct icp_server_state *ss = &icp->ss[cpu->cpu_index]; switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_POWER7: ss->output = env->irq_inputs[POWER7_INPUT_INT]; break; case PPC_FLAGS_INPUT_970: ss->output = env->irq_inputs[PPC970_INPUT_INT]; break; default: hw_error("XICS interrupt model does not support this CPU bus " "model\n"); exit(1); } } ics = g_malloc0(sizeof(*ics)); ics->nr_irqs = nr_irqs; ics->offset = XICS_IRQ_BASE; ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state)); ics->islsi = g_malloc0(nr_irqs * sizeof(bool)); icp->ics = ics; ics->icp = icp; ics->qirqs = qemu_allocate_irqs(ics_set_irq, ics, nr_irqs); spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_EOI, h_eoi); spapr_rtas_register("ibm,set-xive", rtas_set_xive); spapr_rtas_register("ibm,get-xive", rtas_get_xive); spapr_rtas_register("ibm,int-off", rtas_int_off); spapr_rtas_register("ibm,int-on", rtas_int_on); qemu_register_reset(xics_reset, icp); return icp; }
void spapr_hvcons_init(void) { spapr_register_hypercall(H_PUT_TERM_CHAR, h_put_term_char); spapr_register_hypercall(H_GET_TERM_CHAR, h_get_term_char); }
struct icp_state *xics_system_init(int nr_irqs) { CPUPPCState *env; int max_server_num; int i; struct icp_state *icp; struct ics_state *ics; max_server_num = -1; for (env = first_cpu; env != NULL; env = env->next_cpu) { if (env->cpu_index > max_server_num) { max_server_num = env->cpu_index; } } icp = g_malloc0(sizeof(*icp)); icp->nr_servers = max_server_num + 1; icp->ss = g_malloc0(icp->nr_servers*sizeof(struct icp_server_state)); for (i = 0; i < icp->nr_servers; i++) { icp->ss[i].mfrr = 0xff; } for (env = first_cpu; env != NULL; env = env->next_cpu) { struct icp_server_state *ss = &icp->ss[env->cpu_index]; switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_POWER7: ss->output = env->irq_inputs[POWER7_INPUT_INT]; break; case PPC_FLAGS_INPUT_970: ss->output = env->irq_inputs[PPC970_INPUT_INT]; break; default: hw_error("XICS interrupt model does not support this CPU bus " "model\n"); exit(1); } } ics = g_malloc0(sizeof(*ics)); ics->nr_irqs = nr_irqs; ics->offset = 16; ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state)); icp->ics = ics; ics->icp = icp; for (i = 0; i < nr_irqs; i++) { ics->irqs[i].priority = 0xff; ics->irqs[i].saved_priority = 0xff; } ics->qirqs = qemu_allocate_irqs(ics_set_irq, ics, nr_irqs); spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_EOI, h_eoi); spapr_rtas_register("ibm,set-xive", rtas_set_xive); spapr_rtas_register("ibm,get-xive", rtas_get_xive); spapr_rtas_register("ibm,int-off", rtas_int_off); spapr_rtas_register("ibm,int-on", rtas_int_on); return icp; }
static int xics_init(struct kvm *kvm) { unsigned int i; struct icp_state *icp; struct ics_state *ics; int j; icp = malloc(sizeof(*icp)); icp->nr_servers = kvm->nrcpus; icp->ss = malloc(icp->nr_servers * sizeof(struct icp_server_state)); for (i = 0; i < icp->nr_servers; i++) { icp->ss[i].xirr = 0; icp->ss[i].pending_priority = 0; icp->ss[i].cpu = 0; icp->ss[i].mfrr = 0xff; } /* * icp->ss[env->cpu_index].cpu is set by CPUs calling in to * xics_cpu_register(). */ ics = malloc(sizeof(*ics)); ics->nr_irqs = XICS_NUM_IRQS; ics->offset = XICS_IRQ_OFFSET; ics->irqs = malloc(ics->nr_irqs * sizeof(struct ics_irq_state)); icp->ics = ics; ics->icp = icp; for (i = 0; i < ics->nr_irqs; i++) { ics->irqs[i].server = 0; ics->irqs[i].priority = 0xff; ics->irqs[i].saved_priority = 0xff; ics->irqs[i].rejected = 0; ics->irqs[i].masked_pending = 0; } spapr_register_hypercall(H_CPPR, h_cppr); spapr_register_hypercall(H_IPI, h_ipi); spapr_register_hypercall(H_XIRR, h_xirr); spapr_register_hypercall(H_EOI, h_eoi); spapr_rtas_register("ibm,set-xive", rtas_set_xive); spapr_rtas_register("ibm,get-xive", rtas_get_xive); spapr_rtas_register("ibm,int-off", rtas_int_off); spapr_rtas_register("ibm,int-on", rtas_int_on); for (j = 0; j < kvm->nrcpus; j++) { struct kvm_cpu *vcpu = kvm->cpus[j]; if (vcpu->cpu_id >= icp->nr_servers) die("Invalid server number for cpuid %ld\n", vcpu->cpu_id); icp->ss[vcpu->cpu_id].cpu = vcpu; } kvm->arch.icp = icp; return 0; }