int spi_claim_bus(struct spi_slave *slave) { struct ipq_spi_slave *ds = to_ipq_spi(slave); unsigned int ret; ret = spi_hw_init(ds); if (ret) return -EIO; return SUCCESS; }
int mxc_spi_is_active(int spi_id) { #ifdef CONFIG_MOT_WFN446 if ((spi_id < 0) || (spi_id >= CONFIG_SPI_NB_MAX)) { #else if ((spi_id < 0) || (spi_id > CONFIG_SPI_NB_MAX)) { #endif return 0; } return spi_present[spi_id]; } /*! * This function implements the init function of the SPI device. * This function is called when the module is loaded. * * @return This function returns 0. */ static int __init mxc_spi_init(void) { printk("CSPI driver\n"); spi_ipg_clk = mxc_get_clocks(IPG_CLK); spi_max_bit_rate = (spi_ipg_clk / 4); #ifdef CONFIG_MXC_SPI_SELECT1 spi_present[SPI1] = true; printk("SPI1 loaded\n"); #else /* CONFIG_MXC_SPI_SELECT1 */ spi_present[SPI1] = false; #endif /* CONFIG_MXC_SPI_SELECT1 */ #ifdef CONFIG_MXC_SPI_SELECT2 spi_present[SPI2] = true; printk("SPI2 loaded\n"); #else /* CONFIG_MXC_SPI_SELECT2 */ spi_present[SPI2] = false; #endif /* CONFIG_MXC_SPI_SELECT2 */ #ifndef CONFIG_MOT_WFN408 #ifdef CONFIG_MXC_SPI_SELECT3 spi_present[SPI3] = true; printk("SPI3 loaded\n"); #else /* CONFIG_MXC_SPI_SELECT3 */ spi_present[SPI3] = false; #endif /* CONFIG_MXC_SPI_SELECT3 */ #endif /* ! CONFIG_MOT_WFN408 */ return spi_hw_init(); }
int dw_spi_resume_host(struct dw_spi *dws) { spi_hw_init(&dws->master->dev, dws); return spi_controller_resume(dws->master); }
int dw_spi_add_host(struct device *dev, struct dw_spi *dws) { struct spi_controller *master; int ret; BUG_ON(dws == NULL); master = spi_alloc_master(dev, 0); if (!master) return -ENOMEM; dws->master = master; dws->type = SSI_MOTO_SPI; dws->dma_inited = 0; dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR); spi_controller_set_devdata(master, dws); ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), master); if (ret < 0) { dev_err(dev, "can not get IRQ\n"); goto err_free_master; } master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); master->bus_num = dws->bus_num; master->num_chipselect = dws->num_cs; master->setup = dw_spi_setup; master->cleanup = dw_spi_cleanup; master->set_cs = dw_spi_set_cs; master->transfer_one = dw_spi_transfer_one; master->handle_err = dw_spi_handle_err; master->max_speed_hz = dws->max_freq; master->dev.of_node = dev->of_node; master->dev.fwnode = dev->fwnode; master->flags = SPI_MASTER_GPIO_SS; if (dws->set_cs) master->set_cs = dws->set_cs; /* Basic HW init */ spi_hw_init(dev, dws); if (dws->dma_ops && dws->dma_ops->dma_init) { ret = dws->dma_ops->dma_init(dws); if (ret) { dev_warn(dev, "DMA init failed\n"); dws->dma_inited = 0; } else { master->can_dma = dws->dma_ops->can_dma; } } ret = devm_spi_register_controller(dev, master); if (ret) { dev_err(&master->dev, "problem registering spi master\n"); goto err_dma_exit; } dw_spi_debugfs_init(dws); return 0; err_dma_exit: if (dws->dma_ops && dws->dma_ops->dma_exit) dws->dma_ops->dma_exit(dws); spi_enable_chip(dws, 0); free_irq(dws->irq, master); err_free_master: spi_controller_put(master); return ret; }