int main(void)
{
DDRB |= _BV(PB3);
DDRB |= _BV(PB0); // raw-pwm output
spi_master_init(USI_PORTA);
// Enable pullups on button inputs
PORTA |= 1 << B_DOWN;
PORTA |= 1 << B_UP;
uint16_t timer = 0;
pwm_fast_init(2);
pwm_set_period(0xFF);
pwm_set_on_b(ton);
DDRA |= _BV(PA0); // Force Data in (MISO) to 0
// prescaler: 6 = div/64; fADC = 125kHz; 1 clockcycle = 8uS; 1 conversion=104uS
adc_init(VREF_I2_56, 0x12, 6);
// Configure timer0
TCCR0A = 0x00;
TCCR0B = 0x01; // Enable counter without prescaling
OCR0A = 0xFF; // compare at 0xFF
TIMSK |= (1 << OCIE0A); // enable interrupt for compare0A
sei();
while(1) {
if (timer % 100 == 0) {
if ((PINA & (1 << B_UP)) == 0 && pwm_t < BPWM_MAX) {
pwm_t++;
}
if ((PINA & (1 << B_DOWN)) == 0 && pwm_t > BPWM_MIN) {
pwm_t--;
}
}
if (timer++ == 50000 / LOOP_DELAY) {
spi_master_write(pwm_t >> 8);
spi_master_write(pwm_t);
spi_master_write(ton);
spi_master_write((adc & 0xFF00) >> 8);
spi_master_write(adc & 0x00FF);
timer = 0;
}
_delay_us(LOOP_DELAY);
}
int main()
{
DDRB |= _BV(PB3);
pwm_fast_init(2);
spi_master_init(USI_PORTA);
// Enable pullups on button inputs
PORTA |= 1 << B_DOWN;
PORTA |= 1 << B_UP;
uint8_t ton = 0x40;
uint8_t timer = 0;
pwm_set_period(0xFF);
pwm_set_on_b(ton);
while(1) {
if ((PINA & (1 << B_UP)) == 0) {
pwm_set_on_b(ton++);
}
if ((PINA & (1 << B_DOWN)) == 0) {
pwm_set_on_b(ton--);
}
if (timer++ == 1000 / LOOP_DELAY) {
spi_master_write(ton);
timer = 0;
}
_delay_ms(50);
}
}
int SPI::write(int value) {
lock();
_acquire();
int ret = spi_master_write(&_spi, value);
unlock();
return ret;
}
void spi_format(spi_t *obj, int bits, int mode, int slave) {
MBED_ASSERT((bits > 4) || (bits < 16));
MBED_ASSERT((mode >= 0) && (mode <= 3));
uint8_t polarity = (mode & 0x2) ? 1 : 0;
uint8_t phase = (mode & 0x1) ? 1 : 0;
uint8_t old_polarity = (obj->spi->CTAR[0] & SPI_CTAR_CPOL_MASK) != 0;
// set master/slave
if (slave) {
obj->spi->MCR &= ~SPI_MCR_MSTR_MASK;
} else {
obj->spi->MCR |= (1UL << SPI_MCR_MSTR_SHIFT);
}
// CTAR0 is used
obj->spi->CTAR[0] &= ~(SPI_CTAR_CPHA_MASK | SPI_CTAR_CPOL_MASK | SPI_CTAR_FMSZ_MASK);
obj->spi->CTAR[0] |= (polarity << SPI_CTAR_CPOL_SHIFT) | (phase << SPI_CTAR_CPHA_SHIFT) | ((bits - 1) << SPI_CTAR_FMSZ_SHIFT);
//If clk idle state was changed, start a dummy transmission
//This is a 'feature' in DSPI: https://community.freescale.com/thread/105526
if ((old_polarity != polarity) && (slave == 0)) {
//Start transfer (CS should be high, so shouldn't matter)
spi_master_write(obj, 0xFFFF);
}
}
/** Write a block out in master mode and receive a value
*
* The total number of bytes sent and received will be the maximum of
* tx_length and rx_length. The bytes written will be padded with the
* value 0xff.
*
* @param[in] obj The SPI peripheral to use for sending
* @param[in] tx_buffer Pointer to the byte-array of data to write to the device
* @param[in] tx_length Number of bytes to write, may be zero
* @param[in] rx_buffer Pointer to the byte-array of data to read from the device
* @param[in] rx_length Number of bytes to read, may be zero
* @param[in] write_fill Default data transmitted while performing a read
* @returns
* The number of bytes written and read from the device. This is
* maximum of tx_length and rx_length.
*/
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill)
{
int total = (tx_length > rx_length) ? tx_length : rx_length;
for (int i = 0; i < total; i++) {
char out = (i < tx_length) ? tx_buffer[i] : write_fill;
char in = spi_master_write(obj, out);
if (i < rx_length) {
rx_buffer[i] = in;
}
}
return total;
}
/**
* @brief Main program.
* @param None
* @retval None
*/
void main(void)
{
int TestingTimes = 10;
int Counter = 0;
int TestData = 0;
#if SPI_IS_AS_MASTER
spi_t spi_master;
SPI0_IS_AS_SLAVE = 0;
spi_init(&spi_master, SPI0_MOSI, SPI0_MISO, SPI0_SCLK, SPI0_CS);
DBG_SSI_INFO("--------------------------------------------------------\n");
for(Counter = 0, TestData=0xFF; Counter < TestingTimes; Counter++) {
spi_master_write(&spi_master, TestData);
DBG_SSI_INFO("Master write: %02X\n", TestData);
TestData--;
}
spi_free(&spi_master);
#else
spi_t spi_slave;
SPI0_IS_AS_SLAVE = 1;
spi_init(&spi_slave, SPI0_MOSI, SPI0_MISO, SPI0_SCLK, SPI0_CS);
DBG_SSI_INFO("--------------------------------------------------------\n");
for(Counter = 0, TestData=0xFF; Counter < TestingTimes; Counter++) {
DBG_SSI_INFO(ANSI_COLOR_CYAN"Slave read : %02X\n"ANSI_COLOR_RESET,
spi_slave_read(&spi_slave));
TestData--;
}
spi_free(&spi_slave);
#endif
DBG_SSI_INFO("SPI Demo finished.\n");
for(;;);
}
//--------------------------------------------------------------------------------------------//
void SPI_PL7223_SEND(unsigned char spicmd)
{
SPDAT = (char)spi_master_write(&spi0_master, (int)spicmd);
}
int SPI::write(int value) {
aquire();
return spi_master_write(&_spi, value);
}
