// Read data.
static void read_data(uint32_t offset, char* buf, uint32_t size) {
start_command(COMMAND_READ_DATA);
write_address(offset);
// The file data bit order is reversed.
spi_set_bit_order(SPI_LSB_FIRST);
for (; size > 0; --size, ++buf) {
*buf = spi_tx(0);
}
spi_set_bit_order(SPI_MSB_FIRST);
end_command();
}
//_________________________________________________ INITIALIZE SPI
//
void DWM1000_Anchor::initSpi() {
LOG<< "Init SPI "<<FLUSH;
spi_init(HSPI);
spi_mode(HSPI, 0, 0);
// spi_clock(HSPI, SPI_CLK_PREDIV, SPI_CLK_CNTDIV);
spi_clock(HSPI, 10, 20);//
// spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
// spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_LOW_TO_HIGH);
spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_LOW_TO_HIGH);
spi_set_bit_order(0);
WRITE_PERI_REG(SPI_CTRL2(HSPI), 0xFFFFFFFF);
WRITE_PERI_REG(SPI_CTRL2(HSPI),
(( 0xF & SPI_CS_DELAY_NUM ) << SPI_CS_DELAY_NUM_S) |//
(( 0x1 & SPI_CS_DELAY_MODE) << SPI_CS_DELAY_MODE_S) |//
(( 0xF & SPI_SETUP_TIME )<< SPI_SETUP_TIME_S ) |//
(( 0xF & SPI_HOLD_TIME )<< SPI_HOLD_TIME_S ) |//
(( 0xF & SPI_CK_OUT_LOW_MODE )<< SPI_CK_OUT_LOW_MODE_S ) |//
(( 0xF & SPI_CK_OUT_HIGH_MODE )<< SPI_CK_OUT_HIGH_MODE_S ) |//
(( 0x7 & SPI_MOSI_DELAY_NUM ) << SPI_MOSI_DELAY_NUM_S) |//
(( 0x7 & SPI_MISO_DELAY_NUM ) << SPI_MISO_DELAY_NUM_S) |//
(( 0x1 & SPI_MOSI_DELAY_MODE )<< SPI_MOSI_DELAY_MODE_S ) |//
(( 0x1 & SPI_MISO_DELAY_MODE )<< SPI_MISO_DELAY_MODE_S ) |//
0);
}
// Programs a page of data.
static void page_program(uint32_t offset, const char* buf, uint16_t size) {
start_command(COMMAND_PAGE_PROGRAM);
write_address(offset);
if (size > PAGE_SIZE) {
size = PAGE_SIZE;
}
// The file data bit order is reversed.
spi_set_bit_order(SPI_LSB_FIRST);
for (; size > 0; --size, ++buf) {
spi_tx(*buf);
}
spi_set_bit_order(SPI_MSB_FIRST);
end_command();
}
void cmd_spirom_id() {
unsigned long recv1;
unsigned short recv2;
// spi_init();
spi_set_port(SPI_PORT_NONE); // CSを自分で制御する
spi_set_bit_order(SPI_MSBFIRST);
gpio_set_pinmode(SPI_ROM_PORT,1);
gpio_write_port(SPI_ROM_PORT,0); // CSを下げる
spi_set_bit_length(8);
spi_transfer(0x9f); // コマンド送信
spi_set_bit_length(24);
recv1 = spi_transfer(0) & 0xffffff;
printf("SPI ROM JEDEC ID=%08lx, ",recv1);
// gpio_write_port(SPI_ROM_PORT,1); // CSを上げる
gpio_write_port(SPI_ROM_PORT,0); // CSを下げる
spi_set_bit_length(32);
recv2 = spi_transfer(0x90000000) & 0xffff; // コマンド送信
printf("ID=%04x\n",recv2);
gpio_write_port(SPI_ROM_PORT,1); // CSを上げる
gpio_set_pinmode(SPI_ROM_PORT,0);
// spi_terminate();
}
void spi_init(void) {
DDRB |= (1 << PORTB3) | // Enable MOSI.
(1 << PORTB5); // Enable SCK.
SPCR = (1 << SPE) | // Enable SPI.
(1 << MSTR); // SPI master mode.
spi_set_bit_order(SPI_MSB_FIRST);
// Clock speed of CPU clock / 2. (Max possible)
SPCR |= (0 << SPR1) | (0 << SPR0);
SPSR |= (1 << SPI2X);
// TODO: Either this bit needs to be cleared in its own subsystem module, or
// all SPI select bits should be cleared together in one place.
spi_clear_ss(SELECT_FLASH_BIT);
DDRC |= (1 << SELECT_FLASH_BIT);
}
void cmd_spi() {
const char usage[] = "Usage: spi id | dump addr";
spi_set_port(SPI_PORT_NONE); // CSを自分で制御する
spi_set_bit_order(SPI_MSBFIRST);
char *tmp = strtok(NULL," ");
if(!tmp) {
sci_puts(usage);
}
if(!strcmp(tmp,"id")) {
cmd_spirom_id();
}
if(!strcmp(tmp,"dump")) {
cmd_spirom_dump();
}
spi_set_bit_length(8);
}
/**
* Enable and configure a SPI bus for a device.
*/
static void spi_enable(struct spi_bus *bus, struct spi_device *dev)
{
/* Ensure the peripheral is disabled, then configure it. */
spi_cr1_clear(bus, SPI_CR1_SPE);
bus->dev->CR1 = 0;
bus->dev->CR2 = 0;
/* The SSM and SSI bits are necessary to prevent the SPI peripheral
* from disabling SPI if the NSS pin is not high. Since we are
* assuming all devices use GPIOs for slave selection, this should
* be the right thing. If that changes, we will need to make this
* configurable. */
spi_cr1_set(bus, SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI);
spi_set_baud(bus, dev->baud);
spi_set_clock_polarity(bus, dev->clock_polarity);
spi_set_clock_phase(bus, dev->clock_phase);
spi_set_bit_order(bus, dev->bit_order);
spi_cr1_set(bus, SPI_CR1_SPE);
}
static int lua_spi_newindex(lua_State *L) {
spi_t *spi;
const char *field;
spi = luaL_checkudata(L, 1, "periphery.SPI");
if (!lua_isstring(L, 2))
return lua_spi_error(L, SPI_ERROR_ARG, 0, "Error: unknown property");
field = lua_tostring(L, 2);
if (strcmp(field, "fd") == 0)
return lua_spi_error(L, SPI_ERROR_ARG, 0, "Error: immutable property");
else if (strcmp(field, "mode") == 0) {
unsigned int mode;
int ret;
lua_spi_checktype(L, 3, LUA_TNUMBER);
mode = lua_tounsigned(L, 3);
if ((ret = spi_set_mode(spi, mode)) < 0)
return lua_spi_error(L, ret, spi_errno(spi), "Error: %s", spi_errmsg(spi));
return 0;
} else if (strcmp(field, "max_speed") == 0) {
uint32_t max_speed;
int ret;
lua_spi_checktype(L, 3, LUA_TNUMBER);
max_speed = lua_tounsigned(L, 3);
if ((ret = spi_set_max_speed(spi, max_speed)) < 0)
return lua_spi_error(L, ret, spi_errno(spi), "Error: %s", spi_errmsg(spi));
return 0;
} else if (strcmp(field, "bit_order") == 0) {
const char *s;
spi_bit_order_t bit_order;
int ret;
lua_spi_checktype(L, 3, LUA_TSTRING);
s = lua_tostring(L, 3);
if (strcmp(s, "msb") == 0)
bit_order = MSB_FIRST;
else if (strcmp(s, "lsb") == 0)
bit_order = LSB_FIRST;
else
return lua_spi_error(L, SPI_ERROR_ARG, 0, "Error: invalid bit_order, should be 'msb' or 'lsb'");
if ((ret = spi_set_bit_order(spi, bit_order)) < 0)
return lua_spi_error(L, ret, spi_errno(spi), "Error: %s", spi_errmsg(spi));
return 0;
} else if (strcmp(field, "bits_per_word") == 0) {
uint8_t bits_per_word;
int ret;
lua_spi_checktype(L, 3, LUA_TNUMBER);
bits_per_word = lua_tounsigned(L, 3);
if ((ret = spi_set_bits_per_word(spi, bits_per_word)) < 0)
return lua_spi_error(L, ret, spi_errno(spi), "Error: %s", spi_errmsg(spi));
return 0;
} else if (strcmp(field, "extra_flags") == 0) {
uint8_t extra_flags;
int ret;
lua_spi_checktype(L, 3, LUA_TNUMBER);
extra_flags = lua_tounsigned(L, 3);
if ((ret = spi_set_extra_flags(spi, extra_flags)) < 0)
return lua_spi_error(L, ret, spi_errno(spi), "Error: %s", spi_errmsg(spi));
return 0;
}
return lua_spi_error(L, SPI_ERROR_ARG, 0, "Error: unknown property");
}
