static int skl_dsp_core_set_reset_state(struct sst_dsp *ctx, unsigned int core_mask) { int ret; /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CRST_MASK(core_mask), SKL_ADSPCS_CRST_MASK(core_mask)); /* poll with timeout to check if operation successful */ ret = sst_dsp_register_poll(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CRST_MASK(core_mask), SKL_ADSPCS_CRST_MASK(core_mask), SKL_DSP_RESET_TO, "Set reset"); if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) & SKL_ADSPCS_CRST_MASK(core_mask)) != SKL_ADSPCS_CRST_MASK(core_mask)) { dev_err(ctx->dev, "Set reset state failed: core_mask %x\n", core_mask); ret = -EIO; } return ret; }
int skl_dsp_core_power_up(struct sst_dsp *ctx, unsigned int core_mask) { int ret; /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_SPA_MASK(core_mask), SKL_ADSPCS_SPA_MASK(core_mask)); /* poll with timeout to check if operation successful */ ret = sst_dsp_register_poll(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CPA_MASK(core_mask), SKL_ADSPCS_CPA_MASK(core_mask), SKL_DSP_PU_TO, "Power up"); if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) & SKL_ADSPCS_CPA_MASK(core_mask)) != SKL_ADSPCS_CPA_MASK(core_mask)) { dev_err(ctx->dev, "DSP core power up failed: core_mask %x\n", core_mask); ret = -EIO; } return ret; }
static int skl_dsp_core_unset_reset_state(struct sst_dsp *ctx) { int ret; dev_dbg(ctx->dev, "In %s\n", __func__); /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CRST_MASK, 0); /* poll with timeout to check if operation successful */ ret = sst_dsp_register_poll(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CRST_MASK, 0, SKL_DSP_RESET_TO, "Unset reset"); if ((sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) & SKL_ADSPCS_CRST(SKL_DSP_CORES_MASK)) != 0) { dev_err(ctx->dev, "Unset reset state failed\n"); ret = -EIO; } return ret; }
int skl_dsp_core_power_down(struct sst_dsp *ctx, unsigned int core_mask) { /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_SPA_MASK(core_mask), 0); /* poll with timeout to check if operation successful */ return sst_dsp_register_poll(ctx, SKL_ADSP_REG_ADSPCS, SKL_ADSPCS_CPA_MASK(core_mask), 0, SKL_DSP_PD_TO, "Power down"); }
static int cnl_dsp_core_power_up(struct sst_dsp *ctx, unsigned int core_mask) { /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, CNL_ADSP_REG_ADSPCS, CNL_ADSPCS_SPA(core_mask), CNL_ADSPCS_SPA(core_mask)); /* poll with timeout to check if operation successful */ return sst_dsp_register_poll(ctx, CNL_ADSP_REG_ADSPCS, CNL_ADSPCS_CPA(core_mask), CNL_ADSPCS_CPA(core_mask), CNL_DSP_PU_TO, "Power up"); }
static int cnl_dsp_core_unset_reset_state(struct sst_dsp *ctx, unsigned int core_mask) { /* update bits */ sst_dsp_shim_update_bits_unlocked(ctx, CNL_ADSP_REG_ADSPCS, CNL_ADSPCS_CRST(core_mask), 0); /* poll with timeout to check if operation successful */ return sst_dsp_register_poll(ctx, CNL_ADSP_REG_ADSPCS, CNL_ADSPCS_CRST(core_mask), 0, CNL_DSP_RESET_TO, "Unset reset"); }