// Routine to load date qualifier strings from resources. Do not call before AfApp has m_hinst.
void LoadDateQualifiers()
{
if (g_fDoneDateQual)
return;
int i;
for (i = 0; i < 5; i++)
{
StrUni stu(g_rgridDateQual1[i]);
Assert(stu.Length() < knPrecLen);
u_strcpy(g_rgchwPrecFull[i], stu.Chars());
StrAnsi sta(g_rgridDateQual1[i]);
Assert(sta.Length() < knPrecLen);
strcpy_s(g_rgchPrecFull[i], sta.Length(), sta.Chars());
}
for (i = 0; i < 2; i++)
{
StrUni stu(g_rgridDateQual2[i]);
Assert(stu.Length() < knAdBcLen);
u_strcpy(g_rgchwBC_ADFull[i], stu.Chars());
StrAnsi sta(g_rgridDateQual2[i]);
Assert(stu.Length() < knAdBcLen);
strcpy_s(g_rgchBC_ADFull[i], sta.Length(), sta.Chars());
}
for (i = 0; i < 3; i++)
{
StrUni stu(g_rgridDateBlank[i]);
Assert(stu.Length() < knBlankLen);
u_strcpy(g_rgchwBlankFull[i], stu.Chars());
StrAnsi sta(g_rgridDateBlank[i]);
Assert(stu.Length() < knBlankLen);
strcpy_s(g_rgchBlankFull[i], sta.Length(), sta.Chars());
}
g_fDoneDateQual = true;
}
void
viking_cache_enable(void)
{
u_int pcr;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
if ((pcr & VIKING_PCR_ICE) == 0) {
/* I-cache not on; "flash-clear" it now. */
sta(0x80000000, ASI_ICACHECLR, 0); /* Unlock */
sta(0, ASI_ICACHECLR, 0); /* clear */
}
if ((pcr & VIKING_PCR_DCE) == 0) {
/* D-cache not on: "flash-clear" it. */
sta(0x80000000, ASI_DCACHECLR, 0);
sta(0, ASI_DCACHECLR, 0);
}
/* Turn on caches via MMU */
sta(SRMMU_PCR, ASI_SRMMU, pcr | VIKING_PCR_DCE | VIKING_PCR_ICE);
CACHEINFO.c_enabled = CACHEINFO.dc_enabled = 1;
/* Now turn on MultiCache if it exists */
if (cpuinfo.mxcc && CACHEINFO.ec_totalsize > 0) {
/* Set external cache enable bit in MXCC control register */
stda(MXCC_CTRLREG, ASI_CONTROL,
ldda(MXCC_CTRLREG, ASI_CONTROL) | MXCC_CTRLREG_CE);
cpuinfo.flags |= CPUFLG_CACHEPAGETABLES; /* Ok to cache PTEs */
CACHEINFO.ec_enabled = 1;
}
}
void
cypress_cache_enable(void)
{
int i, ls, ts;
u_int pcr;
int alias_dist;
alias_dist = CACHEINFO.c_totalsize;
if (alias_dist > cache_alias_dist) {
cache_alias_dist = alias_dist;
cache_alias_bits = (alias_dist - 1) & ~PGOFSET;
dvma_cachealign = alias_dist;
}
pcr = lda(SRMMU_PCR, ASI_SRMMU);
pcr &= ~CYPRESS_PCR_CM;
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.c_linesize;
ts = CACHEINFO.c_totalsize;
if ((pcr & CYPRESS_PCR_CE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_DCACHETAG, 0);
pcr |= CYPRESS_PCR_CE;
/* If put in write-back mode, turn it on */
if (CACHEINFO.c_vactype == VAC_WRITEBACK)
pcr |= CYPRESS_PCR_CM;
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;
}
void
swift_cache_enable(void)
{
int i, ls, ts;
u_int pcr;
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.ic_linesize;
ts = CACHEINFO.ic_totalsize;
if ((pcr & SWIFT_PCR_ICE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_ICACHETAG, 0);
ls = CACHEINFO.dc_linesize;
ts = CACHEINFO.dc_totalsize;
if ((pcr & SWIFT_PCR_DCE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_DCACHETAG, 0);
pcr |= (SWIFT_PCR_ICE | SWIFT_PCR_DCE);
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;
}
void
ms1_cache_enable()
{
u_int pcr;
cache_alias_bits = GUESS_CACHE_ALIAS_BITS;
cache_alias_dist = GUESS_CACHE_ALIAS_DIST;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* We "flash-clear" the I/D caches. */
if ((pcr & MS1_PCR_ICE) == 0)
sta(0, ASI_ICACHECLR, 0);
if ((pcr & MS1_PCR_DCE) == 0)
sta(0, ASI_DCACHECLR, 0);
/* Turn on caches */
sta(SRMMU_PCR, ASI_SRMMU, pcr | MS1_PCR_DCE | MS1_PCR_ICE);
cpuinfo.flags |= CPUFLG_CACHEPAGETABLES;
CACHEINFO.c_enabled = CACHEINFO.dc_enabled = 1;
printf("cache enabled\n");
}
void
ms1_cache_enable(void)
{
u_int pcr;
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* We "flash-clear" the I/D caches. */
if ((pcr & MS1_PCR_ICE) == 0)
sta(0, ASI_ICACHECLR, 0);
if ((pcr & MS1_PCR_DCE) == 0)
sta(0, ASI_DCACHECLR, 0);
/* Turn on caches */
sta(SRMMU_PCR, ASI_SRMMU, pcr | MS1_PCR_DCE | MS1_PCR_ICE);
CACHEINFO.c_enabled = CACHEINFO.dc_enabled = 1;
/*
* When zeroing or copying pages, there might still be entries in
* the cache, since we don't flush pages from the cache when
* unmapping them (`vactype' is VAC_NONE). Fortunately, the
* MS1 cache is write-through and not write-allocate, so we can
* use cacheable access while not displacing cache lines.
*/
cpuinfo.flags |= CPUFLG_CACHE_MANDATORY;
}
void
hypersparc_cache_enable(void)
{
int i, ls, ts;
u_int pcr, v;
int alias_dist;
/*
* Setup the anti-aliasing constants and DVMA alignment constraint.
*/
alias_dist = CACHEINFO.c_totalsize;
if (alias_dist > cache_alias_dist) {
cache_alias_dist = alias_dist;
cache_alias_bits = (alias_dist - 1) & ~PGOFSET;
dvma_cachealign = cache_alias_dist;
}
ls = CACHEINFO.c_linesize;
ts = CACHEINFO.c_totalsize;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* Now reset cache tag memory if cache not yet enabled */
if ((pcr & HYPERSPARC_PCR_CE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_DCACHETAG, 0);
pcr &= ~(HYPERSPARC_PCR_CE | HYPERSPARC_PCR_CM);
hypersparc_cache_flush_all();
/* Enable write-back cache */
pcr |= HYPERSPARC_PCR_CE;
if (CACHEINFO.c_vactype == VAC_WRITEBACK)
pcr |= HYPERSPARC_PCR_CM;
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;
/* XXX: should add support */
if (CACHEINFO.c_hwflush)
panic("cache_enable: can't handle 4M with hw-flush cache");
/*
* Enable instruction cache and, on single-processor machines,
* disable `Unimplemented Flush Traps'.
*/
v = HYPERSPARC_ICCR_ICE | (sparc_ncpus <= 1 ? HYPERSPARC_ICCR_FTD : 0);
wrasr(v, HYPERSPARC_ASRNUM_ICCR);
}
/*
* Sends request to create connection with me
*/
void ConnectionManager::revConnectToMe(const Node::Ptr& node, const AdcCommand& cmd)
{
// don't allow connection if we didn't proceed a handshake
//if(!node->isOnline())
// return;
// this is valid for active-passive connections only
if(!ClientManager::getInstance()->isActive())
return;
const string& protocol = cmd.getParam(1);
const string& token = cmd.getParam(2);
bool secure;
if(protocol == CLIENT_PROTOCOL)
{
secure = false;
}
else if(protocol == SECURE_CLIENT_PROTOCOL_TEST && CryptoManager::getInstance()->TLSOk())
{
secure = true;
}
else
{
AdcCommand sta(AdcCommand::SEV_FATAL, AdcCommand::ERROR_PROTOCOL_UNSUPPORTED, "Protocol unknown", AdcCommand::TYPE_UDP);
sta.addParam("PR", protocol);
sta.addParam("TO", token);
DHT::getInstance()->send(sta, node->getIdentity().getIp(), static_cast<uint16_t>(Util::toInt(node->getIdentity().getUdpPort())),
node->getUser()->getCID(), node->getUdpKey());
return;
}
connect(node, token, secure);
}
/*----------------------------------------------------------------------------------------------
${IActionHandler#StartSeq}
----------------------------------------------------------------------------------------------*/
STDMETHODIMP ActionHandler::StartSeq(BSTR bstrUndo, BSTR bstrRedo, IUndoAction * puact)
{
BEGIN_COM_METHOD;
ChkComBstrArg(bstrUndo);
ChkComBstrArg(bstrRedo);
ChkComArgPtr(puact);
if (m_fUndoOrRedoInProgress)
return S_OK;
BeginUndoTask(bstrUndo, bstrRedo);
// Add the current action.
AddActionAux(puact);
EndUndoTask();
#ifdef DEBUG_ACTION_HANDLER
StrAnsi sta(bstrUndo);
sta.Replace(0, 0, "StartSeq:");
sta.FormatAppend(" m_iCurrSeq=%d, m_viSeqStart=%d, m_iuactCurr=%d, m_vquact=%d, m_viMarks=%d, m_nDepth=%d\n",
m_iCurrSeq, m_viSeqStart.Size(), m_iuactCurr, m_vquact.Size(), m_viMarks.Size(), m_nDepth);
::OutputDebugStringA(sta.Chars());
#endif//DEBUG_ACTION_HANDLER
END_COM_METHOD(g_factActh, IID_IActionHandler);
}
SVCPermissions
parseVehicleClasses(const std::string& allowedS) {
if (allowedS == "all") {
return SVCAll;
}
// check if allowedS was previously cached
if (parseVehicleClassesCached.count(allowedS) == 0) {
SVCPermissions result = 0;
StringTokenizer sta(allowedS, " ");
while (sta.hasNext()) {
const std::string s = sta.next();
if (!SumoVehicleClassStrings.hasString(s)) {
WRITE_ERROR("Unknown vehicle class '" + s + "' encountered.");
} else {
const SUMOVehicleClass vc = getVehicleClassID(s);
const std::string& realName = SumoVehicleClassStrings.getString(vc);
if (realName != s) {
deprecatedVehicleClassesSeen.insert(s);
}
result |= vc;
}
}
// save parsed vehicle class cached
parseVehicleClassesCached[allowedS] = result;
}
return parseVehicleClassesCached.at(allowedS);
}
/*
* Enable the cache.
* We need to clear out the valid bits first.
*/
void
sun4_cache_enable()
{
register u_int i, lim, ls, ts;
cache_alias_bits = CPU_ISSUN4
? CACHE_ALIAS_BITS_SUN4
: CACHE_ALIAS_BITS_SUN4C;
cache_alias_dist = CPU_ISSUN4
? CACHE_ALIAS_DIST_SUN4
: CACHE_ALIAS_DIST_SUN4C;
ls = CACHEINFO.c_linesize;
ts = CACHEINFO.c_totalsize;
for (i = AC_CACHETAGS, lim = i + ts; i < lim; i += ls)
sta(i, ASI_CONTROL, 0);
stba(AC_SYSENABLE, ASI_CONTROL,
lduba(AC_SYSENABLE, ASI_CONTROL) | SYSEN_CACHE);
CACHEINFO.c_enabled = 1;
printf("cache enabled\n");
#ifdef notyet
if (cpuinfo.flags & SUN4_IOCACHE) {
stba(AC_SYSENABLE, ASI_CONTROL,
lduba(AC_SYSENABLE, ASI_CONTROL) | SYSEN_IOCACHE);
printf("iocache enabled\n");
}
#endif
}
void
turbosparc_cache_enable(void)
{
int i, ls, ts;
u_int pcr, pcf;
/* External cache sizes in KB; see Turbo sparc manual */
static const int ts_ecache_table[8] = {0,256,512,1024,512,1024,1024,0};
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.ic_linesize;
ts = CACHEINFO.ic_totalsize;
if ((pcr & TURBOSPARC_PCR_ICE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_ICACHETAG, 0);
ls = CACHEINFO.dc_linesize;
ts = CACHEINFO.dc_totalsize;
if ((pcr & TURBOSPARC_PCR_DCE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_DCACHETAG, 0);
pcr |= (TURBOSPARC_PCR_ICE | TURBOSPARC_PCR_DCE);
sta(SRMMU_PCR, ASI_SRMMU, pcr);
pcf = lda(SRMMU_PCFG, ASI_SRMMU);
if (pcf & TURBOSPARC_PCFG_SE) {
/*
* Record external cache info. The Turbosparc's second-
* level cache is physically addressed/tagged and is
* not exposed by the PROM.
*/
CACHEINFO.ec_totalsize = 1024 *
ts_ecache_table[(pcf & TURBOSPARC_PCFG_SCC)];
CACHEINFO.ec_linesize = 32;
}
if (pcf & TURBOSPARC_PCFG_SNP)
printf(": DVMA coherent ");
CACHEINFO.c_enabled = 1;
}
SVCPermissions
parseVehicleClasses(const std::string& allowedS) {
SVCPermissions result = 0;
StringTokenizer sta(allowedS, " ");
while (sta.hasNext()) {
result |= getVehicleClassID(sta.next());
}
return result;
}
bool
canParseVehicleClasses(const std::string& classes) {
StringTokenizer sta(classes, " ");
while (sta.hasNext()) {
if (!SumoVehicleClassStrings.hasString(sta.next())) {
return false;
}
}
return true;
}
/*
* Switch video mode and clear screen
*/
void
tcx_s24_reset(struct tcx_softc *sc, int depth)
{
struct rasops_info *ri = &sc->sc_sunfb.sf_ro;
uint32_t pixel;
paddr_t dst;
int n;
if (depth == 8)
pixel = TCX_CTL_8_MAPPED | (ri->ri_devcmap[WSCOL_WHITE] & 0xff);
else
pixel = TCX_CTL_24_LEVEL | 0xffffff;
/*
* Set the first 32 pixels as white in the intended mode, using the
* control plane.
*/
dst = sc->sc_cplane;
for (n = 32; n != 0; n--) {
sta(dst, ASI_BYPASS, pixel);
dst += 4;
}
/*
* Do the remaining pixels: either with the blitter if we can use it,
* or continuing manual writes if we can't.
*/
if (sc->sc_blit != 0) {
dst = sc->sc_blit + (32 << 3);
pixel = ((sc->sc_blit_width - 1) << 24) | 0;
for (n = sc->sc_sunfb.sf_fbsize - 32; n != 0;
n -= sc->sc_blit_width) {
stda(dst, ASI_BYPASS, pixel);
dst += sc->sc_blit_width << 3;
}
} else {
/* this relies on video memory being contiguous */
for (n = sc->sc_sunfb.sf_fbsize - 32; n != 0; n--) {
sta(dst, ASI_BYPASS, pixel);
dst += 4;
}
}
}
void
hypersparc_cache_enable()
{
int i, ls, ts;
u_int pcr;
ls = CACHEINFO.c_linesize;
ts = CACHEINFO.c_totalsize;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/*
* First we determine what type of cache we have, and
* setup the anti-aliasing constants appropriately.
*/
if (pcr & HYPERSPARC_PCR_CS) {
cache_alias_bits = CACHE_ALIAS_BITS_HS256k;
cache_alias_dist = CACHE_ALIAS_DIST_HS256k;
} else {
cache_alias_bits = CACHE_ALIAS_BITS_HS128k;
cache_alias_dist = CACHE_ALIAS_DIST_HS128k;
}
/* Now reset cache tag memory if cache not yet enabled */
if ((pcr & HYPERSPARC_PCR_CE) == 0)
for (i = 0; i < ts; i += ls) {
sta(i, ASI_DCACHETAG, 0);
while (lda(i, ASI_DCACHETAG))
sta(i, ASI_DCACHETAG, 0);
}
/* Enable write-back cache */
pcr |= (HYPERSPARC_PCR_CE | HYPERSPARC_PCR_CM);
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;
/* XXX: should add support */
if (CACHEINFO.c_hwflush)
panic("cache_enable: can't handle 4M with hw-flush cache");
printf("cache enabled\n");
}
static char * STA1() {
CPU *c = getCPU();
uint16_t address = 0xFFEE;
OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
setRegByte(c,ACCUM,-39);
sta(c,o);
int8_t addrVal = read(c,address);
mu_assert("STA1 err, address at 0xFFEE != -39", addrVal == -39);
freeOP_CODE_INFO(o);
free(c);
return 0;
}
void
viking_cache_enable()
{
u_int pcr;
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
if ((pcr & VIKING_PCR_ICE) == 0) {
/* I-cache not on; "flash-clear" it now. */
sta(0x80000000, ASI_ICACHECLR, 0); /* Unlock */
sta(0, ASI_ICACHECLR, 0); /* clear */
}
if ((pcr & VIKING_PCR_DCE) == 0) {
/* D-cache not on: "flash-clear" it. */
sta(0x80000000, ASI_DCACHECLR, 0);
sta(0, ASI_DCACHECLR, 0);
}
/* Turn on caches via MMU */
sta(SRMMU_PCR, ASI_SRMMU, pcr | VIKING_PCR_DCE | VIKING_PCR_ICE);
CACHEINFO.c_enabled = CACHEINFO.dc_enabled = 1;
/* Now turn on MultiCache if it exists */
if (cpuinfo.mxcc && CACHEINFO.ec_totalsize > 0) {
/* Multicache controller */
stda(MXCC_ENABLE_ADDR, ASI_CONTROL,
ldda(MXCC_ENABLE_ADDR, ASI_CONTROL) |
(u_int64_t)MXCC_ENABLE_BIT);
cpuinfo.flags |= CPUFLG_CACHEPAGETABLES; /* Ok to cache PTEs */
CACHEINFO.ec_enabled = 1;
}
printf("cache enabled\n");
}
void
turbosparc_cache_enable()
{
int i, ls, ts;
u_int pcr, pcf;
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.ic_linesize;
ts = CACHEINFO.ic_totalsize;
if ((pcr & TURBOSPARC_PCR_ICE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_ICACHETAG, 0);
ls = CACHEINFO.dc_linesize;
ts = CACHEINFO.dc_totalsize;
if ((pcr & TURBOSPARC_PCR_DCE) == 0)
for (i = 0; i < ts; i += ls) {
sta(i, ASI_DCACHETAG, 0);
while (lda(i, ASI_DCACHETAG))
sta(i, ASI_DCACHETAG, 0);
}
pcr |= (TURBOSPARC_PCR_ICE | TURBOSPARC_PCR_DCE);
sta(SRMMU_PCR, ASI_SRMMU, pcr);
pcf = lda(SRMMU_PCFG, ASI_SRMMU);
if (pcf & TURBOSPARC_PCFG_SNP)
printf("DVMA coherent ");
CACHEINFO.c_enabled = 1;
printf("cache enabled\n");
}
/*
* Flush the current context from the cache.
*
* This is done by writing to each cache line in the `flush context'
* address space (or, for hardware flush, once to each page in the
* hardware flush space, for all cache pages).
*/
void
sun4_vcache_flush_context(int ctx)
{
char *p;
int i, ls;
vcache_flush_ctx.ev_count++;
p = (char *)0; /* addresses 0..cacheinfo.c_totalsize will do fine */
if (CACHEINFO.c_hwflush) {
ls = PAGE_SIZE;
i = CACHEINFO.c_totalsize >> PGSHIFT;
for (; --i >= 0; p += ls)
sta(p, ASI_HWFLUSHCTX, 0);
} else {
/*
* Flush the current context from the cache.
*
* This is done by writing to each cache line in the `flush context'
* address space (or, for hardware flush, once to each page in the
* hardware flush space, for all cache pages).
*/
void
cache_flush_context()
{
register char *p;
register int i, ls;
cachestats.cs_ncxflush++;
p = (char *)0; /* addresses 0..cacheinfo.c_totalsize will do fine */
if (cacheinfo.c_hwflush) {
ls = NBPG;
i = cacheinfo.c_totalsize >> PGSHIFT;
for (; --i >= 0; p += ls)
sta(p, ASI_HWFLUSHCTX, 0);
} else {
void
swift_cache_enable()
{
int i, ls, ts;
u_int pcr;
cache_alias_dist = max(
CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
CACHEINFO.dc_totalsize / CACHEINFO.dc_associativity);
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
pcr |= (SWIFT_PCR_ICE | SWIFT_PCR_DCE);
sta(SRMMU_PCR, ASI_SRMMU, pcr);
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.ic_linesize;
ts = CACHEINFO.ic_totalsize;
if ((pcr & SWIFT_PCR_ICE) == 0)
for (i = 0; i < ts; i += ls)
sta(i, ASI_ICACHETAG, 0);
ls = CACHEINFO.dc_linesize;
ts = CACHEINFO.dc_totalsize;
if ((pcr & SWIFT_PCR_DCE) == 0)
for (i = 0; i < ts; i += ls) {
sta(i, ASI_DCACHETAG, 0);
while (lda(i, ASI_DCACHETAG))
sta(i, ASI_DCACHETAG, 0);
}
/* XXX - assume that an MS2 with ecache is really a turbo in disguise */
if (CACHEINFO.ec_totalsize == 0)
cpuinfo.flags |= CPUFLG_CACHEPAGETABLES; /* Ok to cache PTEs */
CACHEINFO.c_enabled = 1;
printf("cache enabled\n");
}
void
cypress_cache_enable()
{
int i, ls, ts;
u_int pcr;
cache_alias_dist = CACHEINFO.c_totalsize;
cache_alias_bits = (cache_alias_dist - 1) & ~PGOFSET;
pcr = lda(SRMMU_PCR, ASI_SRMMU);
pcr &= ~(CYPRESS_PCR_CE | CYPRESS_PCR_CM);
/* Now reset cache tag memory if cache not yet enabled */
ls = CACHEINFO.c_linesize;
ts = CACHEINFO.c_totalsize;
if ((pcr & CYPRESS_PCR_CE) == 0)
for (i = 0; i < ts; i += ls) {
sta(i, ASI_DCACHETAG, 0);
while (lda(i, ASI_DCACHETAG))
sta(i, ASI_DCACHETAG, 0);
}
pcr |= CYPRESS_PCR_CE;
#if 1
pcr &= ~CYPRESS_PCR_CM; /* XXX Disable write-back mode */
#else
/* If put in write-back mode, turn it on */
if (CACHEINFO.c_vactype == VAC_WRITEBACK)
pcr |= CYPRESS_PCR_CM;
#endif
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;
printf("cache enabled\n");
}
/*
* Enable the cache.
* We need to clear out the valid bits first.
*/
void
cache_enable()
{
register u_int i, lim, ls, ts;
ls = cacheinfo.c_linesize;
ts = cacheinfo.c_totalsize;
for (i = AC_CACHETAGS, lim = i + ts; i < lim; i += ls)
sta(i, ASI_CONTROL, 0);
stba(AC_SYSENABLE, ASI_CONTROL,
lduba(AC_SYSENABLE, ASI_CONTROL) | SYSEN_CACHE);
cacheinfo.c_enabled = 1;
printf("%d byte (%d/line) write-through %cw flush cache enabled\n",
ts, ls, cacheinfo.c_hwflush ? 'h' : 's');
}
bool
canParseVehicleClasses(const std::string& classes) {
if (classes == "all") {
return true;
}
// check if was previously cached
if (parseVehicleClassesCached.count(classes) != 0) {
return true;
}
StringTokenizer sta(classes, " ");
while (sta.hasNext()) {
if (!SumoVehicleClassStrings.hasString(sta.next())) {
return false;
}
}
return true;
}
SVCPermissions
parseVehicleClasses(const std::string& allowedS) {
if (allowedS == "all") {
return SVCAll;
}
SVCPermissions result = 0;
StringTokenizer sta(allowedS, " ");
while (sta.hasNext()) {
const std::string s = sta.next();
const SUMOVehicleClass vc = getVehicleClassID(s);
const std::string& realName = SumoVehicleClassStrings.getString(vc);
if (realName != s) {
deprecatedVehicleClassesSeen.insert(s);
}
result |= vc;
}
return result;
}
/*----------------------------------------------------------------------------------------------
Ensure that we have a collator.
----------------------------------------------------------------------------------------------*/
void LgIcuCollator::EnsureCollator()
{
if (m_pCollator)
return; // we already have one.
UErrorCode uerr = U_ZERO_ERROR;
if (m_stuLocale.Length() == 0)
{
m_pCollator = Collator::createInstance(uerr);
}
else
{
StrAnsi sta(m_stuLocale.Bstr());
char rgchLoc[128];
int32_t cch = uloc_getName(sta.Chars(), rgchLoc, sizeof(rgchLoc), &uerr);
Assert(cch < 128);
rgchLoc[cch] = 0;
if (U_FAILURE(uerr))
ThrowHr(E_FAIL);
const Locale loc = Locale::createFromName (rgchLoc);
m_pCollator = Collator::createInstance (loc, uerr);
}
if (U_FAILURE(uerr))
ThrowHr(E_FAIL);
}
/*----------------------------------------------------------------------------------------------
Draw the combo control.
----------------------------------------------------------------------------------------------*/
bool IconComboCombo::OnDrawThisItem(DRAWITEMSTRUCT * pdis)
{
AssertPtr(pdis);
AssertPtr(m_pival);
#ifdef JT_4_3_01_IMPLEMENTED
HDC hdc = pdis->hDC;
Rect rc(pdis->rcItem);
UINT state = pdis->itemState;
int ival = *m_pival;
SIZE sizeMargins = { ::GetSystemMetrics(SM_CXEDGE), ::GetSystemMetrics(SM_CYEDGE) };
// Draw the down arrow.
::DrawFrameControl(hdc, &m_rcArrowButton, DFC_SCROLL, DFCS_SCROLLDOWN |
(m_fPushed || (state & ODS_SELECTED) ? DFCS_PUSHED : 0) |
((state & ODS_DISABLED) ? DFCS_INACTIVE : 0));
::DrawEdge(hdc, &rc, EDGE_SUNKEN, BF_RECT);
// Must reduce the size of the "client" area of the button due to edge thickness.
rc.Inflate(-sizeMargins.cx, -sizeMargins.cy);
// This is old code from UiColor.cpp. It may be some help if we get around to implementing
// this control fully.
// Select and realize the palette.
HPALETTE hpalOld = g_ct.RealizePalette(hdc);
// Fill background.
rc.right -= m_rcArrowButton.right - m_rcArrowButton.left;
HPEN hpenOld = (HPEN)::SelectObject(hdc, ::GetStockObject(NULL_PEN));
// HBRUSH hbrBackground = AfGdi::CreateSolidBrush(((state & ODS_DISABLED) ||
// clr == CLR_DEFAULT) ? ::GetSysColor(COLOR_3DFACE) : RGB(255, 255, 255));
HBRUSH hbrBackground = AfGdi::CreateSolidBrush(((state & ODS_DISABLED) ||
clr == CLR_DEFAULT) ? ::GetSysColor(COLOR_3DFACE) : ::GetSysColor(COLOR_WINDOW));
HBRUSH hbrOld = AfGdi::SelectObjectBrush(hdc, hbrBackground);
::Rectangle(hdc, rc.left, rc.top, rc.right + 1, rc.bottom + 1);
// If knNinch or conflicting then leave control blank.
if ((clr != (COLORREF)knNinch) && (clr != (COLORREF)knNinch + 1))
{
// Fill a small box with color.
int nBoxHeight = rc.bottom - rc.top - 4;
RECT rcBox = { rc.left + 2, rc.top + 2, rc.left + 2 + nBoxHeight, rc.bottom - 2 };
if (!m_fShowText)
::SetRect(&rcBox, rc.left + 2, rc.top + 2, rc.right - 2, rc.bottom - 2);
COLORREF clr2 = clr;
if (clr2 == kclrTransparent)
clr2 = ::GetSysColor(COLOR_WINDOW);
// clr2 = kclrWhite;
HBRUSH hbr = AfGdi::CreateSolidBrush(((state & ODS_DISABLED) ||
clr2 == CLR_DEFAULT) ? ::GetSysColor(COLOR_3DFACE) :
PALETTERGB(GetRValue(clr2), GetGValue(clr2), GetBValue(clr2)));
HBRUSH hbrT = AfGdi::SelectObjectBrush(hdc, hbr);
::Rectangle(hdc, rcBox.left, rcBox.top, rcBox.right, rcBox.bottom);
AfGdi::SelectObjectBrush(hdc, hbrT);
::FrameRect(hdc, &rcBox, (HBRUSH)::GetStockObject(BLACK_BRUSH));
AfGdi::DeleteObjectBrush(hbr);
if (hpalOld)
::SelectPalette(hdc, hpalOld, false);
if (m_fShowText)
{
// Write out the text to the right of the box
//COLORREF clrOldBk = ::SetBkColor(hdc, RGB(255,255,255));
COLORREF clrOldBk = ::SetBkColor(hdc, ::GetSysColor(COLOR_WINDOW));
Rect rcT(rcBox.right + 2, rcBox.top - 1, rc.right - 1, rcBox.bottom + 1);
HFONT hfontOld = AfGdi::SelectObjectFont(hdc, ::GetStockObject(DEFAULT_GUI_FONT));
StrAnsi sta(g_ct.GetColorRid(g_ct.GetIndexFromColor(clr)));
::DrawText(hdc, sta.Chars(), -1, &rcT, DT_LEFT);
AfGdi::SelectObjectFont(hdc, hfontOld, AfGdi::OLD);
::SetBkColor(hdc, clrOldBk);
}
}
if (hpenOld)
::SelectObject(hdc, hpenOld);
AfGdi::SelectObjectBrush(hdc, hbrOld, AfGdi::OLD);
AfGdi::DeleteObjectBrush(hbrBackground);
// Draw focus rect
if (state & ODS_FOCUS)
{
Rect rcT;
rcT.Set(rc.left + 1, rc.top + 1, rc.right - 1, rc.bottom - 1);
::DrawFocusRect(hdc, &rcT);
}
#endif JT_4_3_01_IMPLEMENTED
return true;
}
int sc_main (int argc, char **argv)
{
sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", SC_DO_NOTHING);
int NVAL;
if (argc != 2)
{
printf("Use: %s <N>\n", argv[0]);
return 1;
}
NVAL = atoi(argv[1]);
sc_signal<bool> RST_n_tb; /// asynchronous reset
sc_signal<bool> CLEAR_tb; /// synchronous clear port
sc_signal< sc_int<Cbit> > C0_tb;
sc_signal< sc_int<Cbit> > C1_tb;
sc_signal< sc_int<Abit> > A0_tb;
sc_signal< sc_int<Abit> > A1_tb;
sc_signal< sc_int<Abit> > A2_tb;
sc_signal< sc_int<Abit> > A3_tb;
sc_clock CLK("CLK", TB_CLK_PERIOD);
starter sta("sta", TB_CLK_PERIOD, TB_TPD);
data_gen dg("dg", TB_CLK_PERIOD, TB_TPD, NVAL);
data_writer dw("dw", TB_CLK_PERIOD, NVAL);
ACS4 uut("uut", TB_TPD, TB_TCO);
/// starter
sta.CLK(CLK);
sta.RST_n(RST_n_tb);
/// data gen
dg.CLK(CLK);
dg.CLEAR(CLEAR_tb);
dg.C0(C0_tb);
dg.C1(C1_tb);
/// uut
uut.CLK(CLK);
uut.RST_n(RST_n_tb);
uut.CLEAR(CLEAR_tb);
uut.C0(C0_tb);
uut.C1(C1_tb);
uut.A0(A0_tb);
uut.A1(A1_tb);
uut.A2(A2_tb);
uut.A3(A3_tb);
/// write results
dw.CLK(CLK);
dw.A1(A1_tb);
dw.A2(A2_tb);
dw.A3(A3_tb);
dw.A0(A0_tb);
sc_trace_file *tf = sc_create_vcd_trace_file("uut");
((vcd_trace_file*)tf)->sc_set_vcd_time_unit(-9);
sc_trace(tf, CLK, "CLK");
sc_trace(tf, RST_n_tb, "RST_n_tb");
sc_trace(tf, CLEAR_tb, "CLEAR_tb");
sc_trace(tf, C0_tb, "C0_tb");
sc_trace(tf, C1_tb, "C1_tb");
sc_trace(tf, A0_tb, "A0_tb");
sc_trace(tf, A1_tb, "A1_tb");
sc_trace(tf, A2_tb, "A2_tb");
sc_trace(tf, A3_tb, "A3_tb");
sc_start((NVAL+SIM_CYCLES_OFFSET)*TB_CLK_PERIOD, SC_NS);
sc_close_vcd_trace_file(tf);
return 0;
}
/*----------------------------------------------------------------------------------------------
${IActionHandler#BeginUndoTask}
----------------------------------------------------------------------------------------------*/
STDMETHODIMP ActionHandler::BeginUndoTask(BSTR bstrUndo, BSTR bstrRedo)
{
BEGIN_COM_METHOD;
ChkComBstrArgN(bstrUndo);
ChkComBstrArgN(bstrRedo);
if (m_fUndoOrRedoInProgress)
return S_OK;
StrUni stuUndo(bstrUndo);
StrUni stuRedo(bstrRedo);
if (m_nDepth == 0 && !m_fStartedNext)
{
// Outer task.
CleanUpEmptyTasks();
// Don't clear the redo stack until we're sure we have at least one action
// for this task. Instead, just remember the labels and set a flag.
// Clearing the variables here causes the values from stuUndo to be copied below.
m_stuNextUndo.Clear();
m_stuNextRedo.Clear();
m_fStartedNext = true;
m_fDataChangeAction = false;
//::OutputDebugStringA("Begin Undo Task - started next\n");
//StrAnsi sta;
//sta.Format("depth = %d; m_fStartedNext = %d; action %d of %d; seq %d of %d; marks %d%n",
// m_nDepth, m_fStartedNext, m_iuactCurr, m_vquact.Size(), m_iCurrSeq, m_viSeqStart.Size(), m_viMarks.Size());
//::OutputDebugStringA(sta.Chars());
}
// Otherwise, this task will simply be embedded in the outer task.
++m_nDepth;
// However, if this task has labels and the outer one didn't, make use of these labels.
// This can happen, for example, when ContinueUndoTask has to start a new transaction
// because of a prior Un/Redo.
if (m_stuNextUndo.Length() == 0)
{
// TODO JohnT(SharonC): temporary code; remove it when we get this issue straightened out.
if (stuUndo == L"-")
m_stuNextUndo = L"Undo";
else
m_stuNextUndo = stuUndo;
}
if (m_stuNextRedo.Length() == 0)
{
if (stuRedo == L"-")
m_stuNextRedo = L"Redo";
else
m_stuNextRedo = stuRedo;
}
#ifdef DEBUG_ACTION_HANDLER
StrAnsi sta(bstrUndo);
if (sta.Length()) // Skip calls without string (eliminates idle loop calls)
{
sta.Replace(0, 0, "BeginUndoTask: ");
sta.FormatAppend(" m_iCurrSeq=%d, m_viSeqStart=%d, m_iuactCurr=%d, m_vquact=%d, m_viMarks=%d, m_nDepth=%d\n",
m_iCurrSeq, m_viSeqStart.Size(), m_iuactCurr, m_vquact.Size(), m_viMarks.Size(), m_nDepth);
::OutputDebugStringA(sta.Chars());
}
#endif//DEBUG_ACTION_HANDLER
END_COM_METHOD(g_factActh, IID_IActionHandler);
}
