static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel)
{
ASSERT(dev);
switch (channel)
{
case 1:
return stm32_getreg32(dev, STM32_GTIM_CCR1_OFFSET);
case 2:
return stm32_getreg32(dev, STM32_GTIM_CCR2_OFFSET);
case 3:
return stm32_getreg32(dev, STM32_GTIM_CCR3_OFFSET);
case 4:
return stm32_getreg32(dev, STM32_GTIM_CCR4_OFFSET);
}
return ERROR;
}
static uint32_t stm32_cap_getcapture(FAR struct stm32_cap_dev_s *dev, uint8_t channel)
{
const struct stm32_cap_priv_s *priv = (const struct stm32_cap_priv_s *)dev;
uint32_t offset;
DEBUGASSERT(dev != NULL);
switch (channel)
{
case STM32_CAP_CHANNEL_COUNTER:
offset = STM32_GTIM_CNT_OFFSET;
break;
#ifdef HAVE_CH1IN
case 1:
offset = STM32_GTIM_CCR1_OFFSET;
break;
#endif
#ifdef HAVE_CH2IN
case 2:
offset = STM32_GTIM_CCR2_OFFSET;
break;
#endif
#ifdef HAVE_CH3IN
case 3:
offset = STM32_GTIM_CCR3_OFFSET;
break;
#endif
#ifdef HAVE_CH4IN
case 4:
offset = STM32_GTIM_CCR4_OFFSET;
break;
#endif
default:
return ERROR;
}
if (priv->base == STM32_TIM2_BASE || priv->base == STM32_TIM5_BASE)
{
return stm32_getreg32(priv, offset);
}
return stm32_getreg16(priv, offset);
}
