static int aml_bl_update_status(struct backlight_device *bd)
{
struct aml_bl *amlbl = bl_get_data(bd);
int brightness = bd->props.brightness;
#ifdef CONFIG_ARCH_MESON6
static int led_pwm_off = 0;
#endif
DPRINT("%s() brightness=%d\n", __FUNCTION__, brightness);
DPRINT("%s() pdata->set_bl_level=%p\n", __FUNCTION__, amlbl->pdata->set_bl_level);
/*
if (bd->props.power != FB_BLANK_UNBLANK)
brightness = 0;
if (bd->props.fb_blank != FB_BLANK_UNBLANK)
brightness = 0;
*/
if (brightness < 0)
brightness = 0;
else if (brightness > 255)
brightness = 255;
#ifdef CONFIG_ARCH_MESON6
if (led_pwm_off && brightness > 0) {
switch_mod_gate_by_type(MOD_LED_PWM, 1);
led_pwm_off = 0;
}
#endif /* CONFIG_ARCH_MESON6 */
#ifndef CONFIG_MESON_CS_DCDC_REGULATOR
if ((brightness > 0) && (0 == IS_CLK_GATE_ON(VGHL_PWM))) {
CLK_GATE_ON(VGHL_PWM);
DPRINT("%s() CLK_GATE_ON(VGHL_PWM)\n", __FUNCTION__);
}
#endif
if (amlbl->pdata->set_bl_level)
amlbl->pdata->set_bl_level(brightness);
#ifndef CONFIG_MESON_CS_DCDC_REGULATOR
if ((brightness == 0) && (IS_CLK_GATE_ON(VGHL_PWM))) {
CLK_GATE_OFF(VGHL_PWM);
DPRINT("%s() CLK_GATE_OFF(VGHL_PWM)\n", __FUNCTION__);
}
#endif
#ifdef CONFIG_ARCH_MESON6
if (brightness == 0) {
switch_mod_gate_by_type(MOD_LED_PWM, 0);
led_pwm_off = 1;
}
#endif /* CONFIG_ARCH_MESON6 */
return 0;
}
void tsdemux_release(void)
{
WRITE_MPEG_REG(PARSER_INT_ENABLE, 0);
WRITE_MPEG_REG(PARSER_VIDEO_HOLE, 0);
WRITE_MPEG_REG(PARSER_AUDIO_HOLE, 0);
free_irq(INT_PARSER, (void *)tsdemux_fetch_id);
#ifndef ENABLE_DEMUX_DRIVER
WRITE_MPEG_REG(STB_INT_MASK, 0);
free_irq(INT_DEMUX, (void *)tsdemux_irq_id);
#else
tsdemux_set_aid(0xffff);
tsdemux_set_vid(0xffff);
tsdemux_set_sid(0xffff);
tsdemux_free_irq();
#endif
pts_stop(PTS_TYPE_VIDEO);
pts_stop(PTS_TYPE_AUDIO);
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_DEMUX, 0);
#endif
}
static int audiodsp_open(struct inode *node, struct file *file)
{
DSP_PRNT("dsp_open\n");
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_MEDIA_CPU, 1);
/* Audio DSP firmware uses mailbox registers for communications
* with host processor. And these mailbox registers unfortunately
* falls into the assistant module, which is in vdec DOS clock domain.
* So we have to make sure the clock domain is enabled/disabled when
* audio firmware start/stop running.
* Note the module_gating has ref count so a flag 0 does
* not mean the vdec clock is gated off immediately.
*/
switch_mod_gate_by_type(MOD_VDEC, 1);
#endif
audiodsp_prevent_sleep();
return 0;
}
void sd_open(struct memory_card *card)
{
int ret;
struct aml_card_info *aml_card_info = card->card_plat_info;
SD_MMC_Card_Info_t *sd_mmc_info = (SD_MMC_Card_Info_t *)card->card_info;
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,1);
#endif
if (aml_card_info->card_extern_init)
aml_card_info->card_extern_init();
ret = sd_mmc_init(sd_mmc_info);
if(ret)
ret = sd_mmc_init(sd_mmc_info);
if(ret)
ret = sd_mmc_init(sd_mmc_info);
card->capacity = sd_mmc_info->blk_nums;
card->sdio_funcs = sd_mmc_info->sdio_function_nums;
memcpy(card->raw_cid, &(sd_mmc_info->raw_cid), sizeof(card->raw_cid));
if(sd_mmc_info->write_protected_flag)
card->state |= CARD_STATE_READONLY;
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,0);
#endif
if(ret)
card->unit_state = CARD_UNIT_READY;
else
card->unit_state = CARD_UNIT_PROCESSED;
return;
}
s32 tsdemux_init(u32 vid, u32 aid, u32 sid, u32 pcrid, bool is_hevc)
{
s32 r;
u32 parser_sub_start_ptr;
u32 parser_sub_end_ptr;
u32 parser_sub_rp;
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_DEMUX, 1);
#endif
parser_sub_start_ptr = READ_MPEG_REG(PARSER_SUB_START_PTR);
parser_sub_end_ptr = READ_MPEG_REG(PARSER_SUB_END_PTR);
parser_sub_rp = READ_MPEG_REG(PARSER_SUB_RP);
WRITE_MPEG_REG(RESET1_REGISTER, RESET_PARSER);
#ifdef ENABLE_DEMUX_DRIVER
tsdemux_reset();
#else
WRITE_MPEG_REG(RESET1_REGISTER, RESET_PARSER | RESET_DEMUXSTB);
WRITE_MPEG_REG(STB_TOP_CONFIG, 0);
WRITE_MPEG_REG(DEMUX_CONTROL, 0);
#endif
/* set PID filter */
printk("tsdemux video_pid = 0x%x, audio_pid = 0x%x, sub_pid = 0x%x, pcrid = 0x%x\n",
vid, aid, sid, pcr_pid);
#ifndef ENABLE_DEMUX_DRIVER
WRITE_MPEG_REG(FM_WR_DATA,
(((vid & 0x1fff) | (VIDEO_PACKET << 13)) << 16) |
((aid & 0x1fff) | (AUDIO_PACKET << 13)));
WRITE_MPEG_REG(FM_WR_ADDR, 0x8000);
while (READ_MPEG_REG(FM_WR_ADDR) & 0x8000) {
;
}
WRITE_MPEG_REG(FM_WR_DATA,
(((sid & 0x1fff) | (SUB_PACKET << 13)) << 16) | 0xffff);
WRITE_MPEG_REG(FM_WR_ADDR, 0x8001);
while (READ_MPEG_REG(FM_WR_ADDR) & 0x8000) {
;
}
WRITE_MPEG_REG(MAX_FM_COMP_ADDR, 1);
WRITE_MPEG_REG(STB_INT_MASK, 0);
WRITE_MPEG_REG(STB_INT_STATUS, 0xffff);
/* TS data path */
WRITE_MPEG_REG(FEC_INPUT_CONTROL, 0x7000);
WRITE_MPEG_REG(DEMUX_MEM_REQ_EN,
(1 << VIDEO_PACKET) |
(1 << AUDIO_PACKET) |
(1 << SUB_PACKET));
WRITE_MPEG_REG(DEMUX_ENDIAN,
(7 << OTHER_ENDIAN) |
(7 << BYPASS_ENDIAN) |
(0 << SECTION_ENDIAN));
WRITE_MPEG_REG(TS_HIU_CTL, 1 << USE_HI_BSF_INTERFACE);
WRITE_MPEG_REG(TS_FILE_CONFIG,
(demux_skipbyte << 16) |
(6 << DES_OUT_DLY) |
(3 << TRANSPORT_SCRAMBLING_CONTROL_ODD) |
(1 << TS_HIU_ENABLE) |
(4 << FEC_FILE_CLK_DIV));
/* enable TS demux */
WRITE_MPEG_REG(DEMUX_CONTROL, (1 << STB_DEMUX_ENABLE) | (1 << KEEP_DUPLICATE_PACKAGE));
#endif
if (fetchbuf == 0) {
printk("%s: no fetchbuf\n", __FUNCTION__);
return -ENOMEM;
}
/* hook stream buffer with PARSER */
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
if (HAS_HEVC_VDEC && is_hevc) {
WRITE_MPEG_REG(PARSER_VIDEO_START_PTR,
READ_VREG(HEVC_STREAM_START_ADDR));
WRITE_MPEG_REG(PARSER_VIDEO_END_PTR,
READ_VREG(HEVC_STREAM_END_ADDR) - 8);
CLEAR_MPEG_REG_MASK(PARSER_ES_CONTROL, ES_VID_MAN_RD_PTR);
WRITE_VREG(DOS_GEN_CTRL0, 3<<1); // set vififo_vbuf_rp_sel=>hevc
SET_VREG_MASK(HEVC_STREAM_CONTROL, (1<<3)|(0<<4)); // set use_parser_vbuf_wp
SET_VREG_MASK(HEVC_STREAM_CONTROL, 1); // set stream_fetch_enable
SET_VREG_MASK(HEVC_STREAM_FIFO_CTL, (1<<29)); // set stream_buffer_hole with 256 bytes
} else
#endif
{
WRITE_MPEG_REG(PARSER_VIDEO_START_PTR,
READ_VREG(VLD_MEM_VIFIFO_START_PTR));
WRITE_MPEG_REG(PARSER_VIDEO_END_PTR,
READ_VREG(VLD_MEM_VIFIFO_END_PTR));
CLEAR_MPEG_REG_MASK(PARSER_ES_CONTROL, ES_VID_MAN_RD_PTR);
WRITE_VREG(VLD_MEM_VIFIFO_BUF_CNTL, MEM_BUFCTRL_INIT);
CLEAR_VREG_MASK(VLD_MEM_VIFIFO_BUF_CNTL, MEM_BUFCTRL_INIT);
if (HAS_HEVC_VDEC) {
WRITE_VREG(DOS_GEN_CTRL0, 0); // set vififo_vbuf_rp_sel=>vdec
}
}
WRITE_MPEG_REG(PARSER_AUDIO_START_PTR,
READ_MPEG_REG(AIU_MEM_AIFIFO_START_PTR));
WRITE_MPEG_REG(PARSER_AUDIO_END_PTR,
READ_MPEG_REG(AIU_MEM_AIFIFO_END_PTR));
CLEAR_MPEG_REG_MASK(PARSER_ES_CONTROL, ES_AUD_MAN_RD_PTR);
WRITE_MPEG_REG(PARSER_CONFIG,
(10 << PS_CFG_PFIFO_EMPTY_CNT_BIT) |
(1 << PS_CFG_MAX_ES_WR_CYCLE_BIT) |
(16 << PS_CFG_MAX_FETCH_CYCLE_BIT));
WRITE_MPEG_REG(AIU_MEM_AIFIFO_BUF_CNTL, MEM_BUFCTRL_INIT);
CLEAR_MPEG_REG_MASK(AIU_MEM_AIFIFO_BUF_CNTL, MEM_BUFCTRL_INIT);
WRITE_MPEG_REG(PARSER_SUB_START_PTR, parser_sub_start_ptr);
WRITE_MPEG_REG(PARSER_SUB_END_PTR, parser_sub_end_ptr);
WRITE_MPEG_REG(PARSER_SUB_RP, parser_sub_rp);
SET_MPEG_REG_MASK(PARSER_ES_CONTROL, (7 << ES_SUB_WR_ENDIAN_BIT) | ES_SUB_MAN_RD_PTR);
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
if (HAS_HEVC_VDEC)
r = pts_start((is_hevc) ? PTS_TYPE_HEVC : PTS_TYPE_VIDEO);
else
#endif
r = pts_start(PTS_TYPE_VIDEO);
if (r < 0) {
printk("Video pts start failed.(%d)\n", r);
goto err1;
}
if ((r = pts_start(PTS_TYPE_AUDIO)) < 0) {
printk("Audio pts start failed.(%d)\n", r);
goto err2;
}
r = request_irq(INT_PARSER, parser_isr,
IRQF_SHARED, "tsdemux-fetch",
(void *)tsdemux_fetch_id);
if (r) {
goto err3;
}
WRITE_MPEG_REG(PARSER_INT_STATUS, 0xffff);
WRITE_MPEG_REG(PARSER_INT_ENABLE, PARSER_INTSTAT_FETCH_CMD << PARSER_INT_HOST_EN_BIT);
WRITE_MPEG_REG(PARSER_VIDEO_HOLE, 0x400);
WRITE_MPEG_REG(PARSER_AUDIO_HOLE, 0x400);
discontinued_counter = 0;
#ifndef ENABLE_DEMUX_DRIVER
r = request_irq(INT_DEMUX, tsdemux_isr,
IRQF_SHARED, "tsdemux-irq",
(void *)tsdemux_irq_id);
WRITE_MPEG_REG(STB_INT_MASK,
(1 << SUB_PES_READY)
| (1 << NEW_PDTS_READY)
| (1 << DIS_CONTINUITY_PACKET));
if (r) {
goto err4;
}
#else
tsdemux_config();
tsdemux_request_irq(tsdemux_isr, (void *)tsdemux_irq_id);
if (vid < 0x1FFF) {
curr_vid_id = vid;
tsdemux_set_vid(vid);
}
if (aid < 0x1FFF) {
curr_aud_id = aid;
tsdemux_set_aid(aid);
}
if (sid < 0x1FFF) {
curr_sub_id = sid;
tsdemux_set_sid(sid);
}
curr_pcr_id = pcr_pid;
if ((pcr_pid < 0x1FFF) && (pcr_pid != vid) && (pcr_pid != aid) && (pcr_pid != sid)) {
tsdemux_set_pcrid(pcr_pid);
}
#endif
reset_pcr_regs();
first_pcr = 0;
pcrscr_valid=1;
return 0;
#ifndef ENABLE_DEMUX_DRIVER
err4:
free_irq(INT_PARSER, (void *)tsdemux_fetch_id);
#endif
err3:
pts_stop(PTS_TYPE_AUDIO);
err2:
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
if (HAS_HEVC_VDEC)
pts_stop((is_hevc) ? PTS_TYPE_HEVC : PTS_TYPE_VIDEO);
else
#endif
pts_stop(PTS_TYPE_VIDEO);
err1:
printk("TS Demux init failed.\n");
return -ENOENT;
}
static int sdio_request(struct memory_card *card, struct card_blk_request *brq)
{
SD_MMC_Card_Info_t *sdio_info = (SD_MMC_Card_Info_t *)card->card_info;
int incr_addr, err;
unsigned addr, blocks, blksz, fn, read_after_write;
u8 *in, *out, *buf;
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,1);
#endif
//set_cpus_allowed_ptr(current, cpumask_of(0));
sd_sdio_enable(sdio_info->io_pad_type);
if (brq->crq.cmd & SDIO_OPS_REG) {
WARN_ON(brq->card_data.blk_size != 1);
WARN_ON(brq->card_data.blk_nums != 1);
in = brq->crq.buf;
addr = brq->card_data.lba;
fn = brq->card_data.flags;
out = brq->crq.back_buf;
if (brq->crq.cmd & READ_AFTER_WRITE)
read_after_write = 1;
else
read_after_write = 0;
if ((brq->crq.cmd & 0x1 )== WRITE) {
err = sdio_write_reg(sdio_info, fn, addr, in, read_after_write);
if (err) {
printk("sdio card write_reg failed %d at addr: %x \n", err, addr);
brq->card_data.error = err;
goto err;
}
}
else {
err = sdio_read_reg(sdio_info, fn, addr, out);
if (err) {
printk("sdio card read_reg failed %d at addr: %x \n", err, addr);
brq->card_data.error = err;
goto err;
}
}
}
else {
if (brq->crq.cmd & SDIO_FIFO_ADDR)
incr_addr = 1;
else
incr_addr = 0;
buf = brq->crq.buf;
addr = brq->card_data.lba;
blksz = brq->card_data.blk_size;
blocks = brq->card_data.blk_nums;
fn = brq->card_data.flags;
sdio_info->sdio_blk_len[fn] = card->sdio_func[fn-1]->cur_blksize;
if ((brq->crq.cmd & 0x1)== WRITE) {
err = sdio_write_data(sdio_info, fn, incr_addr, addr, blocks*blksz, buf);
if (err) {
printk("sdio card write_data failed %d at addr: %x, function: %d \n", err, addr, fn);
brq->card_data.error = err;
goto err;
}
}
else {
err = sdio_read_data(sdio_info, fn, incr_addr, addr, blocks*blksz, buf);
if (err) {
printk("sdio card read_data failed %d at addr: %x, function: %d\n", err, addr, fn);
brq->card_data.error = err;
goto err;
}
}
}
//sd_gpio_enable(sdio_info->io_pad_type);
brq->card_data.error = 0;
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,0);
#endif
return 0;
err:
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,0);
#endif
//sd_gpio_enable(sdio_info->io_pad_type);
return err;
}
static int sd_request(struct memory_card *card, struct card_blk_request *brq)
{
SD_MMC_Card_Info_t *sd_mmc_info = (SD_MMC_Card_Info_t *)card->card_info;
unsigned int lba, byte_cnt,ret;
unsigned char *data_buf;
struct card_host *host = card->host;
struct memory_card *sdio_card;
SD_MMC_Card_Info_t *sdio_info;
lba = brq->card_data.lba;
byte_cnt = brq->card_data.blk_size * brq->card_data.blk_nums;
data_buf = brq->crq.buf;
if(sd_mmc_info == NULL){
brq->card_data.error = SD_MMC_ERROR_NO_CARD_INS;
printk("[sd_request] sd_mmc_info == NULL, return SD_MMC_ERROR_NO_CARD_INS\n");
return 0;
}
if(!sd_mmc_info->blk_len){
card->card_io_init(card);
card->card_detector(card);
if(card->card_status == CARD_REMOVED){
brq->card_data.error = SD_MMC_ERROR_NO_CARD_INS;
return 0;
}
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,1);
#endif
ret = sd_mmc_init(sd_mmc_info);
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,0);
#endif
if(ret){
brq->card_data.error = SD_MMC_ERROR_NO_CARD_INS;
return 0;
}
}
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,1);
#endif
sdio_card = card_find_card(host, CARD_SDIO);
if (sdio_card) {
sdio_close_host_interrupt(SDIO_IF_INT);
sdio_info = (SD_MMC_Card_Info_t *)sdio_card->card_info;
sd_gpio_enable(sdio_info->io_pad_type);
}
sd_sdio_enable(sd_mmc_info->io_pad_type);
if(brq->crq.cmd == READ) {
brq->card_data.error = sd_mmc_read_data(sd_mmc_info, lba, byte_cnt, data_buf);
}
else if(brq->crq.cmd == WRITE) {
brq->card_data.error = sd_mmc_write_data(sd_mmc_info, lba, byte_cnt, data_buf);
}
sd_gpio_enable(sd_mmc_info->io_pad_type);
if(brq->card_data.error == SD_WAIT_FOR_COMPLETION_TIMEOUT)
{
printk("[sd_request] wait for completion timeout, reinit\n");
card->card_io_init(card);
card->card_detector(card);
if(card->card_status == CARD_REMOVED){
printk("[sd_request] card removed\n");
brq->card_data.error = SD_MMC_ERROR_NO_CARD_INS;
return 0;
}
sd_mmc_staff_init(sd_mmc_info);
ret = sd_mmc_init(sd_mmc_info);
if(ret){
printk("[sd_request] reinit fail %d\n", ret);
brq->card_data.error = SD_MMC_ERROR_NO_CARD_INS;
return 0;
}
sd_sdio_enable(sd_mmc_info->io_pad_type);
if(brq->crq.cmd == READ) {
brq->card_data.error = sd_mmc_read_data(sd_mmc_info, lba, byte_cnt, data_buf);
}
else if(brq->crq.cmd == WRITE) {
brq->card_data.error = sd_mmc_write_data(sd_mmc_info, lba, byte_cnt, data_buf);
}
sd_gpio_enable(sd_mmc_info->io_pad_type);
if(brq->card_data.error == SD_WAIT_FOR_COMPLETION_TIMEOUT)
printk("[sd_request] after reinit still error \n");
}
sdio_card = card_find_card(host, CARD_SDIO);
if(sdio_card) {
sdio_info = (SD_MMC_Card_Info_t *)sdio_card->card_info;
sd_sdio_enable(sdio_info->io_pad_type);
if (sdio_info->sd_save_hw_io_flag) {
WRITE_CBUS_REG(SDIO_CONFIG, sdio_info->sd_save_hw_io_config);
WRITE_CBUS_REG(SDIO_MULT_CONFIG, sdio_info->sd_save_hw_io_mult_config);
}
sdio_open_host_interrupt(SDIO_IF_INT);
}
#if MESON_CPU_TYPE == MESON_CPU_TYPE_MESON6
switch_mod_gate_by_type(MOD_SDIO,0);
#endif
return 0;
}
