/* init: just calculate address offset */
int
adc1182init(unsigned int *addr, int nboards)
{
int ii, res;
unsigned int laddr;
n1182 = 0;
for(ii=0; ii<nboards; ii++)
{
#ifdef VXWORKS
res = sysBusToLocalAdrs(0x39,(char *)addr[ii],(char **)&laddr);
if(res != 0)
{
printf("adc1182init: ERROR in sysBusToLocalAdrs(0x39,0x%x,&laddr) \n",addr[ii]);
return(ERROR);
}
#else
res = vmeBusToLocalAdrs(0x39,(char *)addr[ii],(char **)&laddr);
if (res != 0)
{
printf("adc1182init: ERROR in vmeBusToLocalAdrs(0x39,0x%x,&laddr) \n",addr[ii]);
return(ERROR);
}
#endif
printf("ADC1182 board %d at vme address 0x%08x\n",n1182,(unsigned int)laddr);
vmeaddress[n1182++] = (unsigned int)laddr;
}
return(n1182);
}
/*------------------------------------------------------------------*/
int vxworks_mmap(MVME_INTERFACE *mvme, mvme_addr_t vme_addr, mvme_size_t n_bytes)
{
int status;
int j;
VME_TABLE *table;
table = (VME_TABLE *) mvme->table;
/* Find new slot */
j=0;
while (table[j].valid) j++;
if (j < MAX_VME_SLOTS) {
/* Create a new window */
table[j].low = vme_addr;
table[j].am = ((mvme->am == 0) ? MVME_AM_DEFAULT : mvme->am);
table[j].nbytes = n_bytes;
status = sysBusToLocalAdrs(VME_AM_STD_USR_DATA, (char *)table[j].low, (char **)&(table[j].ptr));
if (status == ERROR) {
memset(&table[j], 0, sizeof(VME_TABLE));
return(MVME_ACCESS_ERROR);
}
table[j].valid = 1;
table[j].high = (table[j].low + table[j].nbytes);
}
else {
/* No more slot available */
return(MVME_ACCESS_ERROR);
}
return(MVME_SUCCESS);
}
IPAC *
ipacMv162Create(IpacSocket socket)
{
int i;
char *str;
char *bytadr;
char tstchr;
IPAC *ipac;
#ifdef IPC_CARRIER
sysBusToLocalAdrs(VME_AM_SUP_SHORT_IO,GS_CARRIER,&IPIC_BASE);
#endif
#ifndef IPC_CARRIER
for (i=0, bytadr=(char *)IPIC_CSR; i<0x20; i++) {
if (vxMemProbe(bytadr, VX_READ, 1, &tstchr) == ERROR) {
printf("ipacMv162Create(): IPIC chip not found\n");
return NULL;
}
}
#else
bytadr= (char *) (IPIC_BASE + socket * 0x100);
if (vxMemProbe(bytadr, VX_READ, 1, &tstchr) == ERROR) {
return NULL;
}
#endif
/* succeeded fill out the structure */
ipac = (IPAC *)malloc(sizeof(IPAC));
if (!ipac) {
errLogSysRet(LOGIT, debugInfo,
"ipacMv162Create(): malloc failed:");
return NULL;
}
ipac->host = IPAC_HOST_MV162;
ipac->socket = socket;
ipac->ioaddr = IPIC_BASE + socket * 0x100;
ipac->idaddr = ipac->ioaddr + 0x80;
/* Check for presence of Industry Pack */
/* Validate CSR addresses - 162 on board....*/
/* Validate I/O and ID addresses */
for (i=0, bytadr=(char *)ipac->ioaddr; i<0xc0; i++) {
if (vxMemProbe(bytadr, VX_READ, 1, &tstchr) == ERROR) {
printf("ipacMv162Create(): Industry Pack I/O space not found\n");
free(ipac);
return NULL;
}
}
/* Check ID in the Industry Pack PROM */
if (strcmp((str=ipacId(ipac)), "IPAC") != 0) {
printf("ipacMv162Create(): Industry Pack ID invalid: \"%s\"\n", str);
ipacDelete(ipac);
return NULL;
}
return ipac;
}
/* input: SystemName - name we assigned to mainframe (arbitrary)
LinkType - LINKTYPE_CAENET for sy527
Arg - sy527_VMEADDRESS_CRATE#
UserName - irrelevant here
Passwd - irrelevant here
*/
int
CAENHVInitSystem(const char *SystemName, int LinkType, void *Arg,
const char *UserName, const char *Passwd)
{
int i, addr;
char arg1[256], arg2[256], arg3[256];
char *ch1, *ch2;
if(LinkType != LINKTYPE_CAENET) return(CAENHV_SYSERR);
/* search for empty slot */
for(i=0; i<MAX_HVPS; i++)
{
if(sy527[i].vmeaddr == 0) /* empty, will use it */
{
sy527[i].id = i;
strcpy(sy527[i].name,SystemName);
ch1 = (char *)Arg;
ch2 = arg1;
while(*ch1 != '_') *ch2++ = *ch1++;
*ch2 = '\0';
ch1++;
ch2 = arg2;
while(*ch1 != '_') *ch2++ = *ch1++;
*ch2 = '\0';
ch1++;
ch2 = arg3;
while(*ch1 != '\0') *ch2++ = *ch1++;
*ch2 = '\0';
/*printf("CAENHVInitSystem: arg's -> >%s< >%s< >%s<\n",arg1,arg2,arg3);*/
strcpy(sy527[i].type,arg1);
addr = strtol(arg2, (char **)NULL, 0); /*0x7fffffff max!!??*/
#ifdef VXWORKS
sysBusToLocalAdrs(0x39, addr, (char **)&sy527[i].vmeaddr);
#else
vmeBusToLocalAdrs(0x39, addr, (char **)&sy527[i].vmeaddr);
#endif
sy527[i].CrNum = strtol(arg3, (char **)NULL, 0);
/*
printf("CAENHVInitSystem: decode's -> >%s< 0x%08x %d\n",
sy527[i].type,sy527[i].vmeaddr,sy527[i].CrNum);
*/
return(CAENHV_OK);
}
}
return(CAENHV_SYSERR); /* no empty slots */
}
int
v851Init(unsigned long addr, int id)
{
int res;
UINT32 boardID=0;
if (addr == 0)
{
/* Use default */
v851p[id] = (struct v851_struct *)V851_BASE_ADDR;
}
else if ((addr>0)&&(addr<0xffff))
{
/* A16 Local address - find translation */
#ifdef VXWORKS
res = sysBusToLocalAdrs(0x29,(char *)addr,(char **)&v851p[id]);
if (res != 0)
{
printf("v851Init: ERROR in sysBusToLocalAdrs(0x29,0x%x,&laddr) \n",(int)addr);
return(ERROR);
}
#else
res = vmeBusToLocalAdrs(0x29,(char *)addr,(char **)&v851p[id]);
if (res != 0)
{
printf("v851Init: ERROR in vmeBusToLocalAdrs(0x29,0x%x,&laddr) \n",(int)addr);
return(ERROR);
}
#endif
}
else
{
/* NO TRANSLATION */
v851p[id] = (struct v851_struct *)addr;
}
boardID = vmeRead16(&v851p[id]->id);
#ifdef SP_DEBUG
printf(" ModuleID = (0x%x) , address = 0x%x\n",boardID,(int)v851p[id]);
#endif
if(boardID != V851_MODULE_ID) {
printf("v851Init: ERROR: Invalid Module ID (0x%x) at address 0x%x\n",
boardID,(int)v851p[id]);
v851p[id]=0;
return(ERROR);
}
/* Initialize Control Register and readback variable */
v851ControlReg = V851_CONTROL_DISARM;
vmeWrite16(&v851p[id]->control,v851ControlReg);
return(OK);
}
/*
* vxDevMapAddr ()
*/
static long vxDevMapAddr (epicsAddressType addrType, unsigned options,
size_t logicalAddress, size_t size, volatile void **ppPhysicalAddress)
{
long status;
if (ppPhysicalAddress==NULL) {
return S_dev_badArgument;
}
if (EPICStovxWorksAddrType[addrType] == EPICSAddrTypeNoConvert)
{
*ppPhysicalAddress = (void *) logicalAddress;
}
else
{
status = sysBusToLocalAdrs (EPICStovxWorksAddrType[addrType],
(char *) logicalAddress, (char **)ppPhysicalAddress);
if (status) {
return S_dev_addrMapFail;
}
}
return 0;
}
ADC_ID adcCreate(char* baseAddr,int vector,int level)
/* char* baseAddr - base address of ADC */
/* int vector - VME Interrupt vector number */
/* int level - VME Interrupt level */
{
char sr;
/* ------- malloc space for adc Object --------- */
if ( (adcObj = (ADC_OBJ *) malloc( sizeof(ADC_OBJ) ) ) == NULL )
{
LOGMSG(ALL_PORTS,ERROR,"adcCreate: ");
return(NULL);
}
/* zero out structure so we don't free something by mistake */
memset(adcObj,0,sizeof(ADC_OBJ));
/* ------ Translate Bus address to CPU Board local address ----- */
if (sysBusToLocalAdrs(VME_AM_SUP_SHORT_IO,
baseAddr,&(adcObj->adcBaseAddr)) == -1)
{
LOGMSG(ALL_PORTS,ERROR,"adcCreate: ");
free(adcObj);
return(NULL);
}
/* ------ Test for Boards Presents ---------- */
if ( vxMemProbe((char*) (adcObj->adcBaseAddr + ADC_SR),
VX_READ, BYTE, &sr) == ERROR)
{
LOGMSG(ALL_PORTS,OK,"adcCreate: Could not read ADC's Status register\n");
free(adcObj);
return(NULL);
}
else
{
adcObj->adcBrdVersion = (sr >> 4) & 0x0f;
LOGMSG1(ALL_PORTS,OK,"adcCreate: ADC Board Version %d present.\n",
adcObj->adcBrdVersion);
}
adcObj->pSemAdcStateChg = semBCreate(SEM_Q_FIFO,SEM_EMPTY);
adcObj->pAdcMutex = semMCreate(SEM_Q_PRIORITY |
SEM_INVERSION_SAFE |
SEM_DELETE_SAFE);
pSemAdcOvrFlow = semCCreate(SEM_Q_FIFO,SEM_EMPTY);
if ( (adcObj->pSemAdcStateChg == NULL) ||
(adcObj->pAdcMutex == NULL) ||
(pSemAdcOvrFlow == NULL) )
{
LOGMSG(ALL_PORTS,ERROR,"adcCreate: ");
if (adcObj->pSemAdcStateChg != NULL)
semDelete(adcObj->pSemAdcStateChg);
if (adcObj->pAdcMutex != NULL)
semDelete(adcObj->pAdcMutex);
if (pSemAdcOvrFlow != NULL)
semDelete(pSemAdcOvrFlow);
return(NULL);
}
if ( (vector < MIN_VME_ITRP_VEC) || (vector > MAX_VME_ITRP_VEC) )
{
LOGMSG3(ALL_PORTS,OK,"adcCreate: vector: 0x%x out of bounds (0x%x-0x%x)\n",
vector,MIN_VME_ITRP_VEC,MAX_VME_ITRP_VEC);
semDelete(adcObj->pSemAdcStateChg);
semDelete(adcObj->pAdcMutex);
free(adcObj);
return(NULL);
}
else
{
adcObj->vmeItrVector = vector;
}
if ( (level >= MIN_VME_ITRP_LEVEL) && (level <= MAX_VME_ITRP_LEVEL) )
{
adcObj->vmeItrLevel = level;
}
else
{
LOGMSG3(ALL_PORTS,OK,"stmCreate: vme level: %d out of bounds (%d-%d)\n",
level,MIN_VME_ITRP_LEVEL,MAX_VME_ITRP_LEVEL);
semDelete(adcObj->pSemAdcStateChg);
semDelete(adcObj->pAdcMutex);
free(adcObj);
return(NULL);
}
adcObj->adcControl = 0;
adcObj->adcState = OK;
/*
intConnect( INUM_TO_IVEC( adcObj->vmeItrVector ), semGive, pSemAdcOvrFlow);
*/
/* Spawn the Interrupt Service Tasks */
/*
taskSpawn("tAdcOvrFlow", ADC_FULL_IST_PRIORTY, ADC_IST_TASK_OPTIONS,
ADC_IST_STACK_SIZE, adcOvrFlow, adcObj, ARG2,
ARG3,ARG4,ARG5,ARG6,ARG7,ARG8,ARG9,ARG10);
*/
return( adcObj );
}
STATUS
c792Init (UINT32 addr, UINT32 addr_inc, int nadc, UINT16 crateID)
{
int ii, res, rdata, errFlag = 0;
int boardID = 0;
unsigned long laddr, lladdr;
volatile struct c792_ROM_struct *rp;
/* Check for valid address */
if(addr==0) {
printf("c792Init: ERROR: Must specify a Bus (VME-based A32/A24) address for QDC 0\n");
return(ERROR);
}else if(addr < 0x00ffffff) { /* A24 Addressing */
if((addr_inc==0)||(nadc==0))
nadc = 1; /* assume only one QDC to initialize */
/* get the QDCs address */
#ifdef VXWORKS
res = sysBusToLocalAdrs(0x39,(char *)addr,(char **)&laddr);
if (res != 0) {
printf("c792Init: ERROR in sysBusToLocalAdrs(0x39,0x%x,&laddr) \n",addr);
return(ERROR);
}
#else
res = vmeBusToLocalAdrs(0x39,(char *)addr,(char **)&laddr);
if (res != 0) {
printf("c792Init: ERROR in vmeBusToLocalAdrs(0x39,0x%x,&laddr) \n",addr);
return(ERROR);
}
#endif
c792MemOffset = laddr - addr;
}else{ /* A32 Addressing */
if((addr_inc==0)||(nadc==0))
nadc = 1; /* assume only one QDC to initialize */
/* get the QDC address */
#ifdef VXWORKS
res = sysBusToLocalAdrs(0x09,(char *)addr,(char **)&laddr);
if (res != 0) {
printf("c792Init: ERROR in sysBusToLocalAdrs(0x09,0x%x,&laddr) \n",addr);
return(ERROR);
}
#else
res = vmeBusToLocalAdrs(0x09,(char *)addr,(char **)&laddr);
if (res != 0) {
printf("c792Init: ERROR in vmeBusToLocalAdrs(0x09,0x%x,&laddr) \n",addr);
return(ERROR);
}
#endif
c792MemOffset = laddr - addr;
}
lladdr = laddr;
Nc792 = 0;
for (ii=0;ii<nadc;ii++)
{
c792p[ii] = (struct c792_struct *)(laddr + ii*addr_inc);
c792pl[ii] = (struct c792_struct *)(lladdr + ii*addr_inc);
/* Check if Board exists at that address */
#ifdef VXWORKS
res = vxMemProbe((char *) &(c792p[ii]->rev),0,2,(char *)&rdata);
#else
res = vmeMemProbe((char *) &(c792p[ii]->rev),2,(char *)&rdata);
#endif
if(res < 0)
{
printf("c792Init: ERROR: No addressable board at addr=0x%x\n",(UINT32) c792p[ii]);
c792p[ii] = NULL;
/*sergey: errFlag = 1;*/
break;
}
else
{
/* Check if this is a Model 792 */
rp = (struct c792_ROM_struct *)((UINT32)c792p[ii] + C792_ROM_OFFSET);
boardID = ((c792Read(&rp->ID_3)&(0xff))<<16) +
((c792Read(&rp->ID_2)&(0xff))<<8) + (c792Read(&rp->ID_1)&(0xff));
/* set 1 for tdc, 2 for adc */
if(boardID == C775_BOARD_ID) use792[Nc792] = 1;
else if(boardID == C792_BOARD_ID) use792[Nc792] = 2;
else
{
printf(" ERROR: Board ID does not match: %d \n",boardID);
return(ERROR);
}
}
Nc792++;
#ifdef VXWORKS
printf("Initialized QDC ID %d at address 0x%08x \n",ii,(UINT32) c792p[ii]);
#else
printf("Initialized QDC ID %d at VME (USER) address 0x%08x (0x%08x) \n",ii,
(UINT32)(c792p[ii]) - c792MemOffset, (UINT32) c792p[ii]);
#endif
}
#ifdef VXWORKS
/* Initialize/Create Semephore */
if(c792Sem != 0) {
semFlush(c792Sem);
semDelete(c792Sem);
}
c792Sem = semBCreate(SEM_Q_PRIORITY,SEM_EMPTY);
if(c792Sem <= 0) {
printf("c792Init: ERROR: Unable to create Binary Semephore\n");
return(ERROR);
}
#endif
/* Disable/Clear all QDCs */
for(ii=0;ii<Nc792;ii++) {
C792_EXEC_SOFT_RESET(ii);
C792_EXEC_DATA_RESET(ii);
c792Write(&c792p[ii]->intLevel,0); /* Disable Interrupts */
c792Write(&c792p[ii]->evTrigger,0); /* Zero interrupt trigger count */
c792Write(&c792p[ii]->crateSelect,crateID); /* Set Crate ID Register */
c792Write(&c792p[ii]->bitClear2,C792_INCR_ALL_TRIG); /* Increment event count only on
accepted gates */
c792EventCount[ii] = 0; /* Initialize the Event Count */
c792EvtReadCnt[ii] = -1; /* Initialize the Read Count */
}
/* Initialize Interrupt variables */
c792IntID = -1;
c792IntRunning = FALSE;
c792IntLevel = 0;
c792IntVec = 0;
c792IntRoutine = NULL;
c792IntArg = 0;
c792IntEvCount = 0;
#ifdef VXWORKSPPC
bzero((char *)&c792Fpr,sizeof(c792Fpr));
#endif
if(Nc792 > 0) printf("c792Init: %d QDC(s) successfully initialized\n",Nc792);
if(errFlag > 0)
{
printf("c792Init: ERROR: Unable to initialize all QDC Modules, errFlag=%d\n",errFlag);
return(ERROR);
}
else
{
return(Nc792);
}
}
int EEpromRead(unsigned long *EEpromAdr, int EEpromBytes, char *EEpromData)
{
register unsigned long *fetch_addr;
unsigned long *eeprom_addr;
int i;
long loopcnt;
unsigned long eewrite = 0L;
#if (CPU != MC68040)
int ppcLockMask;
int ppcEEpromAdrEnabled;
ppcEEpromAdrEnabled = 0; /* accessing std A24 space, default */
#endif
/* ------ Translate Bus address to CPU Board local address ----- */
/* maybe later.
if (sysBusToLocalAdrs(VME_AM_STD_USR_DATA,
((long)AUTO_BASE_ADR & 0xffffff),&fetch_addr) == -1)
{
printf( "AutoEEpromRead: Can't Obtain Board Bus (0x%lx) to Local Address.",
AUTO_BASE_ADR);
return(ERROR);
}
*/
fetch_addr = EEpromAdr;
if ( ((ulong_t) EEpromAdr & 0xF0000000L) == (ulong_t) 0xE0000000) /* EEprom address space */
{
#if (CPU == MC68040)
if(EEmapSetup() == ERROR) return(ERROR);
fetch_addr = EEpromAdr;
#else /* #if (CPU == PPC603) */
/* strip off 0xE0000000 and obtain STD address space for PPC access to EEPROM */
if (sysBusToLocalAdrs(VME_AM_STD_USR_DATA,
((long)EEpromAdr & 0xffffff),&eeprom_addr) == -1)
{
return(ERROR);
}
fetch_addr = eeprom_addr;
/* printf("EEpromRead: EEPROM adrs: 0x%lx\n",fetch_addr); */
/* MVME2303 PPC */
/* enable the CS/CSR space for Diagnostic EEPROMS */
/* shows up on A24 space - replaces standard A24 */
/* since this mapping replaces the standard A24 space */
/* ISRs should not be permitted to run during this time */
/* thus the intLock() & intUnlock() calls */
/* printf("Enable EEPROM AM code\n"); */
ppcEEpromAdrEnabled = 1; /* enabling EEPROM address space */
ppcLockMask = intLock();
sysUniverseCSCSR();
#endif
}
/* printf("EEPROM access address: 0x%lx\n",fetch_addr); */
if ( vxMemProbe((short*) (fetch_addr), VX_WRITE, LONG, &eewrite) == ERROR)
{
#if (CPU != MC68040) /* #if (CPU == PPC603) */
if (ppcEEpromAdrEnabled == 1)
{
/* re-enable the standard A24 space */
sysUniverseA24();
intUnlock(ppcLockMask);
}
#endif
printf("\n ---- EEpromRead: EEPROM adrs: 0x%lx, NOT accessible.\n\n",fetch_addr);
return(ERROR);
}
if(EEdiagFlag & 0x2) printf("EEpromRead: address = 0x%06lx\n",fetch_addr);
/* place in read mode */
*fetch_addr = VME_EEP_READ;
for(i=0;i<EEpromBytes;i++)
{
/* printf("%d, addr: 0x%lx, '%c' 0x%x\n",i,fetch_addr,*fetch_addr,*fetch_addr); */
*EEpromData++ = *fetch_addr++ & 0x000000ff;
}
#if (CPU != MC68040) /* #if (CPU == PPC603) */
if (ppcEEpromAdrEnabled == 1)
{
/* printf("Disable EEPROM AM code\n"); */
/* re-enable the standard A24 space */
sysUniverseA24();
intUnlock(ppcLockMask);
}
#endif
if(EEdiagFlag & 0x2) printf("EEpromRead: chars = %d\n",i);
return(i);
} /* end EEpromRead(...) */
/* initialize the v450 analog input card */
long
v450_init(void)
{
unsigned short **boards_present;
short shval;
long status;
int i;
v450 *board;
pai_v450 = (unsigned short **)calloc(numV450cards,sizeof(*pai_v450));
if(!pai_v450)
{
printf("V450Config: failed to allocate space\n");
return(ERROR);
}
boards_present = pai_v450;
if ( (status = sysBusToLocalAdrs(VME_AM_STD_SUP_DATA,(char *)v450_base,(char **)&v450_addr)) != OK)
{
printf("Addressing error in V450Config\n");
return(ERROR);
}
else
{
printf("Board address = 0x%08x\n",(int)v450_addr);
}
board = (( v450 *)((int)v450_addr));
for (i=0; i<numV450cards; i++, board++, boards_present++)
{
printf("[%d] probing board at 0x%08x ---> ",i,board);
if (vxMemProbe((char *)board,VX_READ,sizeof(short),(char *)&shval) == OK)
{
*boards_present = (unsigned short *)board;
/* board initialization */
board->CTL0 = 0x100A; /* set Channel 0 to +/-12V @ 4.17 samples /Sec */
board->CTL1 = 0x100A; /* set Channel 1 to +/-12V @ 4.17 samples /Sec */
board->CTL2 = 0x100A; /* set Channel 2 to +/-12V @ 4.17 samples /Sec */
board->CTL3 = 0x100A; /* set Channel 3 to +/-12V @ 4.17 samples /Sec */
board->CTL4 = 0x100A; /* set Channel 4 to +/-12V @ 4.17 samples /Sec */
board->CTL5 = 0x100A; /* set Channel 5 to +/-12V @ 4.17 samples /Sec */
board->CTL6 = 0x100A; /* set Channel 6 to +/-12V @ 4.17 samples /Sec */
board->CTL7 = 0x100A; /* set Channel 7 to +/-12V @ 4.17 samples /Sec */
board->CTL8 = 0x100A; /* set Channel 8 to +/-12V @ 4.17 samples /Sec */
board->CTL9 = 0x100A; /* set Channel 9 to +/-12V @ 4.17 samples /Sec */
board->CTL10 = 0x100A; /* set Channel 10 to +/-12V @ 4.17 samples /Sec */
board->CTL11 = 0x100A; /* set Channel 11 to +/-12V @ 4.17 samples /Sec */
board->CTL12 = 0x100A; /* set Channel 12 to +/-12V @ 4.17 samples /Sec */
board->CTL13 = 0x100A; /* set Channel 13 to +/-12V @ 4.17 samples /Sec */
board->CTL14 = 0x100A; /* set Channel 14 to +/-12V @ 4.17 samples /Sec */
board->CTL15 = 0x100A; /* set Channel 15 to +/-12V @ 4.17 samples /Sec */
board->rtda = rtd_on; /* Enable RTD A @ 100 ohm platinum, ISO 385 curve */
board->rtdb = rtd_on; /* Enable RTD B @ 100 ohm platinum, ISO 385 curve */
board->rtdc = rtd_on; /* Enable RTD C @ 100 ohm platinum, ISO 385 curve */
board->rtdd = rtd_on; /* Enable RTD D @ 100 ohm platinum, ISO 385 curve */
taskDelay(1);
printf("memprobe found a V450 board at this address\n");
}
else
{
printf("Error in memprobe - No V450 found at this address\n");
}
}/*end of board initialization */
return(OK);
}
