/** Perform sparc64 specific initialization of the processor structure for the
* current processor.
*/
void cpu_arch_init(void)
{
uint64_t myid;
__hypercall_fast_ret1(0, 0, 0, 0, 0, CPU_MYID, &myid);
CPU->arch.id = myid;
md_node_t node = md_get_root();
/* walk through MD, find the current CPU node & its clock-frequency */
while (true) {
if (!md_next_node(&node, "cpu")) {
panic("Could not determine CPU frequency.");
}
uint64_t id = 0;
md_get_integer_property(node, "id", &id);
if (id == myid) {
uint64_t clock_frequency = 0;
md_get_integer_property(node, "clock-frequency",
&clock_frequency);
CPU->arch.clock_frequency = clock_frequency;
break;
}
}
tick_init();
sun4v_ipi_init();
}
int main()
{
DDRB = 0xff; // all PORT B output
DDRC = 0; // make PORT C input
// enable pin change interrupt for PORT C pin 0
PCMSK1 |= (1 << PCINT8); // C0
PCICR |= (1 << PCIE1);
// stdout = &mystdout;
tick_init();
sei();
uint8_t mask = 0;
for (;;) {
mask <<= 1;
if (!mask)
mask = 1;
if (pressed)
PORTB = 0xff;
else
PORTB = mask;
sleep_mode();
}
}
void
init_hw(void){
clock_init();
tick_init( freq_sys / 8, 1 );
stm32_init();
#ifdef KSTACK_SIZE
extern void _switch_kstack(char*);
char *nsp = alloc(KSTACK_SIZE);
_switch_kstack(nsp + KSTACK_SIZE);
#endif
}
/* Called by reset exception handler to initialize the kernel and start
rolling first task. */
void
kernel_init()
{
tid_t t;
int i;
printf("Initializing kernel:\n");
printf(" Clearing kernel structures...\n");
memset(tasks, 0, sizeof(tasks));
memset(stacks, 0, sizeof(stacks));
memset(msgs, 0, sizeof(msgs));
printf(" Initializing MCBs... %d MCB(s)\n", MAX_MSGS);
for(i = 0; i < (MAX_MSGS - 1); i++)
msgs[i].next = &msgs[i+1];
free_mcbs = &msgs[0];
printf(" Initializing TCBs... %d user task(s)\n", MAX_TASKS);
tasks_entries();
for(t = 0; t <= MAX_TASKS; t++) {
tasks[t].regs.sp = (unsigned long)stacks[t] + STACK_SIZE - 4;
/* Disable EXR for kernel context */
tasks[t].regs.sr |= (t == 0 ? SPR_SR_SM : SPR_SR_TEE | SPR_SR_IEE);
tasks[t].regs.gprs[1] = t;
}
/* First task runs in seprvisor mode */
tasks[1].regs.sr |= SPR_SR_SM;
/* TID=0 is reserved for kernel use */
kernel_context = (unsigned long *)&tasks[0].regs;
/* First task to be scheduled is task TID=1 */
task_context = (unsigned long *)&tasks[1].regs;
/* Initialize initrrupt controller */
int_init();
printf(" Exceptions will be enabled when first task is dispatched.\n");
printf("Kernel initalized. Starting first user task.\n");
#if KERNEL_SYSCALL_SCHED
kernel_sched(); /* Lets schedule and dispatch our first task */
#else
tick_init(TICK_PERIOD, kernel_sched);
kernel_sched(); /* Lets schedule and dispatch our first task */
#endif
/* ... */ /* We never get here */
}
/* Interrupt test */
int interrupt_test (void)
{
unsigned long ret;
int i;
/* Init tick timer */
tick_init (1, 1);
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Test normal high priority interrupt trigger */
ret = call ((unsigned long)&int_trigger, 0);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_TICK));
ASSERT(ret == 0);
ASSERT(except_pc == (unsigned long)int_trigger + 16);
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Test inetrrupt in delay slot */
tick_init (100, 1);
/* Hopefully we will have interrupt recognition between branch insn and delay slot */
except_pc = (unsigned long)&int_loop;
for (i = 0; i < 10; i++) {
call_with_int (except_pc, RAM_START);
ASSERT(except_pc == (unsigned long)&int_loop);
}
return 0;
}
int main(void)
{
/* Bring up processor */
cpu_init();
watchdog_init();
#ifdef CONFIG_HW_LED_ALIVE_CHECK
/* Bring up low level LED */
hw_led_init();
#endif
#ifdef CONFIG_HW_UART
/* Bring up low level hardware UART */
hw_uart_init();
#endif
/* Setup timer for tick counting */
tick_init();
/* Bring up high level LED */
led_init();
/* Bring up console */
console_init();
#ifdef CONFIG_DEBUG_RESET_REASON
/* Report reason for last reset */
console_puts_P(PSTR("Reset cause:"));
console_puthex8(MCUSR);
console_newline();
#endif
/* Set default LED pattern */
led_set_seq(LED_SEQ_SINE);
#ifdef CONFIG_USBDEV
usbdev_init(USBMODE_DEFAULT);
#endif
/* HiZ bus mode selected by default */
bus_init(&bus_hiz);
/* Enable interrupts */
cpu_enable_int();
while(1)
{
driver_tick();
}
}
int main ( int argc, char *argv[] )
{
tick_init();
uint64 tick1, tick2, diff;
double bandwidth = 0, sum = 0, sqSum = 0;
uint64* src = (uint64*)malloc(DATA_SIZE);
//uint64* dst = (uint64*)malloc(DATA_SIZE);
memset(src, 1, DATA_SIZE);//seems that Linux won't allocate memory until they're written
//memset(dst, 0, DATA_SIZE);
char c;
printf("Memory allocated. Check TOP and press any key.");
scanf("%c", &c);
int i;
for (i = 0; i < LOOP_SIZE_OUTER; i++)
{
tick(tick1);
//memReadTest(src);
memWriteTest(src);
//memCopyTest(src, dst);
//memcpy(dst, src, DATA_SIZE);
tick(tick2);
diff = tick_diff_loop(tick1, tick2, LOOP_SIZE_INNER);
bandwidth = (double)DATA_SIZE / ((double)diff / (double)CPU_FREQUENCY * 1e-3) / (double)(1 << 30);
sum += bandwidth;
sqSum += bandwidth * bandwidth;
//reset memory
memset(src, 1, DATA_SIZE);
//memset(dst, 0, DATA_SIZE);
printf("%d\n", i);
}
printf("avg=%.2fGB/s, std=%.2e\n", sum / LOOP_SIZE_OUTER, sqrt(sqSum / LOOP_SIZE_OUTER - (sum / LOOP_SIZE_OUTER * sum / LOOP_SIZE_OUTER)));
free(src);
//free(dst);
return 0;
}
void main()
{
ANSEL = 0x00;
TRISA = 0xFF;
TRISB = 0b00000100;
// Structure that holds human readable time information;
struct tm tinfo;
// Local time to get
time_t now;
// Store last time we sent the information
uint32_t last = 0;
// Set time manually to 13:55:30 Jan 1st 2014
tinfo.tm_year = 14;
tinfo.tm_mon = 1;
tinfo.tm_mday = 1;
tinfo.tm_hour = 13;
tinfo.tm_min = 55;
tinfo.tm_sec = 30;
// Tick Initialization
tick_init();
// Convert time structure to timestamp
initialt = time_make(&tinfo);
// Set system time counter
time_set(initialt);
// Set the function to get accurate time
time_set_provider(&time_provider, TIME_SECS_PER_DAY);
printf("TimeLib Test Program\r\n");
E_
for (;;) {
// Display the time every second
if (tick_get() - last > TICK_SECOND) {
last = tick_get();
// Send to serial port
printf("Time: %02d:%02d:%02d Date: %02d/%02d/%02d\r\n", hour(), minute(), second(), day(), month(), year());
}
}
}
void
boot2(uint32_t boot_biossector)
{
int currname;
int c;
/* Initialize hardware */
tick_init();
/* Initialize console */
cninit(boot_params.bp_consdev);
print_banner();
/* try to set default device to what BIOS tells us */
bios2dev(0x40, &default_devname, &default_unit,
boot_biossector, &default_partition);
/* if the user types "boot" without filename */
default_filename = DEFFILENAME;
printf("Press return to boot now, any other key for boot menu\n");
currname = 0;
for (;;) {
printf("booting %s - starting in ",
sprint_bootsel(names[currname][0]));
c = awaitkey(boot_params.bp_timeout, 1);
if ((c != '\r') && (c != '\n') && (c != '\0')) {
printf("type \"?\" or \"help\" for help.\n");
bootmenu(); /* does not return */
}
/*
* try pairs of names[] entries, foo and foo.gz
*/
/* don't print "booting..." again */
bootit(names[currname][0], 0, 0);
/* since it failed, try compressed bootfile. */
bootit(names[currname][1], 0, 1);
/* since it failed, try switching bootfile. */
currname = (currname + 1) % NUMNAMES;
}
}
/**
* Implementación de la funcionalidad principal del programa
*/
void main()
{
//OSCCON = 0x6C; // Para usar el oscilador interno PIC16F88 4 Mhz
OSCCON = 0x7C; // Para usar el oscilador interno PIC16F88 8 Mhz
ANSEL = 0x00; // Configuracion de pines analogicos y digitales
TRISA = 0xE0;
TRISB = 0xFF;
// Preparamos las librerías para su uso
lcd_init(0, 16, 2); // Iniciar el controlador de pantalla
tick_init(); // Iniciar el contador / temporizador del sistema
dhtlib_init(); // Preparar la comunicación con el sensor DHT11
// Encendemos la pantalla LCD y escribimos titulo
lcd_on();
lcd_puts(" PRUEBA DHT11 ");
// Ciclo principal de nuestra aplicación
for (;;) {
led_task();
dht11_task();
}
}
void analog_init(Window* window) {
Layer *window_layer = window_get_root_layer(window);
GRect bounds = layer_get_bounds(window_layer);
const GPoint center = grect_center_point(&bounds);
analog_layer = layer_create(bounds);
layer_set_update_proc(analog_layer, analog_update_proc);
layer_add_child(window_layer, analog_layer);
minute_arrow = gpath_create(&MINUTE_HAND_POINTS);
minute_fill = gpath_create(&MINUTE_FILL_POINTS);
hour_arrow = gpath_create(&HOUR_HAND_POINTS);
hour_fill = gpath_create(&HOUR_FILL_POINTS);
peg_fill = gpath_create(&PEG_POINTS);
gpath_move_to(minute_arrow, center);
gpath_move_to(minute_fill, center);
gpath_move_to(hour_arrow, center);
gpath_move_to(hour_fill, center);
gpath_move_to(peg_fill, center);
tick_init(window);
}
void
app_init(void)
{
memset((void *)&app, 0x00, sizeof(app));
clock_init();
tick_init();
//sched_init(&(app.sched), &(app.tasks[0]), TASK_ID_TOTAL, SCHED_TIMER, SCHED_RESOLUTION);
gpio_init(GPIO_LED_R);
gpio_init(GPIO_LED_G);
gpio_init(GPIO_LED_B);
gpio_init(GPIO_TRIAC_IN);
adc_init(ADC_0);
avg_init(&(app.adc_avg), 8192);
spi_init(SPI_0, &(app.spi), 5000000, 0);
//max31855_init(&(app.max31855), SPI_ID_MAX31855, GPIO_NONE);
triac_init();
//port_gpio_int_enable(GPIO_TRIAC_IN);
uart_init(UART_TEST, &(app.uart_test), 9600, "8N1");
serlcd_init(&(app.serlcd), &(app.uart_test));
//serlcd_set_backlight(&(app.serlcd), 29);
serlcd_print_string(&(app.serlcd), "ADC Value");
//app_demo_timer();
pwm_init(&(app.pwm_servo), PWM_SERVO, 330, 50);
tlc5971_init(&(app.tlc), &(app.spi), 1);
}
asmlinkage void __init start_kernel(void)
{
char * command_line;
extern struct kernel_param __start___param[], __stop___param[];
smp_setup_processor_id();
/*
* Need to run as early as possible, to initialize the
* lockdep hash:
*/
unwind_init();
lockdep_init();
cgroup_init_early();
local_irq_disable();
early_boot_irqs_off();
early_init_irq_lock_class();
/*
* Interrupts are still disabled. Do necessary setups, then
* enable them
*/
lock_kernel();
tick_init();
boot_cpu_init();
page_address_init();
printk(KERN_NOTICE);
printk(linux_banner);
setup_arch(&command_line);
setup_command_line(command_line);
unwind_setup();
setup_per_cpu_areas();
smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */
/*
* Set up the scheduler prior starting any interrupts (such as the
* timer interrupt). Full topology setup happens at smp_init()
* time - but meanwhile we still have a functioning scheduler.
*/
sched_init();
/*
* Disable preemption - early bootup scheduling is extremely
* fragile until we cpu_idle() for the first time.
*/
preempt_disable();
build_all_zonelists();
page_alloc_init();
printk(KERN_NOTICE "Kernel command line: %s\n", boot_command_line);
parse_early_param();
parse_args("Booting kernel", static_command_line, __start___param,
__stop___param - __start___param,
&unknown_bootoption);
if (!irqs_disabled()) {
printk(KERN_WARNING "start_kernel(): bug: interrupts were "
"enabled *very* early, fixing it\n");
local_irq_disable();
}
sort_main_extable();
trap_init();
rcu_init();
init_IRQ();
pidhash_init();
init_timers();
hrtimers_init();
softirq_init();
timekeeping_init();
time_init();
profile_init();
if (!irqs_disabled())
printk("start_kernel(): bug: interrupts were enabled early\n");
early_boot_irqs_on();
local_irq_enable();
/*
* HACK ALERT! This is early. We're enabling the console before
* we've done PCI setups etc, and console_init() must be aware of
* this. But we do want output early, in case something goes wrong.
*/
console_init();
if (panic_later)
panic(panic_later, panic_param);
lockdep_info();
/*
* Need to run this when irqs are enabled, because it wants
* to self-test [hard/soft]-irqs on/off lock inversion bugs
* too:
*/
locking_selftest();
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start && !initrd_below_start_ok &&
initrd_start < min_low_pfn << PAGE_SHIFT) {
printk(KERN_CRIT "initrd overwritten (0x%08lx < 0x%08lx) - "
"disabling it.\n",initrd_start,min_low_pfn << PAGE_SHIFT);
initrd_start = 0;
}
#endif
vfs_caches_init_early();
cpuset_init_early();
mem_init();
kmem_cache_init();
setup_per_cpu_pageset();
numa_policy_init();
if (late_time_init)
late_time_init();
calibrate_delay();
/*
* CS370: Adding code to check for "printme" parameter
*/
if (printme)
printk("\nHello World from Me!\n");
pidmap_init();
pgtable_cache_init();
prio_tree_init();
anon_vma_init();
#ifdef CONFIG_X86
if (efi_enabled)
efi_enter_virtual_mode();
#endif
fork_init(num_physpages);
proc_caches_init();
buffer_init();
unnamed_dev_init();
key_init();
security_init();
vfs_caches_init(num_physpages);
radix_tree_init();
signals_init();
/* rootfs populating might need page-writeback */
page_writeback_init();
#ifdef CONFIG_PROC_FS
proc_root_init();
#endif
cgroup_init();
cpuset_init();
taskstats_init_early();
delayacct_init();
check_bugs();
acpi_early_init(); /* before LAPIC and SMP init */
/* Do the rest non-__init'ed, we're now alive */
rest_init();
}
void _main()
{
mem_extent_t *ramext;
u8 sn[6];
u32 cpu_clk_hz = 0;
rtc_time_t tm;
s32 ret;
/*
This section runs with interrupts disabled. The boot console is not available in this
section.
*/
preempt_disable();
/* Copy kernel read/write data areas into kernel RAM */
memcpy(&_sdata, &_etext, &_edata - &_sdata); /* Copy .data section to kernel RAM */
bzero(&_sbss, &_ebss - &_sbss); /* Initialise .bss section */
/* Begin platform initialisation */
if(plat_init() != SUCCESS)
boot_early_fail(1);
if(plat_mem_detect() != SUCCESS) /* Detect installed RAM, initialise memory extents */
boot_early_fail(2);
/* Initialise kernel slabs */
slab_init(&_ebss); /* Slabs sit after the .bss section */
/* Initialise kernel heap */
kmeminit(g_slab_end, mem_get_highest_addr(MEM_EXTENT_KERN | MEM_EXTENT_RAM) - KERNEL_STACK_LEN);
/* Initialise user heap. Place it in the largest user RAM extent. */
ramext = mem_get_largest_extent(MEM_EXTENT_USER | MEM_EXTENT_RAM);
umeminit(ramext->base, ramext->base + ramext->len);
/* By default, all exceptions cause a context-dump followed by a halt. */
cpu_irq_init_table();
/* Initialise device tree */
if(dev_init() != SUCCESS)
boot_early_fail(3);
/*
It's not yet possible to initialise the real (platform) console because devices haven't
been enumerated and interrupts are disabled. In the meantime, create a temporary in-memory
kernel console device to capture output from the boot process.
*/
if(early_boot_console_init() != SUCCESS)
boot_early_fail(4);
printf("%s\nplatform: %s\n", g_warmup_message, plat_get_name());
printf("%uMB RAM detected\n", (mem_get_total_size(MEM_EXTENT_USER | MEM_EXTENT_RAM)
+ mem_get_total_size(MEM_EXTENT_KERN | MEM_EXTENT_RAM)) >> 20);
/* === Initialise peripherals - phase 2 === */
if(dev_enumerate() != SUCCESS)
boot_early_fail(5);
/* Initialise the console */
if(plat_console_init() != SUCCESS)
boot_early_fail(6);
ret = sched_init("[sys]"); /* Init scheduler and create system process */
/*
Enable interrupts and continue booting
*/
preempt_enable();
/* Copy the contents of the temporary console to the real console; close the temp console. */
early_boot_console_close();
/* Activate red LED while the boot process continues */
plat_led_off(LED_ALL);
plat_led_on(LED_RED);
/*
Device enumeration is done; interrupts are enabled, and the console should be functional.
Booting continues...
*/
/* Zero any user RAM extents. This happens after init'ing the DUART, because beeper. */
/*
put("Clearing user RAM: ");
mem_zero_extents(MEM_EXTENT_USER | MEM_EXTENT_RAM);
puts("done");
*/
/* Initialise the block cache, then scan mass-storage devices for partitions */
block_cache_init(2039);
partition_init();
boot_list_mass_storage();
boot_list_partitions();
/* ret is set by the call to sched_init(), above */
if(ret != SUCCESS)
printf("sched: init failed: %s\n", kstrerror(ret));
ret = vfs_init();
if(ret != SUCCESS)
printf("vfs: init failed: %s\n", kstrerror(ret));
/* Display approximate CPU clock speed */
if(plat_get_cpu_clock(&cpu_clk_hz) == SUCCESS)
printf("\nCPU fclk ~%2u.%uMHz\n", cpu_clk_hz / 1000000, (cpu_clk_hz % 1000000) / 100000);
/* Initialise tick handler */
tick_init();
/* Display memory information */
printf("%u bytes of kernel heap memory available\n"
"%u bytes of user memory available\n", kfreemem(), ufreemem());
/* Display platform serial number */
if(plat_get_serial_number(sn) == SUCCESS)
{
printf("Hardware serial number %02X%02X%02X%02X%02X%02X\n",
sn[0], sn[1], sn[2], sn[3], sn[4], sn[5]);
}
/* Display the current date and time */
if(get_time(&tm) == SUCCESS)
{
char timebuf[12], datebuf[32];
if((time_iso8601(&tm, timebuf, sizeof(timebuf)) == SUCCESS) &&
(date_long(&tm, datebuf, sizeof(datebuf)) == SUCCESS))
printf("%s %s\n", timebuf, datebuf);
else
puts("Date/time invalid - please set clock");
}
/* Create housekeeper process */
// proc_create(0, 0, "[hk]", NULL, housekeeper, 0, 0, PROC_TYPE_KERNEL, NULL, NULL);
/* Initialise networking system */
ret = net_init();
if(ret != SUCCESS)
printf("net: init failed: %s\n", kstrerror(ret));
/* Startup complete - activate green LED */
plat_led_off(LED_RED);
plat_led_on(LED_GREEN);
monitor(); /* start interactive "shell" thing */
cpu_halt(); /* should never be reached */
}
int main (int argc, char *argv[])
{
db_t *database;
int opt;
log_debug_flags = DEBUG_TICKER | DEBUG_TAKEOVER | DEBUG_FAME | DEBUG_HERO | DEBUG_ARTEFACT;
while ((opt = getopt(argc, argv, "C:V")) >= 0)
{
switch (opt)
{
case 'C':
config_file = optarg;
break;
case 'V':
puts("$Id: ticker.c 2391 2009-01-12 20:14:20Z root $");
return 0;
default:
return 1;
}
}
#ifdef DEBUG_MALLOC
GC_find_leak = 1;
#endif
/* init random number generator */
srand(time(NULL));
/* init function parser */
function_setup();
/* read config file */
config_read_file(config_file);
fetch_config_values();
/* open ticker logfiles */
if (chdir(ticker_home))
error("%s: %s", ticker_home, strerror(errno));
debug_log = log_handler_new(debug_logfile);
error_log = log_handler_new(error_logfile);
msg_log = log_handler_new(msg_logfile);
log_set_debug_handler(debug_log);
log_set_warning_handler(error_log);
log_set_error_handler(error_log);
message_set_log_handler(msg_log);
/* connect to the database */
debug(DEBUG_TICKER, "init");
write_pidfile(pid_file);
try {
database = db_connect(db_host, db_user, db_passwd, db_name);
} catch (DB_EXCEPTION) {
error("%s", except_msg);
} end_try;
/* read last tick */
tick_init();
/* install signal handler */
signal(SIGTERM, set_finish);
signal(SIGINT, set_finish);
#ifdef SIGHUP
signal(SIGHUP, set_reload);
#endif
/* start the ticker */
run_ticker(database);
/* clean up */
debug(DEBUG_TICKER, "cleanup");
db_close(database);
remove(pid_file);
return 0;
}
//
// syscall entry point
//
long int syscall(unsigned long int command,...){
int ret;
va_list ap;
ret = 0;
va_start(ap,command);
switch (command) {
// SYS
case SYS_INIT: {
tick_init(); // raw-handler
int_init(); // raw-handler
syscall(SYS_TIMER_INIT);
syscall(SYS_DMA_INIT);
syscall(SYS_VRAM_INIT);
syscall(SYS_SCREEN_INIT);
syscall(SYS_UART_INIT);
ret = 0;
} break;
// TIMER
case SYS_TIMER_INIT: {
timer_init(&timer);
ret = 0;
} break;
case SYS_TIMER_GET_COUNT: {
ret = timer_get_count(&timer);
} break;
// DMA
case SYS_DMA_INIT: {
unsigned long int base;
unsigned long int irq;
base = va_arg(ap,unsigned long int);
irq = va_arg(ap,unsigned long int);
dma.ch = dma_channel;
dma.ch_size = DMA_CH_SIZE;
dma.ch[0].buf = dma_buffer_ch0;
dma.ch[0].buf_size = DMA_BUF_SIZE;
dma_init(&dma,DMA_BASE,DMA_IRQ);
ret = 0;
} break;
case SYS_DMA_ADD: {
unsigned long int ch;
void *src;
void *dst;
unsigned long int size;
ch = va_arg(ap,unsigned long int);
src = va_arg(ap,void *);
dst = va_arg(ap,void *);
size = va_arg(ap,unsigned long int);
dma_add(&dma,ch,src,dst,size);
ret = 0;
} break;
case SYS_DMA_ADD_FULL: {
unsigned long int ch;
ch = va_arg(ap,unsigned long int);
ret = (long int)dma_add_full(&dma,ch);
} break;
case SYS_DMA_GET_HANDLE: {
ret = (long int)&dma;
} break;
case SYS_DMA_GET_CH: {
ret = 0;
} break;
// VRAM
case SYS_VRAM_INIT: {
vram_init(&vram,&dma,0);
ret = 0;
} break;
case SYS_VRAM_CLEAR: {
vram_clear(&vram);
ret = 0;
} break;
case SYS_VRAM_IMAGE_PASTE: {
IMAGE *img;
unsigned long int x;
unsigned long int y;
img = va_arg(ap,IMAGE *);
x = va_arg(ap,unsigned long int);
y = va_arg(ap,unsigned long int);
vram_image_paste(&vram,img,x,y);
ret = 0;
} break;
case SYS_VRAM_IMAGE_PASTE_FILTER: {
IMAGE *img;
unsigned long int x;
unsigned long int y;
img = va_arg(ap,IMAGE *);
x = va_arg(ap,unsigned long int);
y = va_arg(ap,unsigned long int);
vram_image_paste_filter(&vram,img,x,y);
ret = 0;
} break;
case SYS_VRAM_IMAGE_CLEAR: {
IMAGE *img;
unsigned long int x;
unsigned long int y;
img = va_arg(ap,IMAGE *);
x = va_arg(ap,unsigned long int);
y = va_arg(ap,unsigned long int);
vram_image_clear(&vram,img,x,y);
ret = 0;
} break;
// SCREEN
case SYS_SCREEN_INIT: {
screen_init(&scr,&vram);
ret = 0;
} break;
case SYS_SCREEN_CLEAR: {
screen_clear(&scr);
ret = 0;
} break;
case SYS_SCREEN_LOCATE: {
unsigned long int x;
unsigned long int y;
x = va_arg(ap,unsigned long int);
y = va_arg(ap,unsigned long int);
screen_locate(&scr,x,y);
ret = 0;
} break;
case SYS_SCREEN_SCROLL: {
unsigned long int height;
height = va_arg(ap,unsigned long int);
screen_scroll(&scr,height);
ret = 0;
} break;
case SYS_SCREEN_PUT_STRING: {
unsigned char *s;
s = va_arg(ap,unsigned char *);
screen_put_string(&scr,s);
ret = 0;
} break;
case SYS_SCREEN_PUT_CHAR: {
unsigned char c;
c = va_arg(ap,unsigned int); // usigned char
screen_put_char(&scr,c);
ret = 0;
} break;
case SYS_SCREEN_PRINT: {
unsigned char c;
c = va_arg(ap,unsigned int); // unsigned char
screen_print(&scr,c);
ret = 0;
} break;
//case SYS_SCREEN_IMAGE: {
// IMAGE *image;
// image = va_arg(ap,IMAGE *);
// screen_image(&scr,image);
// ret = 0;
//} break;
case SYS_SCREEN_SET_LOCATE_X: {
unsigned long int x;
x = va_arg(ap,unsigned long int);
screen_set_locate_x(&scr,x);
ret = 0;
} break;
case SYS_SCREEN_SET_LOCATE_Y: {
unsigned long int y;
y = va_arg(ap,unsigned long int);
screen_set_locate_y(&scr,y);
ret = 0;
} break;
case SYS_SCREEN_GET_LOCATE_X: {
ret = screen_get_locate_x(&scr);
} break;
case SYS_SCREEN_GET_LOCATE_Y: {
ret = screen_get_locate_y(&scr);
} break;
case SYS_SCREEN_SET_COLOR_FG: {
unsigned long int r,g,b;
r = va_arg(ap,unsigned long int);
g = va_arg(ap,unsigned long int);
b = va_arg(ap,unsigned long int);
screen_set_color_fg(&scr,r,g,b);
ret = 0;
} break;
case SYS_SCREEN_SET_COLOR_BG: {
unsigned long int r,g,b;
r = va_arg(ap,unsigned long int);
g = va_arg(ap,unsigned long int);
b = va_arg(ap,unsigned long int);
screen_set_color_bg(&scr,r,g,b);
ret = 0;
} break;
// UART
case SYS_UART_INIT: {
unsigned long int base;
unsigned long int irq;
base = va_arg(ap,unsigned long int);
irq = va_arg(ap,unsigned long int);
uart.tx.buf = uart_buffer_tx;
uart.tx.buf_size = UART_TX_BUF_SIZE;
uart.rx.buf = uart_buffer_rx;
uart.rx.buf_size = UART_RX_BUF_SIZE;
uart_init(&uart,UART_BASE,UART_IRQ);
ret = 0;
} break;
case SYS_UART_GET: {
ret = (long int)uart_get(&uart);
} break;
case SYS_UART_GET_EXIST: {
ret = (long int)uart_get_exist(&uart);
} break;
case SYS_UART_GET_CLEAR: {
uart_get_clear(&uart);
ret = 0;
} break;
case SYS_UART_PUT: {
unsigned int data;
data = va_arg(ap,unsigned int);
uart_put(&uart,(unsigned char)data);
ret = 0;
} break;
case SYS_UART_PUT_FULL: {
ret = uart_put_full(&uart);
} break;
case SYS_UART_PUT_CLEAR: {
uart_put_clear(&uart);
ret = 0;
} break;
case SYS_UART_PUT_STRING: {
unsigned char *string;
string = va_arg(ap,unsigned char *);
uart_put_string(&uart,string);
ret = 0;
} break;
case SYS_UART_IS_CTS: {
ret = uart_is_cts(&uart);
} break;
case SYS_UART_IS_DSR: {
ret = uart_is_dsr(&uart);
} break;
case SYS_UART_IS_RI: {
ret = uart_is_ri(&uart);
} break;
case SYS_UART_IS_DCD: {
ret = uart_is_dcd(&uart);
} break;
case SYS_UART_DTR: {
unsigned long int data;
data = va_arg(ap,unsigned long int);
uart_dtr(&uart,data);
ret = 0;
} break;
case SYS_UART_RTS: {
unsigned long int data;
data = va_arg(ap,unsigned long int);
uart_rts(&uart,data);
ret = 0;
} break;
}
va_end(ap);
return ret;
}
/* Exception priority test */
void except_priority_test (void)
{
int i, j;
unsigned long ea, ta, ret;
/* Invalidate all entries in ITLB */
for (i = 0; i < ITLB_WAYS; i++) {
for (j = 0; j < ITLB_SETS; j++) {
mtspr (SPR_ITLBMR_BASE(i) + j, 0);
mtspr (SPR_ITLBTR_BASE(i) + j, 0);
}
}
/* Set one to one translation for the use of this program */
for (i = 0; i < TLB_TEXT_SET_NB; i++) {
ea = RAM_START + (i*PAGE_SIZE);
ta = RAM_START + (i*PAGE_SIZE);
mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
}
/* Set dtlb no permisions */
itlb_val = SPR_ITLBTR_CI;
/* Invalidate all entries in DTLB */
for (i = 0; i < DTLB_WAYS; i++) {
for (j = 0; j < DTLB_SETS; j++) {
mtspr (SPR_DTLBMR_BASE(i) + j, 0);
mtspr (SPR_DTLBTR_BASE(i) + j, 0);
}
}
/* Set one to one translation for the use of this program */
for (i = 0; i < TLB_DATA_SET_NB; i++) {
ea = RAM_START + (i*PAGE_SIZE);
ta = RAM_START + (i*PAGE_SIZE);
mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
}
/* Init tick timer */
tick_init (1, 1);
/* Set dtlb no permisions */
dtlb_val = SPR_DTLBTR_CI;
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Enable IMMU */
immu_enable ();
/* The following is currently disabled due to differing behavior between
or1ksim and the OR1200 RTL. Or1ksim appears to receive only 1 exception
during the call_with_int() call. The OR1200 correctly, in my opionion,
reports 2 exceptions - ITLB miss and tick timer. -- Julius
TODO: Investigate why or1ksim isn't reporting ITLB miss.
*/
#if 0
/* Check if there was INT exception */
call_with_int (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
printf("ec:%d 0x%lx\n",except_count,except_mask); ASSERT(except_count == 2);
ASSERT(except_mask == ((1 << V_TICK) | (1 << V_ITLB_MISS)));
printf("epc %8lx\n",except_pc);
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
#endif
/* Check if there was ITLB exception */
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_ITLB_MISS));
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
/* Set dtlb permisions */
itlb_val |= SPR_ITLBTR_SXE;
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Check if there was IPF exception */
call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_IPF));
ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Disable MMU */
immu_disable ();
/* Set illegal instruction. JPB. Use a really illegal instruction, not
l.cust8 0x3ffffff. */
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 0) = 0x00000000;
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4) = 0xe8000000;
REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 8) = 0x00000000;
/* Check if there was illegal insn exception */
call (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4, 0);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_ILLINSN));
ASSERT(except_pc == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4));
ASSERT(except_ea == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4 ));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Enable DMMU */
dmmu_enable ();
/* Check if there was alignment exception on read insn */
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_ALIGN));
ASSERT(ret == 0x12345678);
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Check if there was DTLB exception */
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE));
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_DTLB_MISS));
ASSERT(ret == 0x12345678);
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Set dtlb permisions */
dtlb_val |= SPR_DTLBTR_SRE;
/* Check if there was DPF exception */
ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE));
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_DPF));
ASSERT(ret == 0x12345678);
ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)));
/* Reset except counter */
except_count = 0;
except_mask = 0;
except_pc = 0;
except_ea = 0;
/* Check if there was trap exception */
call ((unsigned long)&trap, 0);
ASSERT(except_count == 1);
ASSERT(except_mask == (1 << V_TRAP));
ASSERT(except_pc == (unsigned long)(trap));
}
asmlinkage void __init start_kernel(void)
{
char * command_line;
extern struct kernel_param __start___param[], __stop___param[];
smp_setup_processor_id();
/*
* Need to run as early as possible, to initialize the
* lockdep hash:
*/
lockdep_init();
debug_objects_early_init();
/*
* Set up the the initial canary ASAP:
*/
boot_init_stack_canary();
cgroup_init_early();
local_irq_disable();
early_boot_irqs_off();
early_init_irq_lock_class();
/*
* Interrupts are still disabled. Do necessary setups, then
* enable them
*/
lock_kernel();
tick_init();
boot_cpu_init();
page_address_init();
printk(KERN_NOTICE "%s", linux_banner);
setup_arch(&command_line);
mm_init_owner(&init_mm, &init_task);
setup_command_line(command_line);
setup_nr_cpu_ids();
setup_per_cpu_areas();
smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */
build_all_zonelists(NULL);
page_alloc_init();
printk(KERN_NOTICE "Kernel command line: %s\n", boot_command_line);
//[email protected] 2011.11.14 begin
//support lcd compatible
//reviewed by [email protected]
#if defined(CONFIG_LCD_DRV_ALL)
char *p = strstr(boot_command_line, "lcd=");
if (p)
{
lcd_drv_index = p[4] - 'A';
printk("lcd index = %d", lcd_drv_index);
}
#endif
//[email protected] 2011.11.14 end
parse_early_param();
parse_args("Booting kernel", static_command_line, __start___param,
__stop___param - __start___param,
&unknown_bootoption);
/*
* These use large bootmem allocations and must precede
* kmem_cache_init()
*/
pidhash_init();
vfs_caches_init_early();
sort_main_extable();
trap_init();
mm_init();
/*
* Set up the scheduler prior starting any interrupts (such as the
* timer interrupt). Full topology setup happens at smp_init()
* time - but meanwhile we still have a functioning scheduler.
*/
sched_init();
/*
* Disable preemption - early bootup scheduling is extremely
* fragile until we cpu_idle() for the first time.
*/
preempt_disable();
if (!irqs_disabled()) {
printk(KERN_WARNING "start_kernel(): bug: interrupts were "
"enabled *very* early, fixing it\n");
local_irq_disable();
}
rcu_init();
radix_tree_init();
/* init some links before init_ISA_irqs() */
early_irq_init();
init_IRQ();
prio_tree_init();
init_timers();
hrtimers_init();
softirq_init();
timekeeping_init();
time_init();
profile_init();
if (!irqs_disabled())
printk(KERN_CRIT "start_kernel(): bug: interrupts were "
"enabled early\n");
early_boot_irqs_on();
local_irq_enable();
/* Interrupts are enabled now so all GFP allocations are safe. */
gfp_allowed_mask = __GFP_BITS_MASK;
kmem_cache_init_late();
/*
* HACK ALERT! This is early. We're enabling the console before
* we've done PCI setups etc, and console_init() must be aware of
* this. But we do want output early, in case something goes wrong.
*/
console_init();
if (panic_later)
panic(panic_later, panic_param);
lockdep_info();
/*
* Need to run this when irqs are enabled, because it wants
* to self-test [hard/soft]-irqs on/off lock inversion bugs
* too:
*/
locking_selftest();
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start && !initrd_below_start_ok &&
page_to_pfn(virt_to_page((void *)initrd_start)) < min_low_pfn) {
printk(KERN_CRIT "initrd overwritten (0x%08lx < 0x%08lx) - "
"disabling it.\n",
page_to_pfn(virt_to_page((void *)initrd_start)),
min_low_pfn);
initrd_start = 0;
}
#endif
page_cgroup_init();
enable_debug_pagealloc();
kmemtrace_init();
kmemleak_init();
debug_objects_mem_init();
idr_init_cache();
setup_per_cpu_pageset();
numa_policy_init();
if (late_time_init)
late_time_init();
sched_clock_init();
calibrate_delay();
pidmap_init();
anon_vma_init();
#ifdef CONFIG_X86
if (efi_enabled)
efi_enter_virtual_mode();
#endif
thread_info_cache_init();
cred_init();
fork_init(totalram_pages);
proc_caches_init();
buffer_init();
key_init();
security_init();
dbg_late_init();
vfs_caches_init(totalram_pages);
signals_init();
/* rootfs populating might need page-writeback */
page_writeback_init();
#ifdef CONFIG_PROC_FS
proc_root_init();
#endif
cgroup_init();
cpuset_init();
taskstats_init_early();
delayacct_init();
check_bugs();
acpi_early_init(); /* before LAPIC and SMP init */
sfi_init_late();
ftrace_init();
/* Do the rest non-__init'ed, we're now alive */
rest_init();
}
int main(void)
{
PORTD = 0;
DDRD = 0xff;
// set power reduction register, disable everything we don't need
PRR = (1 << PRTWI) | (1 << PRTIM1) | (1 << PRUSART0) | (1 << PRADC);
DDRB = ~3; PORTB = 3; // pullups on PB0/PB1
DDRC = ~1; PORTC = 1; // pullups on PC0
PCMSK0 = (1 << PCINT1) | (1 << PCINT0); // enable interupt for these pins
PCMSK1 = (1 << PCINT8); // enable interupt for these pins
PCICR = (1 << PCIE0) | (1 << PCIE1); // PCIE0 enable pin interupt PCINT7..0.
tick_init();
startShowHours(4 * TICK_SECOND);
timer[delay_Second].callback = second_timer_callback;
timer[delay_Update].callback = update_timer_callback;
second_timer_callback(&timer[delay_Second]); // get started
update_timer_callback(&timer[delay_Update]); // get started
startTimer();
updateKeyValues();
keyState = lastKeyValue;
SET_SRESET();
spi_init();
pwmInit();
sei();
for (;;) { /* main event loop */
/* If our internal ideal of which keys are down is different from the one that has been
updated cia the interupts, we start counting. If the 'different' key(s) stays the same for
50ms, we declare it an 'event' and update the internsl key state
*/
if (keyState != lastKeyValue) {
for (uint8_t ki = 0; ki < KEY_MAX; ki++)
if ((keyState & (1 << ki)) != (lastKeyValue & (1 << ki))) {
if (keyDebounce[ki] < 50) {
keyDebounce[ki]++;
if (keyDebounce[ki] == 50) {
keyEvent |= (1 << ki);
keyState = (keyState & ~(1 << ki)) | (lastKeyValue & (1 << ki));
}
}
}
/*
* if a Key changed state, let's check it out
*/
if (keyEvent) {
if ((keyEvent & (1 << KEY_START)) && (keyState & (1 << KEY_START)) == 0) {
if (!startTimer())
startShowHours(4 * TICK_SECOND);
}
if ((keyEvent & (1 << KEY_STOP)) && (keyState & (1 << KEY_STOP)) == 0) {
if (!stopTimer())
startShowHours(4 * TICK_SECOND);
}
if ((keyEvent & (1 << KEY_RESET)) && (keyState & (1 << KEY_RESET)) == 0) {
resetTimer();
}
keyEvent = 0;
updateTimerDisplay();
updateTimer();
}
delay_ms(1);
} else {
sleep_mode();
}
}
return 0;
}
