Beispiel #1
0
int
main(void)
{
  u2_init();

  puts("\ntest_lsadc");

  uint32_t r;

  unsigned int up_counter = 0;
  
  while (1){
    unsigned int v;
    v = up_counter;

    lsdac_write_rx(0, v << 0);
    lsdac_write_rx(2, v << 1);

#if 1
    r = lsadc_read_rx(0);
    lsdac_write_rx(1, r & 0x0fff);
    //puthex32_nl(r);
#endif

#if 1
    r = lsadc_read_rx(1);
    lsdac_write_rx(3, r & 0x0fff);
    //puthex32_nl(r);
#endif

    up_counter++;
  }
}
Beispiel #2
0
int
main(void)
{
  u2_init();

  puts("\nburn_dbsrx_eeprom\n");

  hal_set_leds(0, ~0);	// all off

  int i2c_addr = I2C_ADDR_RX_A;
  int dbid = read_dboard_eeprom(i2c_addr);
  bool ok;
  const char *msg = 0;

  switch (dbid){
  case -1:
    msg = "No RX daughterboard found";
    goto bad;

  case -2:
    msg = "Invalid RX EEPROM contents";
    goto bad;

  case USRP_DBID_DBS_RX_WITH_CLOCK_MOD:
    msg = "RX Daughterboard already reports being a DBS RX w/ CLOCK_MOD";
    goto good;

  case USRP_DBID_DBS_RX:
    // Says it's a DBS_RX, attempt to burn the EEPROM
    ok = eeprom_write(i2c_addr, 0,
		      dbs_rx_rev2_eeprom, sizeof(dbs_rx_rev2_eeprom));
    if (ok){
      msg = "Successfully programmed db as DBS RX Rev 2.1";
      goto good;
    }
    else {
      msg = "Failed to write daugherboard eeprom";
      goto bad;
    }

  default:
    msg = "Daughterboard is not a DBS RX; ignored";
    goto bad;
  }
  
 good:
  puts(msg);
  hal_set_leds(LED_VALS, LED_MASK);
  while (1)
    ;

 bad:
  puts(msg);
  while(1){
    hal_toggle_leds(LED_VALS);
    mdelay(50);
  }
}
Beispiel #3
0
int
main(void)
{
  u2_init();

  puts("Hello World");
  puts("Goodbye World");

  return 0;
}
Beispiel #4
0
int
main(void)
{
  int i;

  u2_init();

  // Control LEDs
  output_regs->leds = 0x02;

  // Turn on ADCs
  output_regs->adc_ctrl = 0x0A;

  // Set up TX Chain
  dsp_tx_regs->freq = 0;
  dsp_tx_regs->scale_iq = (1 << 16) | 1;
  dsp_tx_regs->interp_rate = 8;

  // Set up RX Chain
  dsp_rx_regs->freq = 0;
  dsp_rx_regs->scale_iq = (1 << 16) | 1;
  dsp_rx_regs->decim_rate = 8;

  // Set up buffer control, using only 4 for now
  for(i=0;i<4;i++) 
    buffer_state[i] = EMPTY;

  // Set up DSP RX
  buffer_state[0] = FILLING;
  serdes_tx_idle = 1;
  bp_receive_to_buf(0, 1, 1, 10, 509);  // DSP_RX to buffer 0, use 500 lines

  //dsp_rx_regs->run_rx = 1;           // Start DSP_RX
  putstr("Done DSP RX setup\n");

  // Set up serdes RX
  buffer_state[2] = FILLING;
  dsp_tx_idle = 1;
  bp_receive_to_buf(2, PORT, 1, 5, 504);

  while (buffer_pool_status->status == 0)  // wait for completion of DSP RX
    ;

  putstr("Done DSP TX setup\n");
  //dsp_tx_regs->run_tx = 1;

  // register interrupt handler
  pic_register_handler(IRQ_BUFFER, buffer_irq_handler);

  while (1)
    ;

  hal_finish();
  return 1;
}
Beispiel #5
0
int
main(void)
{
  u2_init();

  // setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
  //hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
  //hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");

  putstr("\ntx_only\n");
  
  // Control LEDs
  hal_set_leds(0x0, 0x3);

  if (USE_BUFFER_INTERRUPT)
    pic_register_handler(IRQ_BUFFER,   buffer_irq_handler);

  pic_register_handler(IRQ_OVERRUN,  overrun_irq_handler);
  pic_register_handler(IRQ_UNDERRUN, underrun_irq_handler);

  //pic_register_handler(IRQ_TIMER, timer_irq_handler);
  //hal_set_timeout(timer_delta);

  ethernet_register_link_changed_callback(link_changed_callback);

  ethernet_init();

  // initialize double buffering state machine for DSP RX -> Ethernet
  dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
	    &dsp_rx_recv_args, &dsp_rx_send_args,
	    dbsm_nop_inspector);

  // setup receive from ETH
  // bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);

#if 0
  if (hwconfig_simulation_p()){
    // If we're simulating, pretend that we got a start command from the host
    u2_mac_addr_t host = {{ 0x00, 0x0A, 0xE4, 0x3E, 0xD2, 0xD5 }};
    start_rx_cmd(&host);
  }
#endif

  start_tx_transfers();		// send constant buffers to DSP TX

  while(1){
    if (!USE_BUFFER_INTERRUPT)
      buffer_irq_handler(0);
  }
}
Beispiel #6
0
int
main(void)
{
  u2_init();

  putstr("\nFactory Test, Board Rev 3.0\n");

  bool ok = true;
  unsigned char maj = HW_REV_MAJOR;
  unsigned char min = HW_REV_MINOR;
  ok = eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &maj, 1);
  ok &= eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &min, 1);

  putstr("\nset_hw_rev\n");
  if (ok)
    printf("OK: set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
  else {
    printf("FAILED to set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR);
    hal_finish();
    return 0;
  }

  if(test_sd())
    puts("SD OK\n");
  else {
    puts("SD FAIL\n");
    //hal_finish();
    //return 0;
  }
  if(test_ram())
    puts("RAM OK\n");
  else {
    puts("RAM FAIL\n");
    hal_finish();
    return 0;
  }

  print_mac_addr(ethernet_mac_addr()->addr);
  newline();

  clocks_mimo_config(MC_WE_LOCK_TO_SMA);

  while (!clocks_lock_detect()) {
    puts("No Lock");
    mdelay(1000);
  }
  puts("Clock Locked\n");

}
Beispiel #7
0
int main(int argc, char *argv[])
{
	if (parse_args(argc, argv)) {
		printf("usage: %s [OPTION]...\n", argv[0]);
		printf("\t-q [IO number]\n");
		printf("\t-w [workload type (read, randread, write, randwrite)]\n");
		printf("\t-c [core mask]\n");
		printf("\t-n [memory channels]\n");
		//printf("\t-t [time in seconds]\n");
		goto FAIL;
	}

	if (u2_init()) {
		fprintf(stderr, "failed to initialize u2 benchmarking context!\n");
		goto FAIL;
	}

	printf("u2 latency benchmarking ... RW type: %s %s, IOs: %"PRIu64"\n",
	       is_random ? "random" : "sequential", is_rw ? "read" : "write", io_num);
	printf("\t%8s\t\t%12s\t\t%12s\n", "I/O size", "latency", "elapsed time");
	//printf("u2 latency benchmarking ... RW type: %s %s, Time (s): %"PRIu32"\n",
	//       is_random ? "random" : "sequential", is_rw ? "read" : "write", time_in_sec);
	//printf("\t%8s\t\t%12s\t\t%12s\n", "I/O size", "latency", "I/O count");
	while (1) {
		printf("\t%8d", io_size);

		if (u2_lat_bench()) {
			fprintf(stderr, "failed to benchmark latency - IO size %d!\n", io_size);
			goto FAIL;
		}

		if ((io_size *= 2) > U2_IO_SIZE_MAX) {
			break;
		}
	}

	u2_cleanup();
	return 0;

FAIL:
	u2_cleanup();
	return 1;
}
Beispiel #8
0
int
main(void)
{
  u2_init();

  output_regs->led_src = 0x3;		// h/w controls bottom two bits
  clocks_enable_test_clk(true, 1);

  putstr("\nMIMO Tx Slave\n");

  cpu_tx_buf_dest_port = PORT_SERDES;

  // ethernet_register_link_changed_callback(link_changed_callback);
  // ethernet_init();

  clocks_mimo_config(MC_WE_LOCK_TO_MIMO);

  // puts("post clocks_mimo_config");

#if 0
  // make bit 15 of Tx gpio's be a s/w output
  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
#endif

#if 0
  output_regs->debug_mux_ctrl = 1;
  hal_gpio_set_sels(GPIO_TX_BANK, "0000000000000000");
  hal_gpio_set_sels(GPIO_RX_BANK, "0000000000000000");
  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
#endif


  // initialize double buffering state machine for ethernet -> DSP Tx

  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
	    &dsp_tx_recv_args, &dsp_tx_send_args,
	    eth_pkt_inspector);


  //output_regs->flush_icache = 1;
 
  // initialize double buffering state machine for DSP RX -> Ethernet

  if (FW_SETS_SEQNO){
    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
	      &dsp_rx_recv_args, &dsp_rx_send_args,
	      fw_sets_seqno_inspector);
  }
  else {
    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
	      &dsp_rx_recv_args, &dsp_rx_send_args,
	      dbsm_nop_inspector);
  }

  // puts("post dbsm_init's");

  // tell app_common that this dbsm could be sending to the ethernet
  ac_could_be_sending_to_eth = &dsp_rx_sm;


  // program tx registers
  setup_tx();

  // puts("post setup_tx");

  // kick off the state machine
  dbsm_start(&dsp_tx_sm);

  // puts("post dbsm_start");

  //int which = 0;

  while(1){
    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
    // which ^= 0x8000;

    buffer_irq_handler(0);

    int pending = pic_regs->pending;		// poll for under or overrun

    if (pending & PIC_UNDERRUN_INT){
      dbsm_handle_tx_underrun(&dsp_tx_sm);
      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
      putchar('U');
    }

    if (pending & PIC_OVERRUN_INT){
      dbsm_handle_rx_overrun(&dsp_rx_sm);
      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt

      // FIXME Figure out how to handle this robustly.
      // Any buffers that are emptying should be allowed to drain...

      if (streaming_p){
	// restart_streaming();
	// FIXME report error
      }
      else {
	// FIXME report error
      }
      putchar('O');
    }
  }
}
Beispiel #9
0
int
main(void)
{
  u2_init();

  putstr("\nFactory Test\n");

  print_mac_addr(ethernet_mac_addr()->addr);
  newline();

  if(test_sd())
    puts("SD OK\n");
  else {
    puts("SD FAIL\n");
    //    hal_finish();
    //return 0;
  }
  if(test_ram())
    puts("RAM OK\n");
  else {
    puts("RAM FAIL\n");
    hal_finish();
    return 0;
  }

  print_mac_addr(ethernet_mac_addr()->addr);
  newline();

  output_regs->led_src = 0x7;  // make bottom 3 controlled by HW

  ethernet_register_link_changed_callback(link_changed_callback);
  ethernet_init();

  clocks_enable_tx_dboard(true,1);
  clocks_mimo_config(MC_WE_LOCK_TO_SMA);
#if 0
  // make bit 15 of Tx gpio's be a s/w output
  hal_gpio_set_sel(GPIO_TX_BANK, 15, 's');
  hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000);
#endif

  output_regs->debug_mux_ctrl = 1;
#if 0
  hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111");
  hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111");
  hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff);
  hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff);
#endif


  // initialize double buffering state machine for ethernet -> DSP Tx

  dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0,
	    &dsp_tx_recv_args, &dsp_tx_send_args,
	    eth_pkt_inspector);


  // initialize double buffering state machine for DSP RX -> Ethernet

  if (FW_SETS_SEQNO){
    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
	      &dsp_rx_recv_args, &dsp_rx_send_args,
	      fw_sets_seqno_inspector);
  }
  else {
    dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0,
	      &dsp_rx_recv_args, &dsp_rx_send_args,
	      dbsm_nop_inspector);
  }

  // tell app_common that this dbsm could be sending to the ethernet
  ac_could_be_sending_to_eth = &dsp_rx_sm;


  // program tx registers
  setup_tx();

  // kick off the state machine
  dbsm_start(&dsp_tx_sm);

  //int which = 0;

  while(1){
    // hal_gpio_write(GPIO_TX_BANK, which, 0x8000);
    // which ^= 0x8000;

    buffer_irq_handler(0);

    int pending = pic_regs->pending;		// poll for under or overrun

    if (pending & PIC_UNDERRUN_INT){
      dbsm_handle_tx_underrun(&dsp_tx_sm);
      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
      putchar('U');
    }

    if (pending & PIC_OVERRUN_INT){
      dbsm_handle_rx_overrun(&dsp_rx_sm);
      pic_regs->pending = PIC_OVERRUN_INT;	// clear pending interrupt

      // FIXME Figure out how to handle this robustly.
      // Any buffers that are emptying should be allowed to drain...

      if (streaming_p){
	// restart_streaming();
	// FIXME report error
      }
      else {
	// FIXME report error
      }
      putchar('O');
    }
  }
}
Beispiel #10
0
int
main(void)
{
  u2_init();
#ifdef BOOTLOADER
  putstr("\nUSRP N210 UDP bootloader\n");
#else
  putstr("\nTxRx-UHD-ZPU\n");
#endif
  printf("FPGA compatibility number: %d\n", USRP2_FPGA_COMPAT_NUM);
  printf("Firmware compatibility number: %d\n", USRP2_FW_COMPAT_NUM);
  
#ifdef BOOTLOADER
  //load the production FPGA image or firmware if appropriate
  do_the_bootload_thing();
  //if we get here we've fallen through to safe firmware
  set_default_mac_addr();
  set_default_ip_addr();
#endif

  print_mac_addr(ethernet_mac_addr()); newline();
  print_ip_addr(get_ip_addr()); newline();

  //1) register the addresses into the network stack
  register_addrs(ethernet_mac_addr(), get_ip_addr());
  pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_DSP0_PORT);

  //2) register callbacks for udp ports we service
  init_udp_listeners();
  register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet);
  register_udp_listener(USRP2_UDP_DSP0_PORT, handle_udp_data_packet);
  register_udp_listener(USRP2_UDP_ERR0_PORT, handle_udp_data_packet);
  register_udp_listener(USRP2_UDP_DSP1_PORT, handle_udp_data_packet);
#ifdef USRP2P
  register_udp_listener(USRP2_UDP_UPDATE_PORT, handle_udp_fw_update_packet);
#endif

  //3) set the routing mode to slave to set defaults
  pkt_ctrl_set_routing_mode(PKT_CTRL_ROUTING_MODE_SLAVE);

  //4) setup ethernet hardware to bring the link up
  ethernet_register_link_changed_callback(link_changed_callback);
  ethernet_init();

  while(true){

    size_t num_lines;
    void *buff = pkt_ctrl_claim_incoming_buffer(&num_lines);
    if (buff != NULL){
        handle_inp_packet((uint32_t *)buff, num_lines);
        pkt_ctrl_release_incoming_buffer();
    }

    pic_interrupt_handler();
    int pending = pic_regs->pending;		// poll for under or overrun

    if (pending & PIC_UNDERRUN_INT){
      pic_regs->pending = PIC_UNDERRUN_INT;	// clear interrupt
      putchar('U');
    }

    if (pending & PIC_OVERRUN_INT){
      pic_regs->pending = PIC_OVERRUN_INT;	// clear interrupt
      putchar('O');
    }
  }
}