/**************************************************************************************************
* @fn npSpiUdmaCompleteIsr
*
* @brief This ISR is vectored when uDMA for TX or RX is completed.
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
static void npSpiUdmaCompleteIsr(void)
{
halIntState_t intState;
uint32 intStatus;
uint8 rx_len;
intStatus = uDMAIntStatus();
HAL_ENTER_CRITICAL_SECTION_DEBUG(intState);
if((npSpiState == NP_SPI_WAIT_RX) && (intStatus & UDMA_CH10_SSI0RX_MASK))
{
uDMAIntClear(UDMA_CH10_SSI0RX_MASK);
/* The RX length is known at this point */
rx_len = npSpiBuf[0] + 2;
/* Start another RX DMA for the remaining of the bytes */
uDMAChannelTransferSet(UDMA_CH10_SSI0RX | UDMA_PRI_SELECT,
UDMA_MODE_BASIC, SPI_DATA, &npSpiBuf[1], rx_len);
uDMAChannelEnable(UDMA_CH10_SSI0RX);
/* Poll for results. TODO: Add error/timeout */
while (uDMAChannelSizeGet(UDMA_CH10_SSI0RX | UDMA_PRI_SELECT) > 0);
/* Process RX packet */
npSpiRxIsr();
}
else if((npSpiState == NP_SPI_WAIT_TX) && (intStatus & UDMA_CH11_SSI0TX_MASK))
{
uDMAIntClear(UDMA_CH11_SSI0TX_MASK);
}
else
{
/* TODO: Add debug. Should never get here! */
uDMAIntClear(UDMA_CH10_SSI0RX_MASK | UDMA_CH11_SSI0TX_MASK);
}
HAL_EXIT_CRITICAL_SECTION_DEBUG(intState);
}
/*
* function: ADC3IntHandler
* interrupt handler ADC0, sequence 3
* return: none
* */
void ADC3IntHandler(void) {
unsigned long ulStatus;
static unsigned long uluDMACount = 0;
static unsigned long ulDataXferd = 0;
unsigned long ulNextuDMAXferSize = 0;
ADCIntClear(ADC0_BASE, SEQUENCER);
// If the channel's not done capturing, we have an error
if (uDMAChannelIsEnabled(UDMA_CHANNEL_ADC3)) {
// Increment error counter
adcNode[0].g_ulBadPeriphIsr2++;
ADCIntDisable(ADC0_BASE, SEQUENCER);
IntPendClear(INT_ADC0SS3);
return;
}
ulStatus = uDMAChannelSizeGet(UDMA_CHANNEL_ADC3);
// If non-zero items are left in the transfer buffer
// Something went wrong
if (ulStatus) {
adcNode[0].g_ulBadPeriphIsr1++;
return;
}
// Disable the sampling timer
TimerDisable(TIMER0_BASE, TIMER_A);
// how many times the DMA has been full without processing the data
uluDMACount++;
// The amount of data transferred increments in sets of 1024
ulDataXferd += UDMA_XFER_MAX;
if (NUM_SAMPLES > ulDataXferd) {
if ((NUM_SAMPLES - ulDataXferd) > UDMA_XFER_MAX) {
ulNextuDMAXferSize = UDMA_XFER_MAX;
} else {
ulNextuDMAXferSize = NUM_SAMPLES - ulDataXferd;
}
#ifdef USE_TEMPORARY_BUFFER
if (currentAdcBuffer == g_ulADCValues_B) {
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
} else {
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues_B + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
}
#endif
#ifdef NOT_TEMPORARY_BUFFER
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
#endif
uDMAChannelEnable(UDMA_CHANNEL_ADC3);
TimerLoadSet(TIMER0_BASE, TIMER_A, LoadTimer);
TimerEnable(TIMER0_BASE, TIMER_A);
} else {
uluDMACount = 0;
ulDataXferd = 0;
ADCIntDisable(ADC0_BASE, SEQUENCER);
IntPendClear(INT_ADC0SS3);
// Signal that we have new data to be processed
adcNode[0].g_ucDataReady = 1;
#ifdef USING_BUFFER2
if (adcNode[0].g_ucDataReady) {
memcpy(output2, g_ulADCValues, NUM_SAMPLES);
countFullData++;
}
#endif
}
}
/*
* function: ADC3IntHandler
* interrupt handler ADC0, sequence 3
* return: none
* */
void ADC3IntHandler(void) {
unsigned long ulStatus;
static unsigned long uluDMACount = 0;
static unsigned long ulDataXferd = 0;
unsigned long ulNextuDMAXferSize = 0;
unsigned short *pusDMABuffer;
unsigned short *pusCopyBuffer;
int i;
ADCIntClear(ADC0_BASE, SEQUENCER);
// If the channel's not done capturing, we have an error
if (uDMAChannelIsEnabled(UDMA_CHANNEL_ADC3)) {
// Increment error counter
adcNode[0].g_ulBadPeriphIsr2++;
ADCIntDisable(ADC0_BASE, SEQUENCER);
IntPendClear(INT_ADC0SS3);
return;
}
ulStatus = uDMAChannelSizeGet(UDMA_CHANNEL_ADC3);
// If non-zero items are left in the transfer buffer
// Something went wrong
if (ulStatus) {
adcNode[0].g_ulBadPeriphIsr1++;
return;
}
if (g_ucDMAMethod == DMA_METHOD_SLOW) {
//
// We are using the slow DMA method, meaning there are not enough
// samples in a second to generate a new set of FFT values and still
// have data frequent enough to refresh at 15 frames per second
//
//
// when pingpong is 0, uDMA just finished transferring into ping, so next
// we transfer into pong.
//
if (g_ucDMApingpong == 0) {
pusDMABuffer = g_usDMApong;
pusCopyBuffer = g_usDMAping;
g_ucDMApingpong = 1;
} else {
pusDMABuffer = g_usDMAping;
pusCopyBuffer = g_usDMApong;
g_ucDMApingpong = 0;
}
//
// Set up the next uDMA transfer
//
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC, (void *) (ADC0_BASE + ADC_O_SSFIFO3),// + (0x20 * UDMA_ARB_1)),
pusDMABuffer, DMA_SIZE);
uDMAChannelEnable(UDMA_CHANNEL_ADC3);
IntPendClear(INT_ADC0SS3);
//
// Shift everything back DMA_SIZE samples
//
for (i = 0; i < (NUM_SAMPLES - DMA_SIZE); i++) {
g_ulADCValues[i] = g_ulADCValues[i + DMA_SIZE];
}
//
// Copy the new samples from the copy buffer into the sample array
//
for (i = 0; i < DMA_SIZE; i++) {
g_ulADCValues[i + NUM_SAMPLES - DMA_SIZE] = pusCopyBuffer[i];
}
//
// Signal that we have new data to be processed
//
adcNode[0].g_ucDataReady = 1;
} else {
// Disable the sampling timer
TimerDisable(TIMER0_BASE, TIMER_A);
// how many times the DMA has been full without processing the data
uluDMACount++;
// The amount of data transferred increments in sets of 1024
ulDataXferd += UDMA_XFER_MAX;
if (NUM_SAMPLES > ulDataXferd) {
if ((NUM_SAMPLES - ulDataXferd) > UDMA_XFER_MAX) {
ulNextuDMAXferSize = UDMA_XFER_MAX;
} else {
ulNextuDMAXferSize = NUM_SAMPLES - ulDataXferd;
}
#ifdef USE_TEMPORARY_BUFFER
if (currentAdcBuffer == g_ulADCValues_B) {
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
} else {
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues_B + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
}
#endif
uDMAChannelTransferSet(UDMA_CHANNEL_ADC3 | UDMA_PRI_SELECT,
UDMA_MODE_BASIC,
(void *) (ADC0_BASE + ADC_O_SSFIFO3 + (0x20 * UDMA_ARB_1)),
g_ulADCValues + (UDMA_XFER_MAX * uluDMACount),
ulNextuDMAXferSize);
uDMAChannelEnable(UDMA_CHANNEL_ADC3);
TimerLoadSet(TIMER0_BASE, TIMER_A, LoadTimer);
TimerEnable(TIMER0_BASE, TIMER_A);
} else {
uluDMACount = 0;
ulDataXferd = 0;
ADCIntDisable(ADC0_BASE, SEQUENCER);
IntPendClear(INT_ADC0SS3);
// Signal that we have new data to be processed
adcNode[0].g_ucDataReady = 1;
#ifdef USING_BUFFER2
if (adcNode[0].g_ucDataReady) {
memcpy(output2, g_ulADCValues, NUM_SAMPLES);
countFullData++;
}
#endif
}
}
}
