DMPAPI(bool) uart_Init(void *vport)
{
SerialPort *port = (SerialPort *)vport;
if (vx86_uart_Init(port->com) == false) {
err_print((char*)"%s: Vertex86 COM%d init fail!!\n", __FUNCTION__, port->com + 1);
goto VX86_UART_INIT_FAIL;
}
if (uart_IsOK(port) == false) {
err_print((char*)"%s: COM%d doesn't exist.\n", __FUNCTION__, port->com + 1);
goto CHECK_EXIST_FAIL;
}
if (irq_Init() == false) {
err_print((char*)"%s: IRQ init fail.\n", __FUNCTION__);
goto IRQ_INIT_FAIL;
}
// save old UART config
port->old_lsb = port->lsb = _16550_DLAB_In(port, port->DLLSB);
port->old_msb = port->msb = _16550_DLAB_In(port, port->DLMSB);
port->old_ier = port->ier = io_inpb(port->IER);
port->old_lcr = port->lcr = io_inpb(port->LCR);
port->old_mcr = port->mcr = io_inpb(port->MCR);
port->old_TimeOut = port->TimeOut = UART_NO_TIMEOUT;
// UART initial
uart_SetBaud(vport, UARTBAUD_115200BPS);
uart_SetFormat(vport, BYTESIZE8 + STOPBIT1 + NOPARITY);
uart_SetTimeOut(vport, UART_NO_TIMEOUT);
// flush rx & tx queue
uart_FlushRxQueue(vport);
uart_FlushTxQueue(vport);
// clear Hardware RX & TX FIFO
uart_ClearRFIFO(vport);
uart_ClearWFIFO(vport);
// enable FIFO mode
uart_SetHWFIFO(vport, ENABLE_HW_FIFO_16);
// enable receive data interrupt
uart_IntEnable(vport, IERALL);
// set flow control
uart_SetFlowControl(vport, NO_CONTROL);
port->InUse = 1;
return true;
IRQ_INIT_FAIL:
CHECK_EXIST_FAIL:
vx86_uart_Close(port->com);
VX86_UART_INIT_FAIL:
if (io_Close() == false) err_print((char*)"Close IO lib error!!\n");
return false;
}
int main( void )
{
SetupHardware();
uart_init(STD_UART,128,128,0);
uart_SetBaud(STD_UART,9600);
xTaskCreate( grbl_task, ( signed char * ) "grbl", configMINIMAL_STACK_SIZE*7, ( void * ) NULL, tskIDLE_PRIORITY+1, NULL );
xTaskCreate( blink_task, ( signed char * ) "blink", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY+2, NULL );
vTaskStartScheduler();
for( ;; );
}
