void TRACEUART_ISR(void)
{
uint32_t flush = uart_is_interrupt_source(TRACEUART, UART_INT_RT);
while (!uart_is_rx_fifo_empty(TRACEUART)) {
uint32_t c = uart_recv(TRACEUART);
/* If the next increment of rx_in would put it at the same point
* as rx_out, the FIFO is considered full.
*/
if (((buf_rx_in + 1) % FIFO_SIZE) != buf_rx_out)
{
/* insert into FIFO */
buf_rx[buf_rx_in++] = c;
/* wrap out pointer */
if (buf_rx_in >= FIFO_SIZE)
{
buf_rx_in = 0;
}
} else {
flush = 1;
break;
}
}
if (flush) {
/* advance fifo out pointer by amount written */
trace_buf_push();
}
}
/*
* Read a character from the UART RX and stuff it in a software FIFO.
* Allowed to read from FIFO out pointer, but not write to it.
* Allowed to write to FIFO in pointer.
*/
void USBUART_ISR(void)
{
int flush = uart_is_interrupt_source(USBUART, UART_INT_RT);
while (!uart_is_rx_fifo_empty(USBUART)) {
char c = uart_recv(USBUART);
/* If the next increment of rx_in would put it at the same point
* as rx_out, the FIFO is considered full.
*/
if (((buf_rx_in + 1) % FIFO_SIZE) != buf_rx_out)
{
/* insert into FIFO */
buf_rx[buf_rx_in++] = c;
/* wrap out pointer */
if (buf_rx_in >= FIFO_SIZE)
{
buf_rx_in = 0;
}
} else {
flush = 1;
}
}
if (flush) {
/* forcibly empty fifo if no USB endpoint */
if (cdcacm_get_config() != 1)
{
buf_rx_out = buf_rx_in;
return;
}
uint8_t packet_buf[CDCACM_PACKET_SIZE];
uint8_t packet_size = 0;
uint8_t buf_out = buf_rx_out;
/* copy from uart FIFO into local usb packet buffer */
while (buf_rx_in != buf_out && packet_size < CDCACM_PACKET_SIZE)
{
packet_buf[packet_size++] = buf_rx[buf_out++];
/* wrap out pointer */
if (buf_out >= FIFO_SIZE)
{
buf_out = 0;
}
}
/* advance fifo out pointer by amount written */
buf_rx_out += usbd_ep_write_packet(usbdev,
CDCACM_UART_ENDPOINT, packet_buf, packet_size);
buf_rx_out %= FIFO_SIZE;
}
}
bool uart_flow_off_func(void)
{
bool flow_off = true;
do
{
// First check if no transmission is ongoing
if ((uart_temt_getf() == 0) || (uart_thre_getf() == 0))
{
flow_off = false;
break;
}
// Configure modem (HW flow control disable, 'RTS flow off')
#if 0
uart_mcr_pack(UART_ENABLE, // extfunc
UART_DISABLE, // autorts
UART_ENABLE, // autocts
UART_DISABLE); // rts
#endif
SetWord32(UART_MCR_REG, 0);
// Wait for 1 character duration to ensure host has not started a transmission at the
// same time
for (i=0;i<350;i++);
// Wait for 1 character duration to ensure host has not started a transmission at the
// same time
#ifndef __GNUC__
// timer_wait(UART_CHAR_DURATION);
#endif //__GNUC__
// Check if data has been received during wait time
if(!uart_is_rx_fifo_empty())
{
// Re-enable UART flow
uart_flow_on();
// We failed stopping the flow
flow_off = false;
}
} while(false);
return (flow_off);
}