static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts)
{
unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
if (machine_is_collie())
return (!(val & (UCB_TS_CR_TSPX_LOW)));
else
return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
}
static int ucb1x00_pm (struct pm_dev *dev, pm_request_t rqst, void *data)
{
struct ucb1x00 *ucb = (struct ucb1x00 *)dev->data;
unsigned int isr;
if (rqst == PM_RESUME) {
ucb1x00_enable(ucb);
isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
ucb1x00_disable(ucb);
}
return 0;
}
/*
* UCB1x00 Interrupt handling.
*
* The UCB1x00 can generate interrupts when the SIBCLK is stopped.
* Since we need to read an internal register, we must re-enable
* SIBCLK to talk to the chip. We leave the clock running until
* we have finished processing all interrupts from the chip.
*/
static void ucb1x00_irq(int irqnr, void *devid, struct pt_regs *regs)
{
struct ucb1x00 *ucb = devid;
struct ucb1x00_irq *irq;
unsigned int isr, i;
ucb1x00_enable(ucb);
isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)
if (isr & 1 && irq->fn)
irq->fn(i, irq->devid);
ucb1x00_disable(ucb);
}
/*
* Try to probe our interrupt, rather than relying on lots of
* hard-coded machine dependencies. For reference, the expected
* IRQ mappings are:
*
* Machine Default IRQ
* adsbitsy IRQ_GPCIN4
* cerf IRQ_GPIO_UCB1200_IRQ
* flexanet IRQ_GPIO_GUI
* freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
* graphicsclient ADS_EXT_IRQ(8)
* graphicsmaster ADS_EXT_IRQ(8)
* lart LART_IRQ_UCB1200
* omnimeter IRQ_GPIO23
* pfs168 IRQ_GPIO_UCB1300_IRQ
* simpad IRQ_GPIO_UCB1300_IRQ
* shannon SHANNON_IRQ_GPIO_IRQ_CODEC
* yopy IRQ_GPIO_UCB1200_IRQ
*/
static int __init ucb1x00_detect_irq(struct ucb1x00 *ucb)
{
unsigned long mask;
mask = probe_irq_on();
if (!mask)
return NO_IRQ;
/*
* Enable the ADC interrupt.
*/
ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
/*
* Cause an ADC interrupt.
*/
ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
/*
* Wait for the conversion to complete.
*/
while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
/*
* Disable and clear interrupt.
*/
ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
/*
* Read triggered interrupt.
*/
return probe_irq_off(mask);
}
/**
* ucb1x00_adc_read - read the specified ADC channel
* @ucb: UCB1x00 structure describing chip
* @adc_channel: ADC channel mask
* @sync: wait for syncronisation pulse.
*
* Start an ADC conversion and wait for the result. Note that
* synchronised ADC conversions (via the ADCSYNC pin) must wait
* until the trigger is asserted and the conversion is finished.
*
* This function currently spins waiting for the conversion to
* complete (2 frames max without sync).
*
* If called for a synchronised ADC conversion, it may sleep
* with the ADC semaphore held.
*/
unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
{
unsigned int val;
if (sync)
adc_channel |= UCB_ADC_SYNC_ENA;
ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
for (;;) {
val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
if (val & UCB_ADC_DAT_VAL)
break;
/* yield to other processes */
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(1);
}
return UCB_ADC_DAT(val);
}
/**
* ucb1x00_io_read - read the current state of the IO pins
* @ucb: UCB1x00 structure describing chip
*
* Return a bitfield describing the logic state of the ten
* general purpose IO pins.
*
* ucb1x00_enable must have been called to enable the comms
* before using this function.
*
* This function does not take any semaphores or spinlocks.
*/
unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
{
return ucb1x00_reg_read(ucb, UCB_IO_DATA);
}
