void
uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
{
struct uhci_cardbus_softc *sc = (struct uhci_cardbus_softc *)self;
struct cardbus_attach_args *ca = aux;
cardbus_devfunc_t ct = ca->ca_ct;
cardbus_chipset_tag_t cc = ct->ct_cc;
cardbus_function_tag_t cf = ct->ct_cf;
cardbusreg_t csr;
char devinfo[256];
usbd_status r;
const char *vendor;
const char *devname = sc->sc.sc_bus.bdev.dv_xname;
cardbus_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
printf(" %s", devinfo);
/* Map I/O registers */
if (Cardbus_mapreg_map(ct, PCI_CBIO, CARDBUS_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
printf("%s: can't map io space\n", devname);
return;
}
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc->sc_cc = cc;
sc->sc_cf = cf;
sc->sc_ct = ct;
sc->sc.sc_bus.dmatag = ca->ca_dmat;
(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE);
(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
/* Enable the device. */
csr = cardbus_conf_read(cc, cf, ca->ca_tag,
CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
csr | CARDBUS_COMMAND_MASTER_ENABLE
| CARDBUS_COMMAND_IO_ENABLE);
sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline,
IPL_USB, uhci_intr, sc, devname);
if (sc->sc_ih == NULL) {
printf("%s: couldn't establish interrupt\n", devname);
return;
}
printf(": irq %d\n", ca->ca_intrline);
/* Set LEGSUP register to its default value. */
cardbus_conf_write(cc, cf, ca->ca_tag, PCI_LEGSUP,
PCI_LEGSUP_USBPIRQDEN);
switch(cardbus_conf_read(cc, cf, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
uhci_run(&sc->sc, 0); /* stop the controller */
/* disable interrupts */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
/* Figure out vendor for root hub descriptor. */
vendor = cardbus_findvendor(ca->ca_id);
sc->sc.sc_id_vendor = CARDBUS_VENDOR(ca->ca_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
"vendor 0x%04x", CARDBUS_VENDOR(ca->ca_id));
r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r);
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
return;
}
/* Attach usb device. */
sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
usbctlprint);
}
void
uhci_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
char const *intrstr;
pci_intr_handle_t ih;
const char *vendor;
char *devname = sc->sc.sc_bus.bdev.dv_xname;
int s;
/* Map I/O registers */
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
printf(": can't map i/o space\n");
return;
}
/* Disable interrupts, so we don't get any spurious ones. */
s = splhardusb();
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc->sc_pc = pc;
sc->sc_tag = tag;
sc->sc.sc_bus.dmatag = pa->pa_dmat;
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
printf(": couldn't map interrupt\n");
goto unmap_ret;
}
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc,
devname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
goto unmap_ret;
}
printf(": %s\n", intrstr);
/* Set LEGSUP register to its default value. */
pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
uhci_run(&sc->sc, 0); /* stop the controller */
/* disable interrupts */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
/* Figure out vendor for root hub descriptor. */
vendor = pci_findvendor(pa->pa_id);
sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(pa->pa_id));
config_defer(self, uhci_pci_attach_deferred);
/* Ignore interrupts for now */
sc->sc.sc_bus.dying = 1;
splx(s);
return;
unmap_ret:
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
splx(s);
}
