Inline void upd72001_write_brg(VP addr, UB reg, UB val, UB brg2, UB brg1) { upd72001_write_reg(addr, reg); upd72001_write_reg(addr, val); upd72001_write_reg(addr, brg2); upd72001_write_reg(addr, brg1); (void) upd72001_read_reg(addr); /* ダミーリード */ }
Inline void upd72001_write_brg(void *addr, uint8_t reg, uint8_t val, uint8_t brg2, uint8_t brg1) { upd72001_write_reg(addr, reg); upd72001_write_reg(addr, val); upd72001_write_reg(addr, brg2); upd72001_write_reg(addr, brg1); (void) upd72001_read_reg(addr); /* ダミーリード */ }
/* * シリアルI/Oポートのオープン */ SIOPCB * upd72001_opn_por(ID siopid, VP_INT exinf) { SIOPCB *siopcb; const SIOPINIB *siopinib; siopcb = get_siopcb(siopid); siopinib = siopcb->siopinib; upd72001_write_reg(siopinib->ctrl, CR_RESET); if (!upd72001_openflag()) { upd72001_write_ctrl((VP) TADR_UPD72001_CTRLA, UPD72001_CR2, 0x18); upd72001_write_ctrl((VP) TADR_UPD72001_CTRLB, UPD72001_CR2, 0x00); } siopcb->cr1 = CR1_DOWN; upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR1, siopcb->cr1); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR4, siopinib->cr4_def); upd72001_write_brg(siopinib->ctrl, UPD72001_CR12, 0x01, siopinib->brg2_def, siopinib->brg1_def); upd72001_write_brg(siopinib->ctrl, UPD72001_CR12, 0x02, siopinib->brg2_def, siopinib->brg1_def); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR15, CR15_DEF); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR14, CR14_DEF); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR10, CR10_DEF); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR3, siopinib->cr3_def); upd72001_write_ctrl(siopinib->ctrl, UPD72001_CR5, siopinib->cr5_def); siopcb->exinf = exinf; siopcb->getready = siopcb->putready = FALSE; siopcb->openflag = TRUE; return(siopcb); }
/* * シリアルI/Oポートのオープン */ SIOPCB * upd72001_opn_por(ID siopid, intptr_t exinf) { SIOPCB *p_siopcb; const SIOPINIB *p_siopinib; p_siopcb = get_siopcb(siopid); p_siopinib = p_siopcb->p_siopinib; upd72001_write_reg(p_siopinib->ctrl, CR_RESET); if (!upd72001_openflag()) { upd72001_write_ctrl((void *) TADR_UPD72001_CTRLA, UPD72001_CR2, 0x18); upd72001_write_ctrl((void *) TADR_UPD72001_CTRLB, UPD72001_CR2, 0x00); } p_siopcb->cr1 = CR1_DOWN; upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR1, p_siopcb->cr1); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR4, p_siopinib->cr4_def); upd72001_write_brg(p_siopinib->ctrl, UPD72001_CR12, 0x01U, p_siopinib->brg2_def, p_siopinib->brg1_def); upd72001_write_brg(p_siopinib->ctrl, UPD72001_CR12, 0x02U, p_siopinib->brg2_def, p_siopinib->brg1_def); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR15, CR15_DEF); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR14, CR14_DEF); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR10, CR10_DEF); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR3, p_siopinib->cr3_def); upd72001_write_ctrl(p_siopinib->ctrl, UPD72001_CR5, p_siopinib->cr5_def); p_siopcb->exinf = exinf; p_siopcb->getready = false; p_siopcb->putready = false; p_siopcb->openflag = true; return(p_siopcb); }
/* * 送信する文字の書込み */ Inline void upd72001_putchar(SIOPCB *siopcb, char c) { siopcb->putready = FALSE; upd72001_write_reg(siopcb->siopinib->data, (UB) c); }
Inline void upd72001_write_ctrl(VP addr, UB reg, UB val) { upd72001_write_reg(addr, reg); upd72001_write_reg(addr, val); }
Inline UB upd72001_read_ctrl(VP addr, UB reg) { upd72001_write_reg(addr, reg); return(upd72001_read_reg(addr)); }
/* * 送信する文字の書込み */ Inline void upd72001_putchar(SIOPCB *p_siopcb, char c) { p_siopcb->putready = false; upd72001_write_reg(p_siopcb->p_siopinib->data, (uint8_t) c); }
Inline void upd72001_write_ctrl(void *addr, uint8_t reg, uint8_t val) { upd72001_write_reg(addr, reg); upd72001_write_reg(addr, val); }
Inline uint8_t upd72001_read_ctrl(void *addr, uint8_t reg) { upd72001_write_reg(addr, reg); return(upd72001_read_reg(addr)); }