void J_IDLE() { long skip; update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else J(); }
static void tick_handler(struct tm *tick_time, TimeUnits units_changed) { if(window_is_loaded(s_time_window)) { update_time(); } else { update_count(); } }
static void ftrace_stacktrace_count(unsigned long ip, unsigned long parent_ip, void **data) { if (!tracing_is_on()) return; if (update_count(data)) trace_dump_stack(STACK_SKIP); }
static void ftrace_traceoff_count(unsigned long ip, unsigned long parent_ip, void **data) { if (!tracing_is_on()) return; if (update_count(data)) tracing_off(); }
string to_string (float minimal_update_count = 0.0) const { if (sample_count < minimal_update_count) return " "; ostringstream out; char buf [100]; sprintf (buf, "%+3.3f(%5.0f)", mean(), update_count()); out << buf; return out.str (); }
void BC1TL_IDLE() { long skip; if ((FCR31 & 0x800000)!=0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BC1TL(); } else BC1TL(); }
void BGEZALL_IDLE() { long skip; if (irs >= 0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BGEZALL(); } else BGEZALL(); }
void BLTZ_IDLE() { long skip; if (irs < 0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BLTZ(); } else BLTZ(); }
void BGEZ_IDLE(void) { int skip; if (irs >= 0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BGEZ(); } else BGEZ(); }
void BC1F_IDLE(void) { int skip; if ((FCR31 & 0x800000)==0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BC1F(); } else BC1F(); }
void BLTZALL_IDLE(void) { int skip; if (irs < 0) { update_count(); skip = next_interupt - Count; if (skip > 3) Count += (skip & 0xFFFFFFFC); else BLTZALL(); } else BLTZALL(); }
void BC1T() { if (check_cop1_unusable()) return; PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if ((FCR31 & 0x800000)!=0 && !skip_jump) PC += (PC-2)->f.i.immediate-1; last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void J_OUT() { jump_target = (PC->addr & 0xF0000000) | (PC->f.j.inst_index<<2); PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (!skip_jump) jump_to(jump_target); last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void BGEZ() { local_rs = irs; PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (local_rs >= 0 && !skip_jump) PC += (PC-2)->f.i.immediate - 1; last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void J() { PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (!skip_jump) PC=actual->block+ (((((PC-2)->f.j.inst_index<<2) | ((PC-1)->addr & 0xF0000000))-actual->start)>>2); last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void BGEZL(void) { if (irs >= 0) { PC++; delay_slot=1; #ifdef DBG if (g_DebuggerActive) update_debugger(PC->addr); #endif PC->ops(); update_count(); delay_slot=0; if(!skip_jump) PC += (PC-2)->f.i.immediate-1; } else { PC+=2; update_count(); } last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void BC1TL(void) { if (check_cop1_unusable()) return; if ((FCR31 & 0x800000)!=0) { PC++; delay_slot=1; #ifdef DBG if (debugger_mode) update_debugger(PC->addr); #endif PC->ops(); update_count(); delay_slot=0; if(!skip_jump) PC += (PC-2)->f.i.immediate-1; } else { PC+=2; update_count(); } last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void BGEZL_OUT(void) { if (irs >= 0) { jump_target = (int)PC->f.i.immediate; PC++; delay_slot=1; #ifdef DBG if (g_DebuggerActive) update_debugger(PC->addr); #endif PC->ops(); update_count(); delay_slot=0; if (!skip_jump) jump_to(PC->addr + ((jump_target-1)<<2)); } else { PC+=2; update_count(); } last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void BC1T_OUT() { if (check_cop1_unusable()) return; jump_target = (long)PC->f.i.immediate; PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (!skip_jump && (FCR31 & 0x800000)!=0) jump_to(PC->addr + ((jump_target-1)<<2)); last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void dma_si_read() { int i; if (si_register.si_pif_addr_rd64b != 0x1FC007C0) { // printf("unknown SI use\n"); stop=1; } update_pif_read(); for (i=0; i<(64/4); i++) rdram[si_register.si_dram_addr/4+i] = sl(PIF_RAM[i]); update_count(); add_interupt_event(SI_INT, /*0x100*/0x900); }
static uint read_mailbox(const char *arg, mlhead_t *msgs) { if (verbose) { printf("Reading %s\n", arg); fflush(stdout); } init_count(); mbox_mode = true; bogoreader_init(1, &arg); while ((*reader_more)()) { wordhash_t *whp = NULL; wordhash_t *whc = wordhash_new(); collect_words(whc); if (ds_path != NULL && (msgs_good + msgs_bad) == 0) set_train_msg_counts(whc); if (whc->count == 0 && !quiet) { printf("msg #%u, count is %u\n", message_count, whc->count); bt_trap(); } if (bogolex_file != NULL) { wordhash_sort(whc); lookup_words(whc); write_msgcount_file(whc); } else if (whc->count != 0) { if (!msg_count_file) whp = convert_wordhash_to_propslist(whc, train); else whp = convert_propslist_to_countlist(whc); msglist_add(msgs, whp); } update_count(); if (whc != whp) wordhash_free(whc); } print_final_count(); ns_and_sp->count += message_count; bogoreader_fini(); return message_count; }
void BGEZ_OUT() { local_rs = irs; jump_target = (long)PC->f.i.immediate; PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (!skip_jump && local_rs >= 0) jump_to(PC->addr + ((jump_target-1)<<2)); last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
int write_ai_regs(void* opaque, uint32_t address, uint32_t value, uint32_t mask) { struct ai_controller* ai = (struct ai_controller*)opaque; uint32_t reg = ai_reg(address); unsigned int freq,delay=0; switch (reg) { case AI_LEN_REG: masked_write(&ai->regs[AI_LEN_REG], value, mask); audio.aiLenChanged(); freq = ROM_PARAMS.aidacrate / (ai->regs[AI_DACRATE_REG]+1); if (freq) delay = (unsigned int) (((unsigned long long)ai->regs[AI_LEN_REG]*ai->vi->delay*ROM_PARAMS.vilimit)/(freq*4)); if (ai->regs[AI_STATUS_REG] & 0x40000000) // busy { ai->fifo[1].delay = delay; ai->fifo[1].length = ai->regs[AI_LEN_REG]; ai->regs[AI_STATUS_REG] |= 0x80000000; } else { ai->fifo[0].delay = delay; ai->fifo[0].length = ai->regs[AI_LEN_REG]; update_count(); add_interupt_event(AI_INT, delay); ai->regs[AI_STATUS_REG] |= 0x40000000; } return 0; case AI_STATUS_REG: clear_rcp_interrupt(ai->r4300, MI_INTR_AI); return 0; case AI_DACRATE_REG: if ((ai->regs[AI_DACRATE_REG] & mask) != (value & mask)) { masked_write(&ai->regs[AI_DACRATE_REG], value, mask); audio.aiDacrateChanged(ROM_PARAMS.systemtype); } return 0; } masked_write(&ai->regs[reg], value, mask); return 0; }
void *calculate_ams_all() { int stop = FALSE; gpointer value_t, key_t; while( TRUE ) { pthread_mutex_lock( &iter_mutex ); if( !finish && g_hash_table_iter_next( &iter_t, &key_t, &value_t ) ){ update_count(); } else { stop = TRUE; finish=TRUE; } pthread_mutex_unlock( &iter_mutex ); if( stop ) { break; } calculate_ams_all_serial( (word_count *)value_t, key_t ); } return NULL; }
void JAL() { PC++; delay_slot=1; PC->ops(); update_count(); delay_slot=0; if (!skip_jump) { reg[31]=PC->addr; sign_extended(reg[31]); PC=actual->block+ (((((PC-2)->f.j.inst_index<<2) | ((PC-1)->addr & 0xF0000000))-actual->start)>>2); }
sboard::sboard(QWidget *parent) : QWidget(parent),port(8888) { setupUi(this); /* the default scoreboard is for karate but the abstraction with scoreBase means in the future we could have more types of scoring systems */ scores = 0; timer = new QTimer(this); disp = new QTimer(this); disp->setInterval(15000); timer->setInterval(10); connect(timer,SIGNAL(timeout()),this,SLOT(update_count())); connect(disp,SIGNAL(timeout()),this,SLOT(update_display())); }
void BC1TL_OUT(void) { if (check_cop1_unusable()) return; if ((FCR31 & 0x800000)!=0) { jump_target = (int)PC->f.i.immediate; PC++; delay_slot=1; #ifdef DBG if (debugger_mode) update_debugger(PC->addr); #endif PC->ops(); update_count(); delay_slot=0; if (!skip_jump) jump_to(PC->addr + ((jump_target-1)<<2)); } else { PC+=2; update_count(); } last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }
void MFC0(void) { switch(PC->f.r.nrd) { case 1: DebugMessage(M64MSG_ERROR, "MFC0 instruction reading un-implemented Random register"); stop=1; case 9: // Count update_count(); default: rrt32 = reg_cop0[PC->f.r.nrd]; sign_extended(rrt); } PC++; }
int lcd_spi_complete_event(void * context, const void * data){ int j; int i; //deassert CS each time a SPI event completes deassert_cs(); i = lcd_page - 0xB0; if( i == LCD_COLS ){ lcd_hold = 0x00; update_count(); //interrupt again on next timer match return 0; //all done } switch(lcd_write_state){ case LCD_WRITE_PAGE: command_mode(); lcd_buffer[0] = lcd_page; lcd_buffer[1] = 0x10; lcd_buffer[2] = 0x00; op.nbyte = 3; assert_cs(); lcd_write_state = LCD_WRITE_DATA; hwpl_spi_write(context, &op); return 1; case LCD_WRITE_DATA: data_mode(); assert_cs(); for(j=0;j<LCD_ROWS;j++){ //128 rows high lcd_buffer[j] = mem[LCD_ROWS - j - 1][i]; } op.nbyte = LCD_ROWS; lcd_page++; lcd_write_state = LCD_WRITE_PAGE; hwpl_spi_write(context, &op); break; } return 1; }
void BC1T(void) { if (check_cop1_unusable()) return; PC++; delay_slot=1; #ifdef DBG if (g_DebuggerActive) update_debugger(PC->addr); #endif PC->ops(); update_count(); delay_slot=0; if ((FCR31 & 0x800000)!=0 && !skip_jump) PC += (PC-2)->f.i.immediate-1; last_addr = PC->addr; if (next_interupt <= Count) gen_interupt(); }