static void
i915LightModelfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
{
DBG("%s\n", __FUNCTION__);
if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
update_specular(ctx);
}
}
static void i830LightModelfv(GLcontext *ctx, GLenum pname,
const GLfloat *param)
{
if (INTEL_DEBUG&DEBUG_DRI)
fprintf(stderr, "%s\n", __FUNCTION__);
if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
update_specular( ctx );
}
}
static void
i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLuint dw;
switch (cap) {
case GL_TEXTURE_2D:
break;
case GL_LIGHTING:
case GL_COLOR_SUM:
update_specular(ctx);
break;
case GL_ALPHA_TEST:
dw = i915->state.Ctx[I915_CTXREG_LIS6];
if (state)
dw |= S6_ALPHA_TEST_ENABLE;
else
dw &= ~S6_ALPHA_TEST_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_BLEND:
i915EvalLogicOpBlendState(ctx);
break;
case GL_COLOR_LOGIC_OP:
i915EvalLogicOpBlendState(ctx);
/* Logicop doesn't seem to work at 16bpp:
*/
if (ctx->Visual.rgbBits == 16)
FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
break;
case GL_FRAGMENT_PROGRAM_ARB:
break;
case GL_DITHER:
dw = i915->state.Ctx[I915_CTXREG_LIS5];
if (state)
dw |= S5_COLOR_DITHER_ENABLE;
else
dw &= ~S5_COLOR_DITHER_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_DEPTH_TEST:
dw = i915->state.Ctx[I915_CTXREG_LIS6];
if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
state = false;
if (state)
dw |= S6_DEPTH_TEST_ENABLE;
else
dw &= ~S6_DEPTH_TEST_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
i915DepthMask(ctx, ctx->Depth.Mask);
break;
case GL_SCISSOR_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
if (state)
i915->state.Buffer[I915_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
else
i915->state.Buffer[I915_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
break;
case GL_LINE_SMOOTH:
dw = i915->state.Ctx[I915_CTXREG_LIS4];
if (state)
dw |= S4_LINE_ANTIALIAS_ENABLE;
else
dw &= ~S4_LINE_ANTIALIAS_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
i915->state.Ctx[I915_CTXREG_LIS4] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_CULL_FACE:
i915CullFaceFrontFace(ctx, 0);
break;
case GL_STENCIL_TEST:
if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.stencilBits)
state = false;
dw = i915->state.Ctx[I915_CTXREG_LIS5];
if (state)
dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
else
dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_POLYGON_STIPPLE:
/* The stipple command worked on my 855GM box, but not my 845G.
* I'll do more testing later to find out exactly which hardware
* supports it. Disabled for now.
*/
if (i915->intel.hw_stipple &&
i915->intel.reduced_primitive == GL_TRIANGLES) {
I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
if (state)
i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
else
i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
}
break;
case GL_POLYGON_SMOOTH:
break;
case GL_POINT_SPRITE:
/* Handle it at i915_update_sprite_point_enable () */
break;
case GL_POINT_SMOOTH:
break;
default:
;
}
}
static void
i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
{
struct i830_context *i830 = i830_context(ctx);
switch (cap) {
case GL_LIGHTING:
case GL_COLOR_SUM:
update_specular(ctx);
break;
case GL_ALPHA_TEST:
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
if (state)
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
else
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
break;
case GL_BLEND:
i830EvalLogicOpBlendState(ctx);
break;
case GL_COLOR_LOGIC_OP:
i830EvalLogicOpBlendState(ctx);
/* Logicop doesn't seem to work at 16bpp:
*/
if (i830->intel.ctx.Visual.rgbBits == 16)
FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
break;
case GL_DITHER:
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
if (state)
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
else
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
break;
case GL_DEPTH_TEST:
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
if (state)
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
else
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
/* Also turn off depth writes when GL_DEPTH_TEST is disabled:
*/
i830DepthMask(ctx, ctx->Depth.Mask);
break;
case GL_SCISSOR_TEST:
I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
if (state)
i830->state.Buffer[I830_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
else
i830->state.Buffer[I830_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
break;
case GL_LINE_SMOOTH:
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
if (state)
i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
else
i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
break;
case GL_FOG:
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
if (state)
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
else
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
break;
case GL_CULL_FACE:
i830CullFaceFrontFace(ctx, 0);
break;
case GL_TEXTURE_2D:
break;
case GL_STENCIL_TEST:
{
GLboolean hw_stencil = GL_FALSE;
if (ctx->DrawBuffer) {
struct intel_renderbuffer *irbStencil
= intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
hw_stencil = (irbStencil && irbStencil->region);
}
if (hw_stencil) {
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
if (state) {
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
}
else {
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
~ENABLE_STENCIL_WRITE;
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
DISABLE_STENCIL_WRITE;
}
}
else {
FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
}
}
break;
case GL_POLYGON_STIPPLE:
/* The stipple command worked on my 855GM box, but not my 845G.
* I'll do more testing later to find out exactly which hardware
* supports it. Disabled for now.
*/
if (i830->intel.hw_stipple &&
i830->intel.reduced_primitive == GL_TRIANGLES) {
I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
if (state)
i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
}
break;
default:
;
}
}
static void
i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
switch (cap) {
case GL_TEXTURE_2D:
break;
case GL_LIGHTING:
case GL_COLOR_SUM:
update_specular(ctx);
break;
case GL_ALPHA_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
if (state)
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
break;
case GL_BLEND:
i915EvalLogicOpBlendState(ctx);
break;
case GL_COLOR_LOGIC_OP:
i915EvalLogicOpBlendState(ctx);
/* Logicop doesn't seem to work at 16bpp:
*/
if (i915->intel.intelScreen->cpp == 2) /* XXX FBO fix */
FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
break;
case GL_FRAGMENT_PROGRAM_ARB:
break;
case GL_DITHER:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
if (state)
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
break;
case GL_DEPTH_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
if (state)
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
i915DepthMask(ctx, ctx->Depth.Mask);
break;
case GL_SCISSOR_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
if (state)
i915->state.Buffer[I915_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
else
i915->state.Buffer[I915_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
break;
case GL_LINE_SMOOTH:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
if (state)
i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
break;
case GL_FOG:
break;
case GL_CULL_FACE:
i915CullFaceFrontFace(ctx, 0);
break;
case GL_STENCIL_TEST:
{
GLboolean hw_stencil = GL_FALSE;
if (ctx->DrawBuffer) {
struct intel_renderbuffer *irbStencil
= intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
hw_stencil = (irbStencil && irbStencil->region);
}
if (hw_stencil) {
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
if (state)
i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);
else
i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);
}
else {
FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
}
}
break;
case GL_POLYGON_STIPPLE:
/* The stipple command worked on my 855GM box, but not my 845G.
* I'll do more testing later to find out exactly which hardware
* supports it. Disabled for now.
*/
if (i915->intel.hw_stipple &&
i915->intel.reduced_primitive == GL_TRIANGLES) {
I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
if (state)
i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
else
i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
}
break;
case GL_POLYGON_SMOOTH:
break;
case GL_POINT_SMOOTH:
break;
default:
;
}
}
