/*
* ISR: service for P-path interrupt.
*/
static irqreturn_t on_camif_irq_p(int irq, void * dev)
{
u32 ciprstatus;
u32 frame;
struct s3c2440camif_dev * pdev;
ciprstatus = ioread32(S3C244X_CIPRSTATUS);
if ((ciprstatus & (1<<21))== 0)
{
return IRQ_RETVAL(IRQ_NONE);
}
pdev = (struct s3c2440camif_dev *)dev;
/* valid img_buff[x] just DMAed. */
frame = (ciprstatus&(3<<26))>>26;
frame = (frame+4-1)%4;
img_buff[frame].state = CAMIF_BUFF_RGB565;
if (pdev->cmdcode & CAMIF_CMD_STOP)
{
stop_capture(pdev);
pdev->state = CAMIF_STATE_READY;
}
else
{
if (pdev->cmdcode & CAMIF_CMD_P2C)
{
camif_c2p(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_WND)
{
update_target_wnd_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_TFMT)
{
update_target_fmt_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_ZOOM)
{
update_target_zoom_regs(pdev);
}
invalid_image_buffer();
}
pdev->cmdcode = CAMIF_CMD_NONE;
wake_up(&pdev->cmdqueue);
return IRQ_RETVAL(IRQ_HANDLED);
}
/* update camif registers, called only when camif ready, or ISR. */
static void __inline__ update_camif_regs(s3c2440camif_dev * pdev)
{
if (!in_irq())
{
while(1) // wait until VSYNC is 'L'
{
barrier();
if ((ioread32(S3C244X_CICOSTATUS)&(1<<28)) == 0)
break;
}
}
/* WARNING: don't change the statement sort below!!! */
update_source_fmt_regs(pdev);
update_target_wnd_regs(pdev);
update_target_fmt_regs(pdev);
update_target_zoom_regs(pdev);
}
/*
* ISR: service for P-path interrupt.
*/
static irqreturn_t on_camif_irq_p(int irq, void * dev)
{
u32 ciprstatus;
u32 frame;
s3c2440camif_dev * pdev;
//printk(KERN_ALERT"on_camif_irq_p\n");
ciprstatus = ioread32(S3C244X_CIPRSTATUS);
if ((ciprstatus & (1<<21))== 0)
{
return IRQ_RETVAL(IRQ_NONE);
}
pdev = (s3c2440camif_dev *)dev;
/* valid img_buff[x] just DMAed. */
frame = (ciprstatus&(3<<26))>>26;
frame = (frame+4-1)%4;
//printk(KERN_ALERT"on_camif_irq_p %d\n",frame);
pdev->last_frame=frame;
pdev->frame[frame].state = CAMIF_BUFF_RGB565;
if (pdev->cmdcode & CAMIF_CMD_STOP)
{
stop_capture(pdev);
pdev->state = CAMIF_STATE_READY;
}
else
{
if (pdev->cmdcode & CAMIF_CMD_P2C)
{
camif_c2p(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_WND)
{
update_target_wnd_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_TFMT)
{
update_target_fmt_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_ZOOM)
{
update_target_zoom_regs(pdev);
}
//TODO signal that all frames are invalid
}
pdev->cmdcode = CAMIF_CMD_NONE;
wake_up(&pdev->cmdqueue);
//wake_up(&pdev->cap_queue);
return IRQ_RETVAL(IRQ_HANDLED);
}
/*
* ISR: service for C-path interrupt.
*/
static irqreturn_t on_camif_irq_c(int irq, void * dev)
{
u32 cicostatus;
u32 frame;
int oflow_y,oflow_cb,oflow_cr;
s3c2440camif_dev * pdev;
cicostatus = ioread32(S3C244X_CICOSTATUS);
if ((cicostatus & (1<<21))== 0)
{
return IRQ_RETVAL(IRQ_NONE);
}
pdev = (s3c2440camif_dev *)dev;
/* valid img_buff[x] just DMAed. */
frame = (cicostatus&(3<<26))>>26;
//frame = (frame+4-1)%4;
oflow_y=(cicostatus&(1<<31))>>31;
oflow_cb=(cicostatus&(1<<30))>>30;
oflow_cr=(cicostatus&(1<<29))>>29;
//img_buff[frame].state = CAMIF_BUFF_YCbCr420;
pdev->frame[frame].state = CAMIF_BUFF_YCbCr422;
//printk(KERN_ALERT"%d %d %d %d\n",img_buff[0].state,img_buff[1].state,img_buff[2].state,img_buff[3].state);
pdev->last_frame=frame;
//printk(KERN_ALERT"on_camif_irq_c %d %d %d %d\n",frame,oflow_y,oflow_cb,oflow_cr);
if (pdev->cmdcode & CAMIF_CMD_STOP)
{
stop_capture(pdev);
pdev->state = CAMIF_STATE_READY;
}
else
{
if (pdev->cmdcode & CAMIF_CMD_C2P)
{
camif_c2p(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_WND)
{
update_target_wnd_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_TFMT)
{
update_target_fmt_regs(pdev);
}
if (pdev->cmdcode & CAMIF_CMD_ZOOM)
{
update_target_zoom_regs(pdev);
}
//invalid_image_buffer();
}
pdev->cmdcode = CAMIF_CMD_NONE;
wake_up(&pdev->cmdqueue);
//wake_up(&pdev->cap_queue);
return IRQ_RETVAL(IRQ_HANDLED);
}
