void uart_close(uint8_t port)
{
if (0 == port) {
// Disable interrupts
usart_disable_interrupt(USART_BASE_0, 0xFFFFFFFF);
// Close RS232 communication
USART_DISABLE_0();
}
else if (1 == port) {
// Disable interrupts
usart_disable_interrupt(USART_BASE_1, 0xFFFFFFFF);
// Close RS232 communication
USART_DISABLE_1();
}
}
/**
* \brief This function closes and disables communication in the specified
* USART.
*
* \param chn Communication channel [0, 1]
*
* \retval true on success.
* \retval false on failure.
*/
int8_t busart_if_close(uint8_t chn)
{
if (!busart_chn_open[chn]) {
return false;
}
switch (chn) {
#ifdef CONF_BOARD_USART0_RXD
case 0:
{
usart_disable_tx(USART0);
usart_disable_rx(USART0);
usart_disable_interrupt(USART0, US_IDR_RXRDY);
usart_disable_interrupt(USART0, US_IER_ENDRX);
/* Stop TC */
if (!busart_chn_open[1]) {
tc_stop(TC_USART, TC_USART_CHN);
}
return true;
}
break;
#endif
#ifdef CONF_BOARD_USART1_RXD
case 1:
{
usart_disable_tx(USART1);
usart_disable_rx(USART1);
usart_disable_interrupt(USART1, US_IDR_RXRDY);
usart_disable_interrupt(USART1, US_IER_ENDRX);
/* Stop TC */
if (!busart_chn_open[0]) {
tc_stop(TC_USART, TC_USART_CHN);
}
return true;
}
break;
#endif
default:
return false;
}
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
vector = get_serial_vector(obj);
irq_n = get_serial_irq_num(obj);
if (enable) {
switch (irq) {
case RxIrq:
usart_enable_interrupt(_USART(obj), US_IER_RXRDY);
break;
case TxIrq:
break;
}
NVIC_ClearPendingIRQ(irq_n);
NVIC_DisableIRQ(irq_n);
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
} else {
switch (irq) {
case RxIrq:
usart_disable_interrupt(_USART(obj), US_IER_RXRDY);
break;
case TxIrq:
break;
}
NVIC_DisableIRQ(irq_n);
}
}
platform_result_t platform_uart_deinit( platform_uart_driver_t* driver )
{
usart_disable_interrupt( driver->peripheral->peripheral, 0xffffffff );
NVIC_DisableIRQ( platform_uarts_irq_numbers[driver->peripheral->uart_id] );
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->peripheral ), PERIPH_PTCR_TXTDIS | PERIPH_PTCR_RXTDIS );
usart_disable_tx( driver->peripheral->peripheral );
usart_disable_rx( driver->peripheral->peripheral );
sysclk_disable_peripheral_clock( driver->peripheral->peripheral_id );
platform_gpio_deinit( driver->peripheral->tx_pin );
platform_gpio_deinit( driver->peripheral->rx_pin );
if ( driver->peripheral->cts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->cts_pin );
}
if ( driver->peripheral->rts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->rts_pin );
}
host_rtos_deinit_semaphore( &driver->tx_dma_complete );
host_rtos_deinit_semaphore( &driver->rx_dma_complete );
driver->peripheral = NULL;
memset( driver, 0, sizeof(platform_uart_driver_t) );
return WICED_SUCCESS;
}
/**
* \brief Initializes a ISO7816 interface device.
*
* \param p_usart_opt Pointer to an ISO7816 instance.
* \param ul_mck USART module input clock frequency.
* \param ul_rst_pin_idx Control smart card RST pin index.
*/
unsigned int iso7816_init(const usart_iso7816_opt_t *p_usart_opt,
uint32_t ul_mck, uint32_t ul_rst_pin_idx)
{
/* Pin RST of ISO7816 initialize. */
gs_ul_rst_pin_idx = ul_rst_pin_idx;
#if defined(SMART_CARD_USING_GPIO)
gpio_set_pin_low(gs_ul_rst_pin_idx);
#elif defined(SMART_CARD_USING_IOPORT)
ioport_set_pin_level(gs_ul_rst_pin_idx, IOPORT_PIN_LEVEL_LOW);
#endif
/* Init the global variable for ISO7816. */
g_ul_clk = ul_mck;
if(usart_init_iso7816(ISO7816_USART, p_usart_opt, g_ul_clk)){
return 1;
}
/* Disable interrupts. */
usart_disable_interrupt(ISO7816_USART, 0xffffffff);
/* Write the Timeguard Register. */
usart_set_tx_timeguard(ISO7816_USART, 5);
/* Enable TX and RX. */
usart_enable_rx(ISO7816_USART);
//usart_enable_tx(ISO7816_USART);
return 0;
}
/**
* \brief USART RS485 mode configuration.
*
* Configure USART in RS485 mode, asynchronous, 8 bits, 1 stop bit,
* no parity, 256000 bauds and enable its transmitter and receiver.
*/
static void configure_usart(void)
{
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in RS485 mode. */
usart_init_rs485(BOARD_USART, &usart_console_settings,
sysclk_get_cpu_hz());
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief Configure USART in synchronous mode.
*
* \param ul_ismaster 1 for master, 0 for slave.
* \param ul_baudrate Baudrate for synchronous communication.
*
*/
static void configure_usart(uint32_t ul_ismaster, uint32_t ul_baudrate)
{
sam_usart_opt_t usart_console_settings = {
0,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
usart_console_settings.baudrate = ul_baudrate;
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in SYNC. master or slave mode. */
if (ul_ismaster) {
usart_init_sync_master(BOARD_USART, &usart_console_settings, sysclk_get_peripheral_hz());
} else {
usart_init_sync_slave(BOARD_USART, &usart_console_settings);
}
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief Interrupt handler for USART.
*
* Increment the number of bytes received in the current second and start
* another transfer if the desired bps has not been met yet.
*
*/
void USART_Handler(void)
{
uint32_t ul_status;
tc_stop(TC0, 0);
/* Read USART status. */
ul_status = usart_get_status(BOARD_USART);
/* Receive buffer is full. */
if (ul_status & US_CSR_RXBUFF) {
g_ul_bytes_received += 2 * BUFFER_SIZE;
if (g_ul_bytes_received < MAX_BPS) {
/* Restart transfer if BPS is not high enough. */
g_st_packet.ul_addr = (uint32_t)gs_puc_buffer;
g_st_packet.ul_size = BUFFER_SIZE;
g_st_nextpacket.ul_addr = (uint32_t)gs_puc_nextbuffer;
g_st_nextpacket.ul_size = BUFFER_SIZE;
pdc_rx_init(g_p_pdc, &g_st_packet, &g_st_nextpacket);
} else {
/* Otherwise disable interrupt. */
usart_disable_interrupt(BOARD_USART, US_IDR_RXBUFF);
}
memcpy(gs_dump_buffer, gs_puc_buffer, BUFFER_SIZE);
}
tc_start(TC0, 0);
}
/**
* \brief USART RS485 mode configuration.
*
* Configure USART in RS485 mode, asynchronous, 8 bits, 1 stop bit,
* no parity, 256000 bauds and enable its transmitter and receiver.
*/
void configure_usart(void)
{
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in RS485 mode. */
//jsi 7feb16 we want rs232 not rs485 for our application usart_init_rs485(BOARD_USART, &usart_console_settings,
//jsi 7feb16 we want rs232 not rs485 for our application sysclk_get_cpu_hz());
usart_init_rs232(BOARD_USART, &usart_console_settings, sysclk_get_cpu_hz());
/* enable transmitter timeguard, 4 bit period delay. */
usart_set_tx_timeguard(BOARD_USART, 4);
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief USART IRQ handler.
*
* Interrupt handler for USART. After reception is done, set g_ul_recv_done to true,
* and if transmission is done, set g_ul_sent_done to true.
*
*/
void USART_Handler(void)
{
uint32_t ul_status;
/* Read USART Status. */
ul_status = usart_get_status(BOARD_USART);
/* Receive buffer is full. */
if ((ul_status & US_CSR_RXBUFF) && (g_uc_state == STATE_READ)) {
g_ul_recv_done = true;
usart_disable_interrupt(BOARD_USART, US_IDR_RXBUFF);
}
if ((ul_status & US_CSR_TXBUFE) && (g_uc_state == STATE_WRITE)) {
g_ul_sent_done = true;
usart_disable_interrupt(BOARD_USART, US_IDR_TXBUFE);
}
}
void uart_close(uint8_t port)
{
UNUSED(port);
// Disable interrupts
usart_disable_interrupt(USART_BASE, 0xFFFFFFFF);
// Close RS232 communication
USART_DISABLE();
}
/**
* \brief Interrupt handler for USART interrupt.
*/
void console_uart_irq_handler(void)
{
/* Get USART status and check if CMP is set */
if (usart_get_status(CONSOLE_UART) & US_CSR_CMP) {
cmp_flag = 1;
/* Disable USART IRQ */
usart_disable_interrupt(CONSOLE_UART, US_IDR_CMP);
}
}
int serial_rx_irq_handler_asynch(serial_t *obj)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
uint32_t ul_status, ulmask;
/* Read USART Status. */
ul_status = usart_get_status(_USART(obj));
ulmask = usart_get_interrupt_mask(_USART(obj));
ul_status &= ulmask;
if (ul_status & US_CSR_OVRE) { /* Overrun Error */
usart_disable_interrupt(_USART(obj), US_IDR_OVRE);
serial_rx_abort_asynch(obj);
return SERIAL_EVENT_RX_OVERFLOW;
}
if (ul_status & US_CSR_FRAME) { /* Framing Error */
usart_disable_interrupt(_USART(obj), US_IDR_FRAME);
serial_rx_abort_asynch(obj);
return SERIAL_EVENT_RX_FRAMING_ERROR;
}
if (ul_status & US_CSR_PARE) { /* Parity Error */
usart_disable_interrupt(_USART(obj), US_IDR_PARE);
serial_rx_abort_asynch(obj);
return SERIAL_EVENT_RX_PARITY_ERROR;
}
if ((ul_status & (US_IER_RXBUFF | US_IER_CMP)) == (US_IER_RXBUFF | US_IER_CMP)) { /* Character match in last character in transfer*/
usart_disable_interrupt(_USART(obj), US_IDR_CMP);
serial_rx_abort_asynch(obj);
return SERIAL_EVENT_RX_COMPLETE|SERIAL_EVENT_RX_CHARACTER_MATCH;
}
if (ul_status & US_IER_CMP) { /* Character match */
usart_disable_interrupt(_USART(obj), US_IDR_CMP);
if (pSERIAL_S(obj)->events == SERIAL_EVENT_RX_CHARACTER_MATCH) { /*if character match is the only event abort transfer */
serial_rx_abort_asynch(obj);
}
return SERIAL_EVENT_RX_CHARACTER_MATCH;
}
if (ul_status & US_IER_RXBUFF) { /* Reception Complete */
serial_rx_abort_asynch(obj);
return SERIAL_EVENT_RX_COMPLETE;
}
return 0;
}
/**
* \brief USART IRQ Handler, handling RXBUFF and TXBUFE status.
*/
void USART_Handler(void)
{
uint32_t ul_status;
/* Read USART Status. */
ul_status = usart_get_status(BOARD_USART);
/* Receiving is done. */
if ((ul_status & US_CSR_RXBUFF) && (g_uc_state == STATE_RECEIVE)) {
g_ul_recv_done = true;
usart_disable_interrupt(BOARD_USART, US_IDR_RXBUFF);
}
/* Transmitting is done. */
if ((ul_status & US_CSR_TXBUFE) && (g_uc_state == STATE_TRANSMIT)) {
g_ul_sent_done = true;
usart_disable_interrupt(BOARD_USART, US_IDR_TXBUFE);
}
}
void serial_tx_abort_asynch(serial_t *obj)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
Pdc *pdc_base;
usart_disable_interrupt(_USART(obj), US_IER_TXBUFE);
pdc_base = usart_get_pdc_base(_USART(obj));
pdc_disable_transfer(pdc_base, PERIPH_PTCR_TXTEN);
pSERIAL_S(obj)->acttra = false;
}
/*
* See the serial.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
uint32_t ulChar;
xComPortHandle xReturn;
const sam_usart_opt_t xUSARTSettings =
{
ulWantedBaud,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
0 /* Only used in IrDA mode. */
};
/* Create the queues used to hold Rx/Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* If the queues were created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
{
/* Enable the peripheral clock in the PMC. */
pmc_enable_periph_clk( serPMC_USART_ID );
/* Configure USART in serial mode. */
usart_init_rs232( serUSART_PORT, &xUSARTSettings, sysclk_get_cpu_hz() );
/* Disable all the interrupts. */
usart_disable_interrupt( serUSART_PORT, serMASK_ALL_INTERRUPTS );
/* Enable the receiver and transmitter. */
usart_enable_tx( serUSART_PORT );
usart_enable_rx( serUSART_PORT );
/* Clear any characters before enabling interrupt. */
usart_getchar( serUSART_PORT, &ulChar );
/* Enable Rx end interrupt. */
usart_enable_interrupt( serUSART_PORT, US_IER_RXRDY );
/* Configure and enable interrupt of USART. */
NVIC_SetPriority( serUSART_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( serUSART_IRQ );
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
/**
* \brief Handler for USART interrupt.
*
*/
void USART_Handler(void)
{
uint32_t ul_status;
/* Read USART status. */
ul_status = usart_get_status(BOARD_USART);
/* Receiving interrupt. */
if ((ul_status & US_CSR_ENDRX) && (g_state == RECEIVING)) {
/* Indicate receiving finished. */
g_state = RECEIVED;
usart_disable_interrupt(BOARD_USART, US_IDR_ENDRX);
}
/* Transmitting interrupt. */
else if ((ul_status & US_CSR_ENDTX) && g_state == TRANSMITTING) {
/* Transmit continuously. */
g_state = TRANSMITTED;
usart_disable_interrupt(BOARD_USART, US_IDR_ENDTX);
}
}
/**
* \brief Interrupt handler for USART. Echo the bytes received and start the
* next receive.
*/
void USART0_Handler(void)
{
uint32_t status;
status = usart_get_status(USART0);
/* Check the LIN transmit complete flag */
if (status & US_IMR_LINTC) {
usart_disable_interrupt(USART0, US_IDR_LINTC);
ul_LIN_int_flag = 1;
}
}
/* ============================================= */
void UartBuffer_Init(void)
{
sysclk_enable_peripheral_clock(ID_USART0);
usart_init_rs232(USART0, &usart_console_settings, sysclk_get_cpu_hz());
usart_disable_interrupt(USART0, ALL_INTERRUPT_MASK);
usart_enable_tx(USART0);
usart_enable_rx(USART0);
usart_enable_interrupt(USART0, US_IER_RXRDY);
NVIC_EnableIRQ(USART0_IRQn);
TxIn = TxOut = 0;
RxIn = RxOut = 0;
}
/**
* \brief Handler for USART interrupt.
*
*/
void USART_Handler(void)
{
uint32_t ul_status;
uint8_t uc_char;
/* Read USART status. */
ul_status = usart_get_status(BOARD_USART);
/*transmit interrupt rises*/
if(ul_status & (US_IER_TXRDY | US_IER_TXEMPTY)) {
usart_disable_interrupt(BOARD_USART, (US_IER_TXRDY | US_IER_TXEMPTY));
}
/*receive interrupt rise, store character to receiver buffer*/
if((g_state == RECEIVING) && (usart_read(BOARD_USART, (uint32_t *)&uc_char) == 0)) {
*p_revdata++ = uc_char;
g_ulcount++;
if(g_ulcount >= BUFFER_SIZE) {
g_state = RECEIVED;
usart_disable_interrupt(BOARD_USART, US_IER_RXRDY);
}
}
}
/**
* \brief USART IRQ handler.
*
* Interrupt handler for USART. After reception is done, set g_ul_recv_done to true,
* and if transmission is done, set g_ul_sent_done to true.
*
*/
void USART0_Handler(void)
{
uint32_t ul_status;
uint8_t uc_char;
/* Read USART Status. */
ul_status = usart_get_status(BOARD_USART);
if(ul_status & (US_IER_TXRDY | US_IER_TXEMPTY)) {
usart_disable_interrupt(BOARD_USART, (US_IER_TXRDY | US_IER_TXEMPTY));
}
/* Receive register is full. */
if((g_uc_state == STATE_READ) && (usart_read(BOARD_USART, (uint32_t *)&uc_char) == 0)) {
*p_revdata++ = uc_char;
g_ulcount++;
if(g_ulcount >= BUFFER_SIZE) {
usart_disable_interrupt(BOARD_USART, US_IER_RXRDY);
g_ul_recv_done = true;
}
}
}
void serial_rx_abort_asynch(serial_t *obj)
{
IRQn_Type irq_n = (IRQn_Type)0;
/* Sanity check arguments */
MBED_ASSERT(obj);
Pdc *pdc_base;
usart_disable_interrupt(_USART(obj), US_IER_RXBUFF);
pdc_base = usart_get_pdc_base(_USART(obj));
pdc_disable_transfer(pdc_base, PERIPH_PTCR_RXTEN);
irq_n = get_serial_irq_num(obj);
NVIC_ClearPendingIRQ(irq_n);
NVIC_DisableIRQ(irq_n);
pSERIAL_S(obj)->actrec = false;
}
OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ), exit, err = kParamErr);
usart_disable_interrupt( driver->peripheral->port, 0xffffffff );
NVIC_DisableIRQ( platform_flexcom_irq_numbers[driver->peripheral->uart_id] );
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->port ), PERIPH_PTCR_TXTDIS | PERIPH_PTCR_RXTDIS );
usart_disable_tx( driver->peripheral->port );
usart_disable_rx( driver->peripheral->port );
if( pmc_is_periph_clk_enabled( driver->peripheral->peripheral_id ) == 1 ) {
flexcom_disable( driver->peripheral->flexcom_base );
}
platform_gpio_deinit( driver->peripheral->tx_pin );
platform_gpio_deinit( driver->peripheral->rx_pin );
if ( driver->peripheral->cts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->cts_pin );
}
if ( driver->peripheral->rts_pin != NULL )
{
platform_gpio_deinit( driver->peripheral->rts_pin );
}
#ifndef NO_MICO_RTOS
mico_rtos_deinit_semaphore(&driver->rx_complete);
mico_rtos_deinit_semaphore(&driver->tx_complete);
#endif
driver->peripheral = NULL;
memset( driver, 0, sizeof(platform_uart_driver_t) );
exit:
platform_mcu_powersave_enable();
return err;
}
/*
* It should be noted that the com test tasks (which use make use of this file)
* are included to demonstrate queues being used to communicate between tasks
* and interrupts, and to demonstrate a context switch being performed from
* inside an interrupt service routine. The serial driver used here is *not*
* intended to represent an efficient implementation. Real applications should
* make use of the USARTS peripheral DMA channel (PDC).
*/
void USART0_Handler( void )
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
uint8_t ucChar;
uint32_t ulChar;
uint32_t ulUSARTStatus, ulUSARTMask;
ulUSARTStatus = usart_get_status( serUSART_PORT );
ulUSARTMask = usart_get_interrupt_mask( serUSART_PORT );
ulUSARTStatus &= ulUSARTMask;
if( ( ulUSARTStatus & US_CSR_TXRDY ) != 0UL )
{
/* The interrupt was caused by the TX register becoming empty. Are
there any more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
USART now. */
usart_putchar( serUSART_PORT, ( uint32_t ) ucChar );
}
else
{
usart_disable_interrupt( serUSART_PORT, US_IER_TXRDY );
}
}
if( ( ulUSARTStatus & US_CSR_RXRDY ) != 0UL )
{
/* A character has been received on the USART, send it to the Rx
handler task. */
usart_getchar( serUSART_PORT, &ulChar );
ucChar = ( uint8_t ) ( ulChar & 0xffUL );
xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
}
/* If sending or receiving from a queue has caused a task to unblock, and
the unblocked task has a priority equal to or higher than the currently
running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
will have automatically been set to pdTRUE within the queue send or receive
function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
directly to the higher priority unblocked task. */
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
static void usart_handler(uint8_t port)
{
Usart* usart = get_usart(port);
uint32_t sr = usart_get_status(usart);
if (sr & US_CSR_RXRDY) {
// Data received
ui_com_tx_start();
uint32_t value;
bool b_error = usart_read(usart, &value) ||
(sr & (US_CSR_FRAME | US_CSR_TIMEOUT | US_CSR_PARE));
if (b_error) {
usart_reset_rx(usart);
usart_enable_rx(usart);
udi_cdc_multi_signal_framing_error(port);
ui_com_error();
}
// Transfer UART RX fifo to CDC TX
if (!udi_cdc_multi_is_tx_ready(port)) {
// Fifo full
udi_cdc_multi_signal_overrun(port);
ui_com_overflow();
} else {
udi_cdc_multi_putc(port, value);
}
ui_com_tx_stop();
return;
}
if (sr & US_CSR_TXRDY) {
// Data send
if (udi_cdc_multi_is_rx_ready(port)) {
// Transmit next data
ui_com_rx_start();
int c = udi_cdc_multi_getc(port);
usart_write(usart, c);
} else {
// Fifo empty then Stop UART transmission
usart_disable_tx(usart);
usart_disable_interrupt(usart, US_IDR_TXRDY);
ui_com_rx_stop();
}
}
}
/**
* Configure board USART communication with PC or other terminal.
*/
static void configure_usart(void)
{
static uint32_t ul_sysclk;
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Get system clock. */
ul_sysclk = sysclk_get_cpu_hz();
/* Enable peripheral clock. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART. */
usart_init_hw_handshaking(BOARD_USART, &usart_console_settings, ul_sysclk);
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Specify that stdout should not be buffered. */
#if defined(__GNUC__)
setbuf(stdout, NULL);
#else
/* Already the case in IAR's Normal DLIB default configuration: printf()
* emits one character at a time.
*/
#endif
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/*
* For internal use only.
* A common USART interrupt handler that is called for all USART peripherals.
*/
static void local_usart_handler(const portBASE_TYPE usart_index)
{
portBASE_TYPE higher_priority_task_woken = pdFALSE;
uint32_t usart_status;
freertos_pdc_rx_control_t *rx_buffer_definition;
usart_status = usart_get_status(
all_usart_definitions[usart_index].peripheral_base_address);
usart_status &= usart_get_interrupt_mask(
all_usart_definitions[usart_index].peripheral_base_address);
rx_buffer_definition = &(rx_buffer_definitions[usart_index]);
/* Has the PDC completed a transmission? */
if ((usart_status & US_CSR_ENDTX) != 0UL) {
usart_disable_interrupt(
all_usart_definitions[usart_index].peripheral_base_address,
US_IER_ENDTX);
/* If the driver is supporting multi-threading, then return the access
mutex. */
if (tx_dma_control[usart_index].peripheral_access_mutex != NULL) {
xSemaphoreGiveFromISR(
tx_dma_control[usart_index].peripheral_access_mutex,
&higher_priority_task_woken);
}
/* if the sending task supplied a notification semaphore, then
notify the task that the transmission has completed. */
if (tx_dma_control[usart_index].transaction_complete_notification_semaphore != NULL) {
xSemaphoreGiveFromISR(
tx_dma_control[usart_index].transaction_complete_notification_semaphore,
&higher_priority_task_woken);
}
}
if ((usart_status & US_CSR_ENDRX) != 0UL) {
/* It is possible to initialise the peripheral to only use Tx and not Rx.
Check that Rx has been initialised. */
configASSERT(rx_buffer_definition->next_byte_to_read);
configASSERT(rx_buffer_definition->next_byte_to_read !=
RX_NOT_USED);
/* Out of DMA buffer, configure the next buffer. Start by moving
the DMA buffer start address up to the end of the previously defined
buffer. */
rx_buffer_definition->rx_pdc_parameters.ul_addr +=
rx_buffer_definition->rx_pdc_parameters.ul_size;
/* If the end of the buffer has been reached, wrap back to the start. */
if (rx_buffer_definition->rx_pdc_parameters.ul_addr >=
rx_buffer_definition->past_rx_buffer_end_address)
{
rx_buffer_definition->rx_pdc_parameters.ul_addr =
rx_buffer_definition->rx_buffer_start_address;
}
/* Reset the Rx DMA to receive data into whatever free space remains in
the Rx buffer. */
configure_rx_dma(usart_index, data_added);
if (rx_buffer_definition->rx_event_semaphore != NULL) {
/* Notify that new data is available. */
xSemaphoreGiveFromISR(
rx_buffer_definition->rx_event_semaphore,
&higher_priority_task_woken);
}
}
if ((usart_status & US_IER_TIMEOUT) != 0UL) {
/* More characters have been placed into the Rx buffer.
Restart the timeout after more data has been received. */
usart_start_rx_timeout(all_usart_definitions[usart_index].peripheral_base_address);
if (rx_buffer_definition->rx_event_semaphore != NULL) {
/* Notify that new data is available. */
xSemaphoreGiveFromISR(
rx_buffer_definition->rx_event_semaphore,
&higher_priority_task_woken);
}
}
if ((usart_status & SR_ERROR_INTERRUPTS) != 0) {
/* An error occurred in either a transmission or reception. Abort, and
ensure the peripheral access mutex is made available to tasks. */
usart_reset_status(
all_usart_definitions[usart_index].peripheral_base_address);
if (tx_dma_control[usart_index].peripheral_access_mutex != NULL) {
xSemaphoreGiveFromISR(
tx_dma_control[usart_index].peripheral_access_mutex,
&higher_priority_task_woken);
}
}
/* If giving a semaphore caused a task to unblock, and the unblocked task
has a priority equal to or higher than the currently running task (the task
this ISR interrupted), then higher_priority_task_woken will have
automatically been set to pdTRUE within the semaphore function.
portEND_SWITCHING_ISR() will then ensure that this ISR returns directly to
the higher priority unblocked task. */
portEND_SWITCHING_ISR(higher_priority_task_woken);
}
/**
* \brief
*
* \param
*
* \return void
*/
void uart_config(void)
{
const sam_uart_opt_t uart_settings = {
.ul_mck = sysclk_get_peripheral_hz(),
.ul_baudrate = 19200,
.ul_mode = UART_MR_PAR_NO
};
sysclk_enable_peripheral_clock(ID_UART);
uart_init( BOARD_UART, &uart_settings );
}
/**
* \brief
*
* \param
*
* \return void
*/
void usart0_config(void)
{
const sam_usart_opt_t usart_0_settings = {
.baudrate = 19200,
.char_length = US_MR_CHRL_8_BIT,
.parity_type = US_MR_PAR_NO,
.stop_bits = US_MR_NBSTOP_1_BIT,
.channel_mode = US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
.irda_filter = 0
};
sysclk_enable_peripheral_clock(BOART_ID_USART0);
usart_init_rs232(BOARD_USART0, &usart_0_settings, sysclk_get_peripheral_hz());
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART0, 0xffffffff);
/* Enable the receiver and transmitter. */
usart_enable_tx(BOARD_USART0);
usart_enable_rx(BOARD_USART0);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART0_IRQn);
usart_enable_interrupt(BOARD_USART0, US_IER_RXRDY);
}
/**
* \brief
*
* \param
*
* \return void
*/
void usart1_config(void)
{
const sam_usart_opt_t usart_1_settings = {
.baudrate = 115200,
.char_length = US_MR_CHRL_8_BIT,
.parity_type = US_MR_PAR_NO,
.stop_bits = US_MR_NBSTOP_1_BIT,
.channel_mode = US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
.irda_filter = 0
};
sysclk_enable_peripheral_clock( BOART_ID_USART1 );
usart_init_rs232( BOARD_USART1, &usart_1_settings, sysclk_get_peripheral_hz() );
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART1, 0xffffffff);
/* Enable the receiver and transmitter. */
usart_enable_tx(BOARD_USART1);
usart_enable_rx(BOARD_USART1);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ( USART1_IRQn );
usart_enable_interrupt( BOARD_USART1, US_IER_RXRDY);
}
/**
* \brief
*
* \param uxPriority
*
* \return void
*/
void vStartUartTaskLauncher( unsigned portBASE_TYPE uxPriority )
{
/* Spawn the Sentinel task. */
xTaskCreate( vUartTask, (const signed portCHAR *)"SPILAUNCH",
TASK_RADIO_STACK_SIZE, NULL, uxPriority,
(xTaskHandle *)NULL );
}
/**
* \brief UART handle task..
*
* \param
* \param
*
* \return None
*/
portTASK_FUNCTION_PROTO( vUartTask, pvParameters )
{
uint8_t i, sms_text[] = "AT\r";
(void)pvParameters;
/* Initialize UART model.*/
uart_config();
usart0_config();
usart1_config();
gpio_set_pin_low( PIO_PA17_IDX );
for (;;)
{
vTaskDelay(1000);
uart_write( BOARD_UART, '1' );
usart_serial_write_packet( BOARD_USART1, sms_text, sizeof(sms_text) );
}
}
/**
* \brief
*
* \param
*
* \return void
*/
void USART0_Handler(void)
{
uint32_t ul_status;
/* Read USART Status. */
ul_status = usart_get_status( BOARD_USART0 );
/* Receive buffer is full. */
if (ul_status & US_CSR_RXRDY)
{
usart_read( BOARD_USART0, (uint32_t *)&gs_ul_read_buffer[0] );
}
}
void uart_config(uint8_t port, usb_cdc_line_coding_t * cfg)
{
Usart* usart = get_usart(port);
uint32_t stopbits, parity, databits;
uint32_t imr;
switch (cfg->bCharFormat) {
case CDC_STOP_BITS_2:
stopbits = US_MR_NBSTOP_2_BIT;
break;
case CDC_STOP_BITS_1_5:
stopbits = US_MR_NBSTOP_1_5_BIT;
break;
case CDC_STOP_BITS_1:
default:
// Default stop bit = 1 stop bit
stopbits = US_MR_NBSTOP_1_BIT;
break;
}
switch (cfg->bParityType) {
case CDC_PAR_EVEN:
parity = US_MR_PAR_EVEN;
break;
case CDC_PAR_ODD:
parity = US_MR_PAR_ODD;
break;
case CDC_PAR_MARK:
parity = US_MR_PAR_MARK;
break;
case CDC_PAR_SPACE:
parity = US_MR_PAR_SPACE;
break;
default:
case CDC_PAR_NONE:
parity = US_MR_PAR_NO;
break;
}
switch(cfg->bDataBits) {
case 5: case 6: case 7:
databits = cfg->bDataBits - 5;
break;
default:
case 8:
databits = US_MR_CHRL_8_BIT;
break;
}
// Options for USART.
usart_options.baudrate = LE32_TO_CPU(cfg->dwDTERate);
usart_options.char_length = databits;
usart_options.parity_type = parity;
usart_options.stop_bits = stopbits;
usart_options.channel_mode = US_MR_CHMODE_NORMAL;
imr = usart_get_interrupt_mask(usart);
usart_disable_interrupt(usart, 0xFFFFFFFF);
usart_init_rs232(usart, &usart_options,
sysclk_get_peripheral_hz());
// Restore both RX and TX
usart_enable_tx(usart);
usart_enable_rx(usart);
usart_enable_interrupt(usart, imr);
}
/**
* \brief This function opens an USART
*
* \note Opening of the specified USART implies initializing local variables and
* opening required hardware with the following configuration:
* - bauds as specified
* - 8 bits, no parity, 1 stop bit
* - enable interrupts
*
* \param chn Communication channel [0, 1]
* \param bauds Communication speed in bauds
*
* \retval true on success.
* \retval false on failure.
*/
int8_t busart_if_open(uint8_t chn, uint32_t bauds)
{
#if defined(CONF_BOARD_USART0_RXD) || defined(CONF_BOARD_USART1_RXD)
sam_usart_opt_t usart_console_settings;
/* Expected baud rate. */
usart_console_settings.baudrate = bauds;
/* Configure channel mode (Normal, Automatic, Local_loopback or
* Remote_loopback) */
usart_console_settings.channel_mode = US_MR_CHMODE_NORMAL;
/* Initialize value for USART mode register */
usart_console_settings.parity_type = US_MR_PAR_NO;
usart_console_settings.char_length = US_MR_CHRL_8_BIT;
usart_console_settings.stop_bits = US_MR_NBSTOP_1_BIT;
#else
UNUSED(bauds);
#endif
/* check usart and it is close */
if (chn >= 2) {
return false;
}
if (busart_chn_open[chn]) {
return false;
}
switch (chn) {
#ifdef CONF_BOARD_USART0_RXD
case 0:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_USART0);
/* Configure USART. */
usart_init_rs232(USART0, &usart_console_settings,
sysclk_get_peripheral_hz());
/* Assign buffers to pointers */
busart_comm_data_0.puc_tq_buf = ptr_tx_usart_buf0;
busart_comm_data_0.puc_rq_buf = ptr_rx_usart_buf0;
busart_comm_data_0.us_rq_count = 0;
busart_comm_data_0.us_rq_idx = 0;
busart_comm_data_0.us_wq_idx = 0;
/* Get board USART0 PDC base address and enable receiver and
* transmitter. */
g_p_usart_pdc0 = usart_get_pdc_base(USART0);
pdc_enable_transfer(g_p_usart_pdc0,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_usart_rx_packet0.ul_addr = (uint32_t)gs_puc_usart_buf0;
g_st_usart_rx_packet0.ul_size = USART_BUFFER_SIZE;
pdc_rx_init(g_p_usart_pdc0, &g_st_usart_rx_packet0, NULL);
/* Stop transmitting data */
g_st_usart_tx_packet0.ul_addr = (uint32_t)busart_comm_data_0.puc_tq_buf;
g_st_usart_tx_packet0.ul_size = 0;
pdc_tx_init(g_p_usart_pdc0, &g_st_usart_tx_packet0, NULL);
gs_ul_size_usart_buf0 = USART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
usart_disable_interrupt(USART0, US_IDR_RXRDY);
usart_enable_interrupt(USART0, US_IER_RXBUFF);
/* Enable the receiver and transmitter. */
usart_enable_tx(USART0);
usart_enable_rx(USART0);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)USART0_IRQn, USART0_PRIO);
NVIC_EnableIRQ(USART0_IRQn);
busart_chn_open[chn] = true;
num_bytes_rx_usart0 = 0;
/* Configure TC usart */
_configure_TC_usart();
tc_start(TC_USART, TC_USART_CHN);
return true;
}
break;
#endif
#ifdef CONF_BOARD_USART1_RXD
case 1:
{
/* Configure PMC. */
pmc_enable_periph_clk(ID_USART1);
/* Configure USART. */
usart_init_rs232(USART1, &usart_console_settings,
sysclk_get_peripheral_hz());
/* Assign buffers to pointers */
busart_comm_data_1.puc_tq_buf = ptr_tx_usart_buf1;
busart_comm_data_1.puc_rq_buf = ptr_rx_usart_buf1;
busart_comm_data_1.us_rq_count = 0;
busart_comm_data_1.us_rq_idx = 0;
busart_comm_data_1.us_wq_idx = 0;
/* Get board USART1 PDC base address and enable receiver and
* transmitter. */
g_p_usart_pdc1 = usart_get_pdc_base(USART1);
pdc_enable_transfer(g_p_usart_pdc1,
PERIPH_PTCR_RXTEN | PERIPH_PTCR_TXTEN);
/* Start receiving data and start timer. */
g_st_usart_rx_packet1.ul_addr = (uint32_t)gs_puc_usart_buf1;
g_st_usart_rx_packet1.ul_size = USART_BUFFER_SIZE;
pdc_rx_init(g_p_usart_pdc1, &g_st_usart_rx_packet1, NULL);
/* Stop transmitting data */
g_st_usart_tx_packet1.ul_addr = (uint32_t)busart_comm_data_1.puc_tq_buf;
g_st_usart_tx_packet1.ul_size = 0;
pdc_tx_init(g_p_usart_pdc1, &g_st_usart_tx_packet1, NULL);
gs_ul_size_usart_buf1 = USART_BUFFER_SIZE;
/* Transfer to PDC communication mode, disable RXRDY interrupt
* and enable RXBUFF interrupt. */
usart_disable_interrupt(USART1, US_IDR_RXRDY);
usart_enable_interrupt(USART1, US_IER_RXBUFF);
/* Enable the receiver and transmitter. */
usart_enable_tx(USART1);
usart_enable_rx(USART1);
/* Configure and enable interrupt of USART. */
NVIC_SetPriority((IRQn_Type)USART1_IRQn, USART1_PRIO);
NVIC_EnableIRQ(USART1_IRQn);
busart_chn_open[chn] = true;
num_bytes_rx_usart1 = 0;
/* Configure TC usart */
_configure_TC_usart();
tc_start(TC_USART, TC_USART_CHN);
return true;
}
break;
#endif
default:
return false;
}
}
