void _bsp_platform_init(void)
{
/** USB VBUS 5V enable */
SIM_SCGC5|= SIM_SCGC5_PORTC_MASK; // Turn on PTB clocks
PORTC_PCR9=(0|PORT_PCR_MUX(1)); // Configure pin as GPIO
GPIOC_PDDR|=(1<<9); // Set as output
ENABLE_USB_5V;
/* SIM Configuration */
vfnInitUSBClock(USB_CLOCK); // Feed 48MHz to the USB module
// weak pulldowns
USB0_USBCTRL=0x40;
}
void USB_Init(void)
{
/* Software Configuration */
Setup_Pkt=(tUSB_Setup*)BufferPointer[bEP0OUT_ODD];
gu8USB_State=uPOWER;
/* MPU Configuration */
// MPU_CESR=0; MPU is disable. All accesses from all bus masters are allowed
/** Feed 48MHz to the USB FS clock */
vfnInitUSBClock(USB_CLOCK);
/* NVIC Configuration */
extern uint32 __VECTOR_RAM[]; //Get vector table that was copied to RAM
__VECTOR_RAM[40]=(uint32)USB_ISR; //replace ISR
enable_irq(24); //IRQ 24 for USBOTG and USBCDC on L2K
/* USB Module Configuration */
// Reset USB Module
USB0_USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
while(FLAG_CHK(USB_USBTRC0_USBRESET_SHIFT,USB0_USBTRC0)) {};
// Set BDT Base Register
USB0_BDTPAGE1=(uint8)((uint32)tBDTtable>>8);
USB0_BDTPAGE2=(uint8)((uint32)tBDTtable>>16);
USB0_BDTPAGE3=(uint8)((uint32)tBDTtable>>24);
// Clear USB Reset flag
FLAG_SET(USB_ISTAT_USBRST_MASK,USB0_ISTAT);
// Enable USB Reset Interrupt
FLAG_SET(USB_INTEN_USBRSTEN_SHIFT,USB0_INTEN);
// Enable weak pull downs
//USB0_USBCTRL = USB_USBCTRL_PDE_MASK;
// Disable weak pull downs
USB0_USBCTRL &= ~(uint8)(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
USB0_USBTRC0|=0x40;
USB0_CTL|=0x01;
// Pull up enable
FLAG_SET(USB_CONTROL_DPPULLUPNONOTG_SHIFT,USB0_CONTROL);
}
