static int mmci_driver_remove(struct vmm_device *dev)
{
struct mmc_host *mmc = dev->priv;
struct mmci_host *host = mmc_priv(mmc);
if (mmc && host) {
mmc_remove_host(mmc);
vmm_writel(0, &host->base->mask0);
vmm_writel(0, &host->base->mask1);
vmm_writel(0, &host->base->command);
vmm_writel(0, &host->base->datactrl);
if (!host->singleirq) {
vmm_host_irq_unregister(host->irq1, mmc);
}
vmm_host_irq_unregister(host->irq0, mmc);
vmm_devtree_regunmap_release(dev->node,
(virtual_addr_t)host->base, 0);
mmc_free_host(mmc);
dev->priv = NULL;
}
return VMM_OK;
}
static int imx_src_remove(struct vmm_device *dev)
{
#ifdef CONFIG_RESET_CONTROLLER
reset_controller_unregister(&imx_reset_controller);
#endif /* CONFIG_RESET_CONTROLLER */
vmm_devtree_regunmap_release(dev->node, (virtual_addr_t)src_base, 0);
src_base = NULL;
return 0;
}
static int amba_kmi_driver_remove(struct vmm_device *dev)
{
struct amba_kmi_port *kmi =
(struct amba_kmi_port *)vmm_devdrv_get_data(dev);
vmm_devdrv_set_data(dev, NULL);
serio_unregister_port(kmi->io);
clk_put(kmi->clk);
vmm_devtree_regunmap_release(dev->node, (virtual_addr_t)kmi->base, 0);
kfree(kmi);
return VMM_OK;
}
static int samsung_driver_remove(struct vmm_device *dev)
{
struct samsung_port *port = dev->priv;
if (!port) {
return VMM_OK;
}
serial_destroy(port->p);
vmm_host_irq_unregister(port->irq, port);
vmm_devtree_regunmap_release(dev->of_node, port->base, 0);
vmm_free(port);
dev->priv = NULL;
return VMM_OK;
}
static int __init bcm2835_clocksource_init(struct vmm_devtree_node *node)
{
int rc;
u32 clock;
struct bcm2835_clocksource *bcs;
/* Read clock frequency */
rc = vmm_devtree_clock_frequency(node, &clock);
if (rc) {
return rc;
}
bcs = vmm_zalloc(sizeof(struct bcm2835_clocksource));
if (!bcs) {
return VMM_ENOMEM;
}
/* Map timer registers */
rc = vmm_devtree_request_regmap(node, &bcs->base, 0, "BCM2835 Timer");
if (rc) {
vmm_free(bcs);
return rc;
}
bcs->system_clock = (void *)(bcs->base + REG_COUNTER_LO);
/* Setup clocksource */
bcs->clksrc.name = "bcm2835_timer";
bcs->clksrc.rating = 300;
bcs->clksrc.read = bcm2835_clksrc_read;
bcs->clksrc.mask = VMM_CLOCKSOURCE_MASK(32);
vmm_clocks_calc_mult_shift(&bcs->clksrc.mult,
&bcs->clksrc.shift,
clock, VMM_NSEC_PER_SEC, 10);
bcs->clksrc.priv = bcs;
/* Register clocksource */
rc = vmm_clocksource_register(&bcs->clksrc);
if (rc) {
vmm_devtree_regunmap_release(node, bcs->base, 0);
vmm_free(bcs);
return rc;
}
return VMM_OK;
}
static int s3c_rtc_driver_remove(struct vmm_device *dev)
{
struct rtc_device *rtc = dev->priv;
vmm_host_irq_unregister(s3c_rtc_alarmno, rtc);
vmm_host_irq_unregister(s3c_rtc_tickno, rtc);
dev->priv = NULL;
rtc_device_unregister(rtc);
s3c_rtc_setaie(rtc, 0);
clk_put(rtc_clk);
rtc_clk = NULL;
vmm_devtree_regunmap_release(dev->node,
(virtual_addr_t)s3c_rtc_base, 0);
return 0;
}
static int omap_uart_driver_remove(struct vmm_device *dev)
{
struct omap_uart_port *port = dev->priv;
if (!port) {
return VMM_OK;
}
/* Mask Rx interrupt */
port->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
omap_serial_out(port, UART_IER, port->ier);
/* Free-up resources */
serial_destroy(port->p);
vmm_host_irq_unregister(port->irq, port);
vmm_devtree_regunmap_release(dev->of_node, port->base, 0);
vmm_free(port);
dev->priv = NULL;
return VMM_OK;
}
static int samsung_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
u32 ucon;
int rc = VMM_EFAIL;
struct samsung_port *port = NULL;
port = vmm_zalloc(sizeof(struct samsung_port));
if (!port) {
rc = VMM_ENOMEM;
goto free_nothing;
}
rc = vmm_devtree_request_regmap(dev->of_node, &port->base, 0,
"Samsung UART");
if (rc) {
goto free_port;
}
/* Make sure all interrupts except Rx are masked. */
port->mask = S3C64XX_UINTM_RXD_MSK;
port->mask = ~port->mask;
vmm_out_le16((void *)(port->base + S3C64XX_UINTM), port->mask);
if (vmm_devtree_read_u32(dev->of_node, "baudrate",
&port->baudrate)) {
port->baudrate = 115200;
}
rc = vmm_devtree_clock_frequency(dev->of_node, &port->input_clock);
if (rc) {
goto free_reg;
}
/* Setup interrupt handler */
port->irq = vmm_devtree_irq_parse_map(dev->of_node, 0);
if (!port->irq) {
rc = VMM_ENODEV;
goto free_reg;
}
if ((rc = vmm_host_irq_register(port->irq, dev->name,
samsung_irq_handler, port))) {
goto free_reg;
}
/* Call low-level init function */
samsung_lowlevel_init(port->base, port->baudrate, port->input_clock);
/* Create Serial Port */
port->p = serial_create(dev, 256, samsung_tx, port);
if (VMM_IS_ERR_OR_NULL(port->p)) {
rc = VMM_PTR_ERR(port->p);
goto free_irq;
}
/* Save port pointer */
dev->priv = port;
/* Unmask RX interrupt */
ucon = vmm_in_le32((void *)(port->base + S3C2410_UCON));
ucon |= S3C2410_UCON_RXIRQMODE;
vmm_out_le32((void *)(port->base + S3C2410_UCON), ucon);
return VMM_OK;
free_irq:
vmm_host_irq_unregister(port->irq, port);
free_reg:
vmm_devtree_regunmap_release(dev->of_node, port->base, 0);
free_port:
vmm_free(port);
free_nothing:
return rc;
}
static int mmci_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
int rc;
u32 sdi;
virtual_addr_t base;
physical_addr_t basepa;
struct mmc_host *mmc;
struct mmci_host *host;
mmc = mmc_alloc_host(sizeof(struct mmci_host), dev);
if (!mmc) {
rc = VMM_ENOMEM;
goto free_nothing;
}
host = mmc_priv(mmc);
rc = vmm_devtree_request_regmap(dev->node, &base, 0, "PL180 MMCI");
if (rc) {
goto free_host;
}
host->base = (struct sdi_registers *)base;
host->irq0 = vmm_devtree_irq_parse_map(dev->node, 0);
if (!host->irq0) {
rc = VMM_ENODEV;
goto free_reg;
}
if ((rc = vmm_host_irq_register(host->irq0, dev->name,
mmci_cmd_irq_handler, mmc))) {
goto free_reg;
}
host->irq1 = vmm_devtree_irq_parse_map(dev->node, 1);
if (host->irq1) {
if ((rc = vmm_host_irq_register(host->irq1, dev->name,
mmci_pio_irq_handler, mmc))) {
goto free_irq0;
}
host->singleirq = 0;
} else {
host->singleirq = 1;
}
/* Retrive matching data */
host->pwr_init = ((const u32 *)devid->data)[0];
host->clkdiv_init = ((const u32 *)devid->data)[1];
host->voltages = ((const u32 *)devid->data)[2];
host->caps = ((const u32 *)devid->data)[3];
host->clock_in = ((const u32 *)devid->data)[4];
host->clock_min = ((const u32 *)devid->data)[5];
host->clock_max = ((const u32 *)devid->data)[6];
host->b_max = ((const u32 *)devid->data)[7];
host->version2 = ((const u32 *)devid->data)[8];
/* Initialize power and clock divider */
vmm_writel(host->pwr_init, &host->base->power);
vmm_writel(host->clkdiv_init, &host->base->clock);
vmm_udelay(CLK_CHANGE_DELAY);
/* Disable interrupts */
sdi = vmm_readl(&host->base->mask0) & ~SDI_MASK0_MASK;
vmm_writel(sdi, &host->base->mask0);
/* Setup mmc host configuration */
mmc->caps = host->caps;
mmc->voltages = host->voltages;
mmc->f_min = host->clock_min;
mmc->f_max = host->clock_max;
mmc->b_max = host->b_max;
/* Setup mmc host operations */
mmc->ops.send_cmd = mmci_request;
mmc->ops.set_ios = mmci_set_ios;
mmc->ops.init_card = mmci_init_card;
mmc->ops.get_cd = NULL;
mmc->ops.get_wp = NULL;
rc = mmc_add_host(mmc);
if (rc) {
goto free_irq1;
}
dev->priv = mmc;
vmm_devtree_regaddr(dev->node, &basepa, 0);
vmm_printf("%s: PL%03x manf %x rev%u at 0x%08llx irq %d,%d (pio)\n",
dev->name, amba_part(dev), amba_manf(dev),
amba_rev(dev), (unsigned long long)basepa,
host->irq0, host->irq1);
return VMM_OK;
free_irq1:
if (!host->singleirq) {
vmm_host_irq_unregister(host->irq1, mmc);
}
free_irq0:
vmm_host_irq_unregister(host->irq0, mmc);
free_reg:
vmm_devtree_regunmap_release(dev->node,
(virtual_addr_t)host->base, 0);
free_host:
mmc_free_host(mmc);
free_nothing:
return rc;
}
static int __cpuinit twd_clockchip_init(struct vmm_devtree_node *node)
{
int rc;
u32 ref_cnt_freq;
virtual_addr_t ref_cnt_addr;
u32 cpu = vmm_smp_processor_id();
struct twd_clockchip *cc = &this_cpu(twd_cc);
if (!twd_base) {
rc = vmm_devtree_request_regmap(node, &twd_base, 0,
"ARM Local Timer");
if (rc) {
goto fail;
}
}
if (!twd_ppi_irq) {
twd_ppi_irq = vmm_devtree_irq_parse_map(node, 0);
if (!twd_ppi_irq) {
rc = VMM_ENODEV;
goto fail_regunmap;
}
}
if (!twd_freq_hz) {
/* First try to find TWD clock */
if (!twd_clk) {
twd_clk = of_clk_get(node, 0);
}
if (VMM_IS_ERR_OR_NULL(twd_clk)) {
twd_clk = clk_get_sys("smp_twd", NULL);
}
if (!VMM_IS_ERR_OR_NULL(twd_clk)) {
/* Use TWD clock to find frequency */
rc = clk_prepare_enable(twd_clk);
if (rc) {
clk_put(twd_clk);
goto fail_regunmap;
}
twd_freq_hz = clk_get_rate(twd_clk);
} else {
/* No TWD clock found hence caliberate */
rc = vmm_devtree_regmap(node, &ref_cnt_addr, 1);
if (rc) {
vmm_devtree_regunmap(node, ref_cnt_addr, 1);
goto fail_regunmap;
}
if (vmm_devtree_read_u32(node, "ref-counter-freq",
&ref_cnt_freq)) {
vmm_devtree_regunmap(node, ref_cnt_addr, 1);
goto fail_regunmap;
}
twd_caliberate_freq(twd_base,
ref_cnt_addr, ref_cnt_freq);
vmm_devtree_regunmap(node, ref_cnt_addr, 1);
}
}
memset(cc, 0, sizeof(struct twd_clockchip));
vmm_sprintf(cc->name, "twd/%d", cpu);
cc->clkchip.name = cc->name;
cc->clkchip.hirq = twd_ppi_irq;
cc->clkchip.rating = 350;
cc->clkchip.cpumask = vmm_cpumask_of(cpu);
cc->clkchip.features =
VMM_CLOCKCHIP_FEAT_PERIODIC | VMM_CLOCKCHIP_FEAT_ONESHOT;
vmm_clocks_calc_mult_shift(&cc->clkchip.mult, &cc->clkchip.shift,
VMM_NSEC_PER_SEC, twd_freq_hz, 10);
cc->clkchip.min_delta_ns = vmm_clockchip_delta2ns(0xF, &cc->clkchip);
cc->clkchip.max_delta_ns =
vmm_clockchip_delta2ns(0xFFFFFFFF, &cc->clkchip);
cc->clkchip.set_mode = &twd_clockchip_set_mode;
cc->clkchip.set_next_event = &twd_clockchip_set_next_event;
cc->clkchip.priv = cc;
/* Register interrupt handler */
if ((rc = vmm_host_irq_register(twd_ppi_irq, "twd",
&twd_clockchip_irq_handler,
cc))) {
goto fail_regunmap;
}
rc = vmm_clockchip_register(&cc->clkchip);
if (rc) {
goto fail_unreg_irq;
}
return VMM_OK;
fail_unreg_irq:
vmm_host_irq_unregister(twd_ppi_irq, cc);
fail_regunmap:
vmm_devtree_regunmap_release(node, twd_base, 0);
fail:
return rc;
}
static int imx_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
int rc = VMM_EFAIL;
struct clk *clk_ipg = NULL;
struct clk *clk_uart = NULL;
struct imx_port *port = NULL;
unsigned long old_rate = 0;
port = vmm_zalloc(sizeof(struct imx_port));
if (!port) {
rc = VMM_ENOMEM;
goto free_nothing;
}
rc = vmm_devtree_request_regmap(dev->of_node, &port->base, 0,
"iMX UART");
if (rc) {
goto free_port;
}
if (vmm_devtree_read_u32(dev->of_node, "baudrate", &port->baudrate)) {
port->baudrate = 115200;
}
rc = vmm_devtree_clock_frequency(dev->of_node, &port->input_clock);
if (rc) {
goto free_reg;
}
/* Setup clocks */
clk_ipg = of_clk_get(dev->of_node, 0);
clk_uart = of_clk_get(dev->of_node, 1);
if (!VMM_IS_ERR_OR_NULL(clk_ipg)) {
rc = clk_prepare_enable(clk_ipg);
if (rc) {
goto free_reg;
}
}
if (!VMM_IS_ERR_OR_NULL(clk_uart)) {
rc = clk_prepare_enable(clk_uart);
if (rc) {
goto clk_disable_unprepare_ipg;
}
old_rate = clk_get_rate(clk_uart);
if (clk_set_rate(clk_uart, port->input_clock)) {
vmm_printf("Could not set %s clock rate to %u Hz, "
"actual rate: %u Hz\n", __clk_get_name(clk_uart),
port->input_clock, clk_get_rate(clk_uart));
rc = VMM_ERANGE;
goto clk_disable_unprepare_uart;
}
}
/* Register interrupt handler */
port->irq = vmm_devtree_irq_parse_map(dev->of_node, 0);
if (!port->irq) {
rc = VMM_ENODEV;
goto clk_old_rate;
}
if ((rc = vmm_host_irq_register(port->irq, dev->name,
imx_irq_handler, port))) {
goto clk_old_rate;
}
/* Call low-level init function */
imx_lowlevel_init(port->base, port->baudrate, port->input_clock);
/* Create Serial Port */
port->p = serial_create(dev, 256, imx_tx, port);
if (VMM_IS_ERR_OR_NULL(port->p)) {
rc = VMM_PTR_ERR(port->p);
goto free_irq;
}
/* Save port pointer */
dev->priv = port;
/* Unmask Rx, Mask Tx, and Enable UART */
port->mask = vmm_readl((void *)port->base + UCR1);
port->mask |= (UCR1_RRDYEN | UCR1_UARTEN);
port->mask &= ~(UCR1_TRDYEN);
vmm_writel(port->mask, (void *)port->base + UCR1);
return rc;
free_irq:
vmm_host_irq_unregister(port->irq, port);
clk_old_rate:
if (!VMM_IS_ERR_OR_NULL(clk_uart)) {
if (old_rate) {
clk_set_rate(clk_uart, old_rate);
}
}
clk_disable_unprepare_uart:
if (!VMM_IS_ERR_OR_NULL(clk_uart)) {
clk_disable_unprepare(clk_uart);
}
clk_disable_unprepare_ipg:
if (!VMM_IS_ERR_OR_NULL(clk_ipg)) {
clk_disable_unprepare(clk_ipg);
}
free_reg:
vmm_devtree_regunmap_release(dev->of_node, port->base, 0);
free_port:
vmm_free(port);
free_nothing:
return rc;
}
static int amba_kmi_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
struct amba_kmi_port *kmi;
struct serio *io;
int ret;
kmi = kzalloc(sizeof(struct amba_kmi_port), GFP_KERNEL);
io = kzalloc(sizeof(struct serio), GFP_KERNEL);
if (!kmi || !io) {
ret = -ENOMEM;
goto out;
}
io->id.type = SERIO_8042;
io->write = amba_kmi_write;
io->open = amba_kmi_open;
io->close = amba_kmi_close;
if (strlcpy(io->name, dev->name, sizeof(io->name)) >=
sizeof(io->name)) {
ret = -EOVERFLOW;
goto out;
}
if (strlcpy(io->phys, dev->name, sizeof(io->phys)) >=
sizeof(io->phys)) {
ret = -EOVERFLOW;
goto out;
}
io->port_data = kmi;
io->dev.parent = dev;
kmi->io = io;
ret = vmm_devtree_request_regmap(dev->node,
(virtual_addr_t *)&kmi->base, 0, "AMBA KMI");
if (ret) {
ret = -ENOMEM;
goto out;
}
kmi->clk = clk_get(dev, "KMIREFCLK");
if (IS_ERR(kmi->clk)) {
ret = PTR_ERR(kmi->clk);
goto unmap;
}
kmi->irq = irq_of_parse_and_map(dev->node, 0);
if (!kmi->irq) {
ret = -EFAIL;
goto unmap;
}
vmm_devdrv_set_data(dev, kmi);
serio_register_port(kmi->io);
return VMM_OK;
unmap:
vmm_devtree_regunmap_release(dev->node, (virtual_addr_t)kmi->base, 0);
out:
if (kmi) kfree(kmi);
if (io) kfree(io);
return ret;
}
static int s3c_rtc_driver_probe(struct vmm_device *pdev,
const struct vmm_devtree_nodeid *devid)
{
u32 alarmno, tickno;
struct rtc_time rtc_tm;
int ret = VMM_OK, tmp, rc;
/* find the IRQs */
rc = vmm_devtree_irq_get(pdev->node, &alarmno, 0);
if (rc) {
rc = VMM_EFAIL;
return rc;
}
s3c_rtc_alarmno = alarmno;
rc = vmm_devtree_irq_get(pdev->node, &tickno, 1);
if (rc) {
rc = VMM_EFAIL;
return rc;
}
s3c_rtc_tickno = tickno;
/* get the memory region */
rc = vmm_devtree_request_regmap(pdev->node,
(virtual_addr_t *)&s3c_rtc_base, 0,
"S3C RTC");
if (rc) {
dev_err(pdev, "failed ioremap()\n");
ret = rc;
goto err_nomap;
}
rtc_clk = clk_get(pdev, "rtc");
if (rtc_clk == NULL) {
dev_err(pdev, "failed to find rtc clock source\n");
ret = -ENODEV;
goto err_clk;
}
clk_enable(rtc_clk);
/* check to see if everything is setup correctly */
s3c_rtc_enable(pdev, 1);
//device_init_wakeup(pdev, 1);
/* register RTC and exit */
s3c_rtcops.dev.parent = pdev;
rc = rtc_device_register(&s3c_rtcops);
if (rc) {
dev_err(pdev, "cannot attach rtc\n");
ret = rc;
goto err_nortc;
}
s3c_rtc_cpu_type = (enum s3c_cpu_type)devid->data;
/* Check RTC Time */
s3c_rtc_gettime(NULL, &rtc_tm);
if (!rtc_valid_tm(&rtc_tm)) {
dev_warn(pdev,
"warning: invalid RTC value so initializing it\n");
rtc_tm.tm_year = 100;
rtc_tm.tm_mon = 0;
rtc_tm.tm_mday = 1;
rtc_tm.tm_hour = 0;
rtc_tm.tm_min = 0;
rtc_tm.tm_sec = 0;
s3c_rtc_settime(NULL, &rtc_tm);
}
if (s3c_rtc_cpu_type != TYPE_S3C2410)
max_user_freq = 32768;
else
max_user_freq = 128;
if (s3c_rtc_cpu_type == TYPE_S3C2416
|| s3c_rtc_cpu_type == TYPE_S3C2443) {
tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
tmp |= S3C2443_RTCCON_TICSEL;
writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
}
pdev->priv = &s3c_rtcops;
s3c_rtc_setfreq(&s3c_rtcops, 1);
if ((rc =
vmm_host_irq_register(s3c_rtc_alarmno, "s3c_rtc_alarm",
s3c_rtc_alarmirq, &s3c_rtcops))) {
dev_err(pdev, "IRQ%d error %d\n", s3c_rtc_alarmno, rc);
goto err_alarm_irq;
}
if ((rc =
vmm_host_irq_register(s3c_rtc_tickno, "s3c_rtc_tick",
s3c_rtc_tickirq, &s3c_rtcops))) {
dev_err(pdev, "IRQ%d error %d\n", s3c_rtc_tickno, rc);
goto err_tick_irq;
}
clk_disable(rtc_clk);
return 0;
err_tick_irq:
vmm_host_irq_unregister(s3c_rtc_alarmno, &s3c_rtcops);
err_alarm_irq:
pdev->priv = NULL;
rtc_device_unregister(&s3c_rtcops);
err_nortc:
s3c_rtc_enable(pdev, 0);
clk_disable(rtc_clk);
clk_put(rtc_clk);
err_clk:
vmm_devtree_regunmap_release(pdev->node,
(virtual_addr_t)s3c_rtc_base, 0);
err_nomap:
return ret;
}
static int uart_8250_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
int rc;
struct uart_8250_port *port;
physical_addr_t ioport;
const char *aval;
port = vmm_zalloc(sizeof(struct uart_8250_port));
if(!port) {
rc = VMM_ENOMEM;
goto free_nothing;
}
if (vmm_devtree_read_string(dev->node,
VMM_DEVTREE_ADDRESS_TYPE_ATTR_NAME,
&aval)) {
aval = NULL;
}
if (aval && !strcmp(aval, VMM_DEVTREE_ADDRESS_TYPE_VAL_IO)) {
port->use_ioport = TRUE;
} else {
port->use_ioport = FALSE;
}
if (port->use_ioport) {
rc = vmm_devtree_regaddr(dev->node, &ioport, 0);
if (rc) {
goto free_port;
}
port->base = ioport;
} else {
rc = vmm_devtree_request_regmap(dev->node, &port->base, 0,
"UART 8250");
if (rc) {
goto free_port;
}
}
if (vmm_devtree_read_u32(dev->node, "reg-shift",
&port->reg_shift)) {
port->reg_shift = 0;
}
if (vmm_devtree_read_u32(dev->node, "reg-io-width",
&port->reg_width)) {
port->reg_width = 1;
}
if (vmm_devtree_read_u32(dev->node, "baudrate",
&port->baudrate)) {
port->baudrate = 115200;
}
rc = vmm_devtree_clock_frequency(dev->node, &port->input_clock);
if (rc) {
goto free_reg;
}
/* Call low-level init function
* Note: low-level init will make sure that
* interrupts are disabled in IER register.
*/
uart_8250_lowlevel_init(port);
/* Setup interrupt handler */
port->irq = vmm_devtree_irq_parse_map(dev->node, 0);
if (!port->irq) {
rc = VMM_ENODEV;
goto free_reg;
}
if ((rc = vmm_host_irq_register(port->irq, dev->name,
uart_8250_irq_handler, port))) {
goto free_reg;
}
/* Create Serial Port */
port->p = serial_create(dev, 256, uart_8250_tx, port);
if (VMM_IS_ERR_OR_NULL(port->p)) {
rc = VMM_PTR_ERR(port->p);
goto free_irq;
}
/* Save port pointer */
dev->priv = port;
/* Unmask Rx interrupt */
port->ier |= (UART_IER_RLSI | UART_IER_RDI);
uart_8250_out(port, UART_IER_OFFSET, port->ier);
return VMM_OK;
free_irq:
vmm_host_irq_unregister(port->irq, port);
free_reg:
if (!port->use_ioport) {
vmm_devtree_regunmap_release(dev->node, port->base, 0);
}
free_port:
vmm_free(port);
free_nothing:
return rc;
}
static int omap_uart_driver_probe(struct vmm_device *dev,
const struct vmm_devtree_nodeid *devid)
{
int rc;
struct omap_uart_port *port;
port = vmm_zalloc(sizeof(struct omap_uart_port));
if (!port) {
rc = VMM_ENOMEM;
goto free_nothing;
}
rc = vmm_devtree_request_regmap(dev->of_node, &port->base, 0,
"omap-uart");
if (rc) {
goto free_port;
}
if (vmm_devtree_read_u32(dev->of_node, "reg-shift",
&port->reg_shift)) {
port->reg_shift = 0;
}
if (vmm_devtree_read_u32(dev->of_node, "baudrate",
&port->baudrate)) {
port->baudrate = 115200;
}
rc = vmm_devtree_clock_frequency(dev->of_node,
&port->input_clock);
if (rc) {
goto free_reg;
}
omap_uart_startup_configure(port);
port->irq = vmm_devtree_irq_parse_map(dev->of_node, 0);
if (!port->irq) {
rc = VMM_ENODEV;
goto free_reg;
}
if ((rc = vmm_host_irq_register(port->irq, dev->name,
omap_uart_irq_handler, port))) {
goto free_reg;
}
/* Create Serial Port */
port->p = serial_create(dev, 256, omap_uart_tx, port);
if (VMM_IS_ERR_OR_NULL(port->p)) {
rc = VMM_PTR_ERR(port->p);
goto free_irq;
}
/* Save port pointer */
dev->priv = port;
/* Unmask Rx interrupt */
port->ier |= (UART_IER_RDI | UART_IER_RLSI);
omap_serial_out(port, UART_IER, port->ier);
return VMM_OK;
free_irq:
vmm_host_irq_unregister(port->irq, port);
free_reg:
vmm_devtree_regunmap_release(dev->of_node, port->base, 0);
free_port:
vmm_free(port);
free_nothing:
return rc;
}
