int govw_mod_init(void)
{
govw_mod_t *mod_p;
vpp_fb_base_t *mod_fb_p;
vdo_framebuf_t *fb_p;
mod_p = (govw_mod_t *) vpp_mod_register(VPP_MOD_GOVW,sizeof(govw_mod_t),VPP_MOD_FLAG_FRAMEBUF);
if( !mod_p ){
DPRINT("*E* GOVW module register fail\n");
return -1;
}
/* module member variable */
mod_p->int_catch = 0; // VPP_INT_ERR_GOVW_TG | VPP_INT_ERR_GOVW_MIFY | VPP_INT_ERR_GOVW_MIFC;
mod_p->pm = DEV_GOVW;
/* module member function */
mod_p->init = govw_init;
mod_p->dump_reg = govw_reg_dump;
mod_p->set_enable = govw_set_mif_enable;
mod_p->set_tg = govw_set_timing;
mod_p->get_tg = govw_get_timing;
mod_p->get_sts = govw_get_int_status;
mod_p->clr_sts = govw_clean_int_status;
mod_p->suspend = govw_suspend;
mod_p->resume = govw_resume;
/* module frame buffer */
mod_fb_p = mod_p->fb_p;
mod_fb_p->csc_mode = VPP_CSC_RGB2YUV_JFIF_0_255;
mod_fb_p->framerate = 30;
mod_fb_p->media_fmt = VPP_MEDIA_FMT_MPEG;
mod_fb_p->wait_ready = 0x1000;
mod_fb_p->capability = BIT(VDO_COL_FMT_YUV422H) | BIT(VDO_COL_FMT_YUV444);
mod_fb_p->capability |= BIT(VDO_COL_FMT_ARGB) | BIT(VDO_COL_FMT_RGB_565)
| BIT(VDO_COL_FMT_RGB_1555) | BIT(VDO_COL_FMT_RGB_666) | VPP_FB_FLAG_CSC;
/* module frame buffer member function */
mod_fb_p->set_framebuf = govw_set_framebuffer;
mod_fb_p->set_addr = govw_set_fb_addr;
mod_fb_p->get_addr = govw_get_fb_addr;
mod_fb_p->set_csc = govw_set_csc_mode;
fb_p = &mod_p->fb_p->fb;
fb_p->col_fmt = VPP_GOVW_FB_COLFMT;
fb_p->y_addr = 0;
fb_p->c_addr = 0;
fb_p->img_w = VPP_HD_DISP_RESX;
fb_p->img_h = VPP_HD_DISP_RESY;
fb_p->fb_w = VPP_HD_MAX_RESX;
fb_p->fb_h = VPP_HD_MAX_RESY;
fb_p->h_crop = 0;
fb_p->v_crop = 0;
fb_p->flag = 0;
p_govw = mod_p;
return 0;
}
int vppm_mod_init(void)
{
vppm_mod_t *mod_p;
mod_p = (vppm_mod_t *) vpp_mod_register(VPP_MOD_VPPM,sizeof(vppm_mod_t),0);
if( !mod_p ){
DPRINT("*E* VPP module register fail\n");
return -1;
}
/* module member variable */
mod_p->int_catch = 0;//VPP_INT_NULL;
/* module member function */
mod_p->init = vppm_init;
// mod_p->dump_reg = vppm_reg_dump;
mod_p->get_sts = vppm_get_int_status;
mod_p->clr_sts = vppm_clean_int_status;
mod_p->suspend = vppm_suspend;
mod_p->resume = vppm_resume;
p_vppm = mod_p;
return 0;
}
int govm_mod_init(void)
{
govm_mod_t *mod_p;
mod_p = (govm_mod_t *) vpp_mod_register(VPP_MOD_GOVM,sizeof(govm_mod_t),0);
if( !mod_p ){
DPRINT("*E* GOVM module register fail\n");
return -1;
}
/* module member variable */
mod_p->path = VPP_PATH_NULL;
mod_p->int_catch = VPP_INT_NULL;
/* module member function */
mod_p->init = govm_init;
mod_p->dump_reg = govm_reg_dump;
mod_p->set_colorbar = govm_set_colorbar;
mod_p->get_sts = govm_get_int_status;
mod_p->clr_sts = govm_clean_int_status;
mod_p->suspend = govm_suspend;
mod_p->resume = govm_resume;
p_govm = mod_p;
#ifdef WMT_FTBLK_PIP
{
pip_mod_t *pip_mod_p;
vpp_fb_base_t *mod_fb_p;
vdo_framebuf_t *fb_p;
pip_mod_p = (pip_mod_t *) vpp_mod_register(VPP_MOD_PIP,sizeof(pip_mod_t),VPP_MOD_FLAG_FRAMEBUF);
mod_fb_p = pip_mod_p->fb_p;
/* module member variable */
pip_mod_p->int_catch = VPP_INT_NULL;
pip_mod_p->resx_visual = vfb_var.xres;
pip_mod_p->resy_visual = vfb_var.yres;
pip_mod_p->posx = pip_mod_p->posy = 0;
pip_mod_p->pre_yaddr = pip_mod_p->pre_caddr = 0;
/* module member function */
pip_mod_p->init = govm_pip_init;
pip_mod_p->set_colorbar = govm_set_pip_colorbar;
p_pip = pip_mod_p;
/* frame buffer variable */
mod_fb_p->capability = BIT(VDO_COL_FMT_YUV420) | BIT(VDO_COL_FMT_YUV422H) | BIT(VDO_COL_FMT_YUV444) | BIT(VDO_COL_FMT_ARGB)
| VPP_FB_FLAG_MEDIA | VPP_FB_FLAG_FIELD;
fb_p = &mod_fb_p->fb;
fb_p->y_addr = 0;
fb_p->c_addr = 0;
fb_p->col_fmt = VDO_COL_FMT_YUV422H;
fb_p->img_w = vfb_var.xres;
fb_p->img_h = vfb_var.yres;
fb_p->fb_w = VPP_HD_MAX_RESX;
fb_p->fb_h = VPP_HD_MAX_RESY;
fb_p->h_crop = 0;
fb_p->v_crop = 0;
fb_p->flag = 0;
mod_fb_p->set_framebuf = govm_set_pip_framebuf;
mod_fb_p->set_addr = govm_set_pip_fb_addr;
mod_fb_p->get_addr = govm_get_pip_fb_addr;
mod_fb_p->get_color_fmt = govm_get_pip_color_format;
mod_fb_p->fn_view = govm_pip_proc_view;
}
#endif
return 0;
}
int scl_mod_init(void)
{
vpp_fb_base_t *mod_fb_p;
vdo_framebuf_t *fb_p;
/* -------------------- SCL module -------------------- */
{
scl_mod_t *scl_mod_p;
scl_mod_p = (scl_mod_t *) vpp_mod_register(VPP_MOD_SCL,sizeof(scl_mod_t),VPP_MOD_FLAG_FRAMEBUF);
if( !scl_mod_p ){
DPRINT("*E* SCL module register fail\n");
return -1;
}
/* module member variable */
scl_mod_p->int_catch = VPP_INT_NULL;
scl_mod_p->scale_mode = VPP_SCALE_MODE_ADAPTIVE;
scl_mod_p->pm = DEV_SCL444U;
scl_mod_p->filter_mode = VPP_FILTER_SCALE;
/* module member function */
scl_mod_p->init = scl_init;
scl_mod_p->set_enable = scl_set_enable;
scl_mod_p->set_colorbar = sclr_set_colorbar;
scl_mod_p->dump_reg = scl_reg_dump;
scl_mod_p->get_sts = scl_get_int_status;
scl_mod_p->clr_sts = scl_clean_int_status;
scl_mod_p->scale = scl_proc_scale;
scl_mod_p->scale_finish = scl_proc_scale_finish;
scl_mod_p->suspend = scl_suspend;
scl_mod_p->resume = scl_resume;
/* module frame buffer variable */
mod_fb_p = scl_mod_p->fb_p;
fb_p = &mod_fb_p->fb;
fb_p->y_addr = 0;
fb_p->c_addr = 0;
fb_p->col_fmt = VDO_COL_FMT_YUV422H;
fb_p->img_w = VPP_HD_DISP_RESX;
fb_p->img_h = VPP_HD_DISP_RESY;
fb_p->fb_w = VPP_HD_MAX_RESX;
fb_p->fb_h = VPP_HD_MAX_RESY;
fb_p->h_crop = 0;
fb_p->v_crop = 0;
/* module frame buffer member function */
mod_fb_p->csc_mode = VPP_CSC_RGB2YUV_JFIF_0_255;
mod_fb_p->set_framebuf = sclr_set_framebuffer;
mod_fb_p->set_addr = sclr_set_fb_addr;
mod_fb_p->get_addr = sclr_get_fb_addr;
mod_fb_p->set_csc = scl_set_csc_mode;
mod_fb_p->framerate = 0x7fffffff;
mod_fb_p->wait_ready = 0xffffffff;
mod_fb_p->capability = BIT(VDO_COL_FMT_YUV420) | BIT(VDO_COL_FMT_YUV422H) | BIT(VDO_COL_FMT_YUV444)
| BIT(VDO_COL_FMT_ARGB) | BIT(VDO_COL_FMT_RGB_565) | VPP_FB_FLAG_CSC | VPP_FB_FLAG_FIELD;
p_scl = scl_mod_p;
}
/* -------------------- SCLW module -------------------- */
{
sclw_mod_t *sclw_mod_p;
sclw_mod_p = (sclw_mod_t *) vpp_mod_register(VPP_MOD_SCLW,sizeof(sclw_mod_t),VPP_MOD_FLAG_FRAMEBUF);
if( !sclw_mod_p ){
DPRINT("*E* SCLW module register fail\n");
return -1;
}
/* module member variable */
sclw_mod_p->int_catch = VPP_INT_NULL;
/* module member function */
sclw_mod_p->init = sclw_init;
sclw_mod_p->set_enable = sclw_set_mif_enable;
/* module frame buffer */
mod_fb_p = sclw_mod_p->fb_p;
fb_p = &mod_fb_p->fb;
fb_p->y_addr = 0;
fb_p->c_addr = 0;
fb_p->col_fmt = VDO_COL_FMT_YUV422H;
fb_p->img_w = VPP_HD_DISP_RESX;
fb_p->img_h = VPP_HD_DISP_RESY;
fb_p->fb_w = VPP_HD_MAX_RESX;
fb_p->fb_h = VPP_HD_MAX_RESY;
fb_p->h_crop = 0;
fb_p->v_crop = 0;
/* module frame buffer member function */
mod_fb_p->csc_mode = VPP_CSC_RGB2YUV_JFIF_0_255;
mod_fb_p->set_framebuf = sclw_set_framebuffer;
mod_fb_p->set_addr = sclw_set_fb_addr;
mod_fb_p->get_addr = sclw_get_fb_addr;
mod_fb_p->set_csc = scl_set_csc_mode;
mod_fb_p->wait_ready = 0xffffffff;
mod_fb_p->capability = BIT(VDO_COL_FMT_YUV422H) | BIT(VDO_COL_FMT_YUV444) | BIT(VDO_COL_FMT_ARGB)
| BIT(VDO_COL_FMT_RGB_565) | VPP_FB_FLAG_CSC | BIT(VDO_COL_FMT_YUV420);
p_sclw = sclw_mod_p;
}
#ifndef WMT_FTBLK_VPU
/* -------------------- VPU module -------------------- */
{
vpu_mod_t *vpu_mod_p;
vpu_mod_p = (vpu_mod_t *) vpp_mod_register(VPP_MOD_VPU,sizeof(vpu_mod_t),VPP_MOD_FLAG_FRAMEBUF);
if( !vpu_mod_p ){
DPRINT("*E* VPU module register fail\n");
return -1;
}
/* module member variable */
vpu_mod_p->int_catch = VPP_INT_NULL;
vpu_mod_p->resx_visual = VPP_HD_DISP_RESX;
vpu_mod_p->resy_visual = VPP_HD_DISP_RESY;
vpu_mod_p->posx = 0;
vpu_mod_p->posy = 0;
/* module member function */
vpu_mod_p->init = scl_vpu_init;
vpu_mod_p->set_enable = sclr_set_mif_enable;
vpu_mod_p->set_colorbar = sclr_set_colorbar;
/* module frame buffer */
mod_fb_p = vpu_mod_p->fb_p;
fb_p = &mod_fb_p->fb;
fb_p->y_addr = 0;
fb_p->c_addr = 0;
fb_p->col_fmt = VDO_COL_FMT_YUV422H;
fb_p->img_w = VPP_HD_DISP_RESX;
fb_p->img_h = VPP_HD_DISP_RESY;
fb_p->fb_w = VPP_HD_MAX_RESX;
fb_p->fb_h = VPP_HD_MAX_RESY;
fb_p->h_crop = 0;
fb_p->v_crop = 0;
/* module frame buffer member function */
mod_fb_p->csc_mode = VPP_CSC_RGB2YUV_JFIF_0_255;
mod_fb_p->set_framebuf = scl_vpu_set_framebuffer;
mod_fb_p->set_addr = sclr_set_fb_addr;
mod_fb_p->get_addr = sclr_get_fb_addr;
mod_fb_p->set_csc = scl_set_csc_mode;
mod_fb_p->fn_view = scl_vpu_proc_view;
mod_fb_p->wait_ready = 0x1fff;
mod_fb_p->capability = BIT(VDO_COL_FMT_YUV420) | BIT(VDO_COL_FMT_YUV422H) | BIT(VDO_COL_FMT_YUV444)
| BIT(VDO_COL_FMT_ARGB) | VPP_FB_FLAG_CSC | VPP_FB_FLAG_FIELD;
p_vpu = vpu_mod_p;
}
#endif
return 0;
}
