static int w1_bq2022_add_slave(struct w1_slave *sl) { char cmd[4]; int retries = 5; bq2022_battery_info battery_info; if (!sl) { pr_err("%s: No w1 device\n", __func__); return -1; } retry: /* Initialization, master's mutex should be hold */ if (!(retries--)) { pr_err("%s: fatal error\n", __func__); return -1; } if (w1_reset_bus(sl->master)) { pr_warn("%s: reset bus failed, just retry!\n", __func__); goto retry; } /* rom comm byte + read comm byte + addr 2 bytes */ cmd[0] = BQ2022_COMMAND_SKIP_SERIALIZATION_ROM; cmd[1] = BQ2022_COMMAND_READ_MEMORY_FIELD_CRC; cmd[2] = 0x0; cmd[3] = 0x0; /* send command */ w1_write_block(sl->master, cmd, 4); /* crc verified for read comm byte and addr 2 bytes*/ if (w1_read_8(sl->master) != w1_calc_crc8(&cmd[1], 3)) { pr_err("%s: com crc err\n", __func__); goto retry; } /* read the whole memory, 1024-bit */ w1_read_block(sl->master, (char*) &battery_info, sizeof(battery_info)); /* crc verified for data */ if (w1_read_8(sl->master) != w1_calc_crc8((char*) &battery_info, sizeof(battery_info))) { pr_err("%s: w1_bq2022 data crc err\n", __func__); goto retry; } if (battery_info.magic != BQ2022_BATTERY_INFO_MAGIC) { pr_err("%s: invalid battery info magic\n", __func__); return -1; } pr_hexdump(&battery_info, sizeof(battery_info)); w1_bq2022_battery_info_id = battery_info.data1 | battery_info.data2 << 8; w1_bq2022_print_battery(); return 0; }
static int w1_bq2022_read(void) { struct w1_slave *sl = bq2022_slave; char cmd[4]; u8 crc, calc_crc; int retries = 5; if (!sl) { pr_err("No w1 device\n"); return -1; } retry: /* Initialization, master's mutex should be hold */ if (!(retries--)) { pr_err("w1_bq2022_read fatal error\n"); return -1; } if (w1_reset_bus(sl->master)) { pr_warn("reset bus failed, just retry!\n"); goto retry; } /* rom comm byte + read comm byte + addr 2 bytes */ cmd[0] = HDQ_CMD_SKIP_ROM; cmd[1] = HDQ_CMD_READ_FIELD; cmd[2] = 0x0; cmd[3] = 0x0; /* send command */ w1_write_block(sl->master, cmd, 4); /* crc verified for read comm byte and addr 2 bytes*/ crc = w1_read_8(sl->master); calc_crc = w1_calc_crc8(&cmd[1], 3); if (calc_crc != crc) { pr_err("com crc err\n"); goto retry; } /* read the whole memory, 1024-bit */ w1_read_block(sl->master, batt_crypt_info, 128); /* crc verified for data */ crc = w1_read_8(sl->master); calc_crc = w1_calc_crc8(batt_crypt_info, 128); if (calc_crc != crc) { pr_err("w1_bq2022 data crc err\n"); goto retry; } return 0; }
static enum w1_ds2502_state w1_ds2502_send_command(struct w1_slave *sl) { enum w1_ds2502_state next_state = STATE_DETECT; unsigned char current_cmd; unsigned char bus_crc; unsigned char cmd_count; unsigned char computed_crc; CDBG("%s: Enter\n", __func__); for (cmd_count = 0; cmd_count < DS2503_NUM_READ_MEM_CMD; cmd_count++) { current_cmd = read_memory_cmd_addr[cmd_count]; w1_write_8(sl->master, current_cmd); } /* Time to read CRC (1byte) for MEMORY FUNCTION COMMAND. This will be * compared with the computed CRC by the master. */ bus_crc = w1_read_8(sl->master); computed_crc = w1_calc_crc8((unsigned char *)read_memory_cmd_addr, DS2503_NUM_READ_MEM_CMD); CDBG("%s: bus_crc:0x%x computed_crc:0x%x\n", __func__, bus_crc, computed_crc); if (bus_crc == computed_crc) next_state = STATE_RX_DATA; return next_state; }