Beispiel #1
0
static irqreturn_t vsync_isr(int irq, void *dev_id)
#endif
{
	unsigned  int  fb0_cfg_w0,fb1_cfg_w0;
	unsigned  int  current_field;
	
	if (READ_MPEG_REG(ENCI_VIDEO_EN) & 1)
		osd_hw.scan_mode= SCAN_MODE_INTERLACE;
	else if (READ_MPEG_REG(ENCP_VIDEO_MODE) & (1 << 12))
		osd_hw.scan_mode= SCAN_MODE_INTERLACE;
	else
		osd_hw.scan_mode= SCAN_MODE_PROGRESSIVE;

	fb0_cfg_w0 = READ_MPEG_REG(VIU_OSD1_BLK0_CFG_W0);
	fb1_cfg_w0 = READ_MPEG_REG(VIU_OSD1_BLK0_CFG_W0+ REG_OFFSET);
	if(osd_hw.free_scale_enable[OSD1])
	{
		osd_hw.scan_mode= SCAN_MODE_PROGRESSIVE;
		if (fb0_cfg_w0 & 1 << 1) {
			fb0_cfg_w0 &= ~(1 << 1);
		}

		if (fb1_cfg_w0 & (1 << 1)) {
			fb1_cfg_w0 &= ~(1 << 1);
		}
	}

	{
		if((osd_hw.color_info[OSD1] != NULL) &&
			(((fb0_cfg_w0&0xf00)!=osd_hw.color_info[OSD1]->hw_blkmode<<8) ||
			((fb0_cfg_w0&0x3c)!=osd_hw.color_info[OSD1]->hw_colormat<<2))){
			fb0_cfg_w0 &= 0xfffff0c3;
			fb0_cfg_w0 |= osd_hw.color_info[OSD1]->hw_blkmode<<8;
			fb0_cfg_w0 |= osd_hw.color_info[OSD1]->hw_colormat<<2;
		}
		WRITE_MPEG_REG(VIU_OSD1_BLK0_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK1_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK2_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK3_CFG_W0, fb0_cfg_w0);

		if((osd_hw.color_info[OSD2] != NULL) &&
			(((fb1_cfg_w0&0xf00)!=osd_hw.color_info[OSD2]->hw_blkmode<<8) ||
			((fb1_cfg_w0&0x3c)!=osd_hw.color_info[OSD2]->hw_colormat<<2))){
			fb1_cfg_w0 &= 0xfffff0c3;
			fb1_cfg_w0 |= osd_hw.color_info[OSD2]->hw_blkmode<<8;
			fb1_cfg_w0 |= osd_hw.color_info[OSD2]->hw_colormat<<2;
		}
		WRITE_MPEG_REG(VIU_OSD1_BLK0_CFG_W0 + REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK1_CFG_W0 + REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK2_CFG_W0 + REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK3_CFG_W0 + REG_OFFSET, fb1_cfg_w0);
	}

	if (osd_hw.scan_mode == SCAN_MODE_INTERLACE)
	{
		fb0_cfg_w0=READ_MPEG_REG(VIU_OSD1_BLK0_CFG_W0);
		fb1_cfg_w0=READ_MPEG_REG(VIU_OSD1_BLK0_CFG_W0+ REG_OFFSET);
#if defined(CONFIG_ARCH_MESON3)
        if (READ_MPEG_REG(ENCP_VIDEO_MODE) & (1 << 12))
            {
             /* 1080I */
             
                if(READ_MPEG_REG(VENC_INTFLAG) & 0x200) {
                  osd_current_field = 0;
                }
                else {
                  osd_current_field = osd_current_field^1;
                }
            } else {
                if(READ_MPEG_REG(VENC_INTFLAG) & 4) {
                  osd_current_field = 0;
                }
                else {
                  osd_current_field = osd_current_field^1;
                }
            }
        current_field = osd_current_field;
#else
		if (READ_MPEG_REG(ENCP_VIDEO_MODE) & (1 << 12))
        	{
       		 /* 1080I */
			 
        		if (READ_MPEG_REG(VENC_ENCP_LINE) >= 562) {
           		 /* bottom field */
           			current_field = 0;
        		} else {
           			current_field = 1;
        		}
    		} else {
        		current_field = READ_MPEG_REG(VENC_STATA) & 1;
    		}
#endif
		fb0_cfg_w0 &=~1;
		fb1_cfg_w0 &=~1;
		fb0_cfg_w0 |=current_field;
		fb1_cfg_w0 |=current_field;

		WRITE_MPEG_REG(VIU_OSD1_BLK0_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK1_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK2_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK3_CFG_W0, fb0_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK0_CFG_W0+ REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK1_CFG_W0+ REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK2_CFG_W0+ REG_OFFSET, fb1_cfg_w0);
		WRITE_MPEG_REG(VIU_OSD1_BLK3_CFG_W0+ REG_OFFSET, fb1_cfg_w0);
	}

	//go through update list
	walk_through_update_list();
	osd_update_3d_mode(osd_hw.mode_3d[OSD1].enable,osd_hw.mode_3d[OSD2].enable);
	
	if (!vsync_hit)
	{
#ifdef FIQ_VSYNC
		fiq_bridge_pulse_trigger(&osd_hw.fiq_handle_item);
#else
		wait_vsync_wakeup();
#endif
	}

#ifndef FIQ_VSYNC
	return  IRQ_HANDLED ;
#endif
}